GB2585587A - Modulators - Google Patents
Modulators Download PDFInfo
- Publication number
- GB2585587A GB2585587A GB2014175.0A GB202014175A GB2585587A GB 2585587 A GB2585587 A GB 2585587A GB 202014175 A GB202014175 A GB 202014175A GB 2585587 A GB2585587 A GB 2585587A
- Authority
- GB
- United Kingdom
- Prior art keywords
- signal
- analogue
- digital converter
- drive
- converter circuitry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims abstract 3
- 238000011143 downstream manufacturing Methods 0.000 claims 2
- 230000007704 transition Effects 0.000 claims 2
- 230000001413 cellular effect Effects 0.000 claims 1
- 238000012544 monitoring process Methods 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0624—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
- H03M1/0656—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the time domain, e.g. using intended jitter as a dither signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/504—Analogue/digital converters with intermediate conversion to time interval using pulse width modulation
- H03M1/508—Analogue/digital converters with intermediate conversion to time interval using pulse width modulation the pulse width modulator being of the self-oscillating type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/60—Analogue/digital converters with intermediate conversion to frequency of pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Dc-Dc Converters (AREA)
- Analogue/Digital Conversion (AREA)
- Amplifiers (AREA)
Abstract
This application relates to analogue-to-digital converter (ADC) circuitry (200). A time- encoding modulator (TEM 201) has a comparator (104) and a loop filter (105) configured to generate a pulse-width-modulated (PWM) signal (SPWM) in response to an input signal (SIN) and a feedback signal (SFB). A controlled oscillator, such as a VCO (202) receives the PWM signal and generates an output oscillation signal (SOSC) with a frequency that varies based on a drive signal at a drive node (109), e.g. a drive node of a ring oscillator (107). The controlled oscillator (202) comprises at least one control switch (112) controlled by a switch control signal (S1) generated from the received PWM signal so as to control the drive strength of the drive signal applied to the drive node (109). The feedback signal (SFB) for the TEM (201) is derived from the controlled oscillator (202) so as to include any timing error between the PWM signal and the switch control signal (S1) applied to said control switch.
Claims (20)
1. Analogue to digital converter circuitry comprising: a time-encoding modulator comprising a comparator and a loop filter configured to generate a pulse-width-modulated (PWM) signal in response to an input signal and a feedback signal; a controlled oscillator configured to receive the pulse-width-modulated (PWM) signal and generate an output oscillation signal with a frequency that varies based on a drive signal at a drive node; wherein the controlled oscillator comprises at least one control switch configured to be controlled by a switch control signal generated from said received PWM signal so as to control a drive strength of the drive signal applied to the drive node; wherein the feedback signal for the time-encoding modulator is derived from the controlled oscillator so as to include any timing error between the PWM signal and the switch control signal applied to said control switch.
2. Analogue to digital converter circuitry as claimed in claim 1 wherein the feedback signal for the time-encoding modulator is tapped from the switch control signal applied to said control switch.
3. Analogue to digital converter circuitry as claimed in claim 2 comprising a buffer configured to receive a signal tapped from the switch control signal applied to said control switch and to output the feedback signal.
4. Analogue to digital converter circuitry as claimed in claim 1 wherein the feedback signal for the time-encoding modulator is derived from the controlled oscillator so as to include an indication of any timing error between the drive signal applied to the drive node and the PWM signal.
5. Analogue to digital converter circuitry as claimed in claim 4 comprising a monitor for monitoring a signal level at a monitored node against a defined reference to provide the feedback signal, wherein the monitored node exhibits a variation in signal level with a duty cycle that corresponds to that of the drive node.
6. Analogue to digital converter circuitry as claimed in claim 5 wherein the monitored node is the drive node .
7. Analogue to digital converter circuitry as claimed in claim 5 wherein the monitored node is a replica drive node for driving a load in synchronism with the drive node.
8. Analogue to digital converter circuitry as claimed in claim 5 wherein the monitor comprises a comparator configured to compare the first signal against a reference voltage.
9. Analogue to digital converter circuitry as claimed in claim 1 wherein the controlled oscillator comprises a ring oscillator configured to be driven by a drive current signal at the drive node.
10. Analogue to digital converter circuitry as claimed in claim 9 wherein a first current source is configured to provide a first drive current to the drive node and the at least one control switch is controlled by said switch control signal to selectively connect a second current source to the to the drive node to provide a second drive current.
11. Analogue to digital converter circuitry as claimed in claim 1 wherein the loop filter of the time-encoding modulator is configured to filter the feedback signal to provide a filtered feedback signal.
12. Analogue to digital converter circuitry as claimed in claim 11 wherein the comparator is configured to compare the input signal received at a first comparator input to the filtered feedback signal received at a second comparator input.
13. Analogue to digital converter circuitry as claimed in claim 1 1 wherein the filtered feedback signal is combined with the input signal and applied to a first comparator input of the comparator.
14. Analogue to digital converter circuitry as claimed in claim 13 wherein the comparator is configured to compare a signal at the first comparator input to a reference voltage .
15. Analogue to digital converter circuitry as claimed in claim 11 wherein the input signal is applied to a first signal path of the time encoding modulator coupled to a first comparator input of the comparator and a reference voltage is applied to a second signal path of the time encoding modulator coupled to a second comparator input of the comparator and wherein the filtered feedback signal is applied as a differential signal to both of the first and second signals paths.
16. Analogue to digital converter circuitry as claimed in claim 1 wherein the loop filter comprises first and second current sources controlled to source or sink current based on the feedback signal.
17. Analogue to digital converter circuitry as claimed in claim 1 wherein the comparator is a hysteretic comparator.
18. An electronic device comprising analogue to digital converter circuitry as claimed claim 1 wherein the device is at least one of: a portable device; a battery powered device; an audio device; a communications device; a mobile or cellular telephone or a smartphone; a computing device; a notebook, laptop or tablet computing device; a gaming device; a wearable device; a smartwatch; a voice activated or voice controlled device; an electrical appliance.
19. A pulse-width-modulation (PWM) modulator comprising: a comparator configured to generate a PWM signal in response to an input signal and filtered feedback signal; an output node for outputting the PWM signal to a downstream processing module; a feedback node for receiving a feedback signal from the downstream processing module; and a loop filter configured to receive and filter the feedback signal from the feedback node and to generate said filtered feedback signal.
20. Analogue to digital converter circuitry comprising: a time-encoding modulator comprising a comparator and a loop filter configured to generate a pulse-width-modulated (PWM) signal in response to an input signal and a feedback signal; a controlled oscillator configured to receive the pulse-width-modulated (PWM) signal and generate an output oscillation signal with a frequency that varies based on a drive signal at a drive node; wherein the controlled oscillator comprises at least one control switch configured to be controlled by a switch control signal generated from said received PWM signal so as to control a drive strength of the drive signal applied to the drive node; wherein the feedback signal for the time-encoding modulator is derived from the controlled oscillator so as to include any delay between a signal transition of the PWM signal and a corresponding signal transition of the switch control signal applied to said control switch.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/919,985 US10298247B1 (en) | 2018-03-13 | 2018-03-13 | Modulators |
PCT/GB2019/050545 WO2019175536A1 (en) | 2018-03-13 | 2019-02-27 | Modulators |
Publications (3)
Publication Number | Publication Date |
---|---|
GB202014175D0 GB202014175D0 (en) | 2020-10-21 |
GB2585587A true GB2585587A (en) | 2021-01-13 |
GB2585587B GB2585587B (en) | 2022-05-18 |
Family
ID=65724453
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2014175.0A Active GB2585587B (en) | 2018-03-13 | 2019-02-27 | Modulators |
Country Status (4)
Country | Link |
---|---|
US (1) | US10298247B1 (en) |
CN (1) | CN112088491A (en) |
GB (1) | GB2585587B (en) |
WO (1) | WO2019175536A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2567420B (en) * | 2017-10-02 | 2020-07-08 | Advanced Risc Mach Ltd | Adaptive voltage scaling methods and systems therefor |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160359500A1 (en) * | 2014-11-04 | 2016-12-08 | Cirrus Logic International Semiconductor Ltd. | Analogue-to-digital converter |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5770940A (en) * | 1995-08-09 | 1998-06-23 | Switch Power, Inc. | Switching regulator |
US7528760B2 (en) * | 2007-01-26 | 2009-05-05 | Texas Insturments Incorporated | Class D analog-to-digital converter |
US9252661B2 (en) * | 2011-04-01 | 2016-02-02 | Qualcomm Inc. | Methods and devices for power supply control |
-
2018
- 2018-03-13 US US15/919,985 patent/US10298247B1/en active Active
-
2019
- 2019-02-27 WO PCT/GB2019/050545 patent/WO2019175536A1/en active Application Filing
- 2019-02-27 CN CN201980030869.1A patent/CN112088491A/en active Pending
- 2019-02-27 GB GB2014175.0A patent/GB2585587B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160359500A1 (en) * | 2014-11-04 | 2016-12-08 | Cirrus Logic International Semiconductor Ltd. | Analogue-to-digital converter |
Non-Patent Citations (3)
Title |
---|
BABAIE-FISHANI A ET AL, "Design of a low-voltage op-amp-less ASDM to linearise VCO-ADC", ELECTRONICS LETTERS, IEE STEVENAGE, GB, (20160526), vol. 52, no. 11, doi:10.1049/EL.2016.0235, ISSN 0013-5194, pages 911 - 913, * |
ERNAÃ NDEZ L ET AL, "VCO-based sigma delta modulator with PWM precoding", ELECTRONIC LET, THE INSTITUTION OF ENGINEERING AND TECHNOLOGY, (20110512), vol. 47, no. 10, doi:10.1049/EL:20110061, ISSN 1350-911X, pages 588 - 589, * |
UNNIKRISHNAN VISHNU ET AL, "Linearization of VCO-based ADCs using asynchronous sigma-delta modulation", 2016 IEEE 59TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), IEEE, (20161016), doi:10.1109/MWSCAS.2016.7870151, pages 1 - 4 * |
Also Published As
Publication number | Publication date |
---|---|
GB2585587B (en) | 2022-05-18 |
CN112088491A (en) | 2020-12-15 |
GB202014175D0 (en) | 2020-10-21 |
US10298247B1 (en) | 2019-05-21 |
WO2019175536A1 (en) | 2019-09-19 |
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