GB2546804A

GB2546804A - Self-synchronized robust droop controller

Info

Publication number: GB2546804A
Application number: GB1601730.3A
Authority: GB
Inventors: Zhong Qingchang
Original assignee: Individual
Current assignee: Individual
Priority date: 2016-01-30
Filing date: 2016-01-30
Publication date: 2017-08-02
Anticipated expiration: 2036-01-30
Also published as: GB2546804B; GB201601730D0

Abstract

A self-synchronised robust droop controller provides proportional power sharing among inverters. A self-synchronised mechanism is embedded into the controller for the automatic synchronisation between the inverter output voltage and the grid voltage reducing the complexity and computational burden of the controller. The controller comprises: a power unit where the real and reactive power of the inverter is measured and where current sent to the power unit can be switched between a virtual current generated using a virtual impedance and a measured inverter current; a voltage generation unit to form a sinusoidal voltage reference signal for the controller where first and second integrators generate the voltage amplitude and phase respectively; a third integrator forming a switched input to the second integrator, subtracted from the system frequency, and formed from a scaled power difference between the measured reactive power and a reactive power set-point, and the measured real power and a real power set-point; and a switch to selectively enable a scaled difference between a rated voltage and the output voltage to be added to the scaled power difference between the real power set-point and the measured real power to form the input to the first integrator.

Description

DESCRIPTION

The present invention is concerned with a control device for power inverters that embeds the synchronization function to achieve accurate power sharing and voltage regulation.

Due to global warming and environmental crisis, renewable energy systems, e.g., wind, solar and tidal power, have been extensively studied during the last two decades. When the amount of such renewable energy exceeds a certain level, it is inevitable that they will be finally connected to the power grid to take part in the regulation of system frequency and voltage. This means numerous power inverters will be connected to the power grid, which are often connected in parallel for high power applications. For such inverters, droop control is widely considered as a key technique to control the power flow between renewable energy sources and power grid due to its simple structure and independence from external communication.

Grid-tied inverters can be operated in the islanded or grid-tied mode. In the islanded mode, the main control objective is to achieve accurate load sharing among inverters operated in parallel. The equal sharing under linear and non-linear loads has been extensively investigated and high accuracy of equal sharing can be achieved. However, the load voltage drops from its nominal value due to the increase of the load and also due to the droop control, which should be avoided if possible. The load references of frequency and voltage can be added to droop loops to maintain the voltage and frequency close to their nominal values. Moreover, when the conventional droop controllers are applied, it is still a problem to share loads accurately in proportion to the power ratings of the inverters. In order for accurate proportional sharing, it is required that the inverters should have the same per-unit output impedance, which is hard to meet in practice. The UK patent GB2483879 discloses a control device to achieve accurate proportional sharing without any requirements on output impedances of the inverters. In addition, the load voltage drop due to the load effect and the droop effect is significantly reduced so tight voltage regulation can be achieved at the same time.

For grid-tied operation, there are four modes. When it is required to send given real power and reactive power to the grid, it is called the set mode, denoted as P-mode and Q-mode, respectively. When the inverter is expected to take part in the regulation of the frequency and voltage of the grid, it is called the droop mode, denoted as Pd- mode and (Qc-mode, respectively. It is easy to achieve Pd-mode and Qd~ mode with the droop controllers, but the operation in the P-mode and Q-mode needs some change to the controller.

When inverters are operated in parallel or connected to the grid, a synchronisation unit is often required to synchronise the inverter output voltage with the terminal (grid) voltage. The error between the output voltage and the terminal (grid) voltage should be small enough in order to avoid high inrush current when connecting it to the grid or to other inverters. Phase-locked-loops (PLLs) are normally used for this purpose by extracting the frequency, amplitude and phase of the grid voltage as references for droop controllers. However, it is well known that PLLs are highly non-linear, which inevitably make systems more complex. PLLs are also difficult and time-consuming to be tuned for good performance especially when there are many PLLs in systems, which is common in systems with a number of parallel-operated inverters.

This invention discloses a control device that embeds the synchronization function into the robust droop controller disclosed in the UK patent GB2483879. Hence, in addition to accurate proportional sharing of power and tight voltage regulation, self-synchronization is achieved before turning the circuit breaker on. All the four modes, i.e., P and (), P and ()u, Pd and (), Pd and ()u, are achieved without any compromise.

Specific embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

Figure 1 shows the model of a single-phase inverter or one phase of a multiple-phase inverter.

Figure 2 depicts the robust droop controller disclosed in GB2483879 for inverters with resistive output impedances (R-inverters), which is actually applicable for inverters with output impedance having a phase angle between — rad and rad.

Figure 3 depicts the disclosed self-synchronized robust droop controller for inverters with output impedances having a phase angle between — -| rad and rad.

Figure 4 shows the experimental results when an inverter equipped with the disclosed control device before and after the synchronization process started.

Figure 5 shows the experimental results when the inverter equipped with the disclosed control device was subject to a series of change in the operation.

Figure 6 shows the gird interaction of the tested inverter equipped with the disclosed control device: (a) P and E\ (b) Q and /.

The rest of this description is organised as follows. The original RDC in the islanded mode is first reviewed for R-inverters in Section I. After that, the disclosed self-synchronized robust droop control is described in Section II. The experimental results with the disclosed control device are presented in Section III. I. Overview of the Robust Droop Control

In this section, the robust droop control (RDC) for inverters with resistive output impedance (R-inverters) is reviewed. Note that it has recently been revealed that this controller is actually applicable to inverters having output impedance with a phase angle between — ^ rad and ^ rad.

According to the model of a single-phase inverter shown in Figure 1, the real and reactive power transferred from the inverter source vr to the terminal v„ are (1) (2)

Here, δ is the phase difference between the supply and the terminal. For R-inverters, the output impedance is dominantly resistive. When it is purely resistive, i.e., Θ = 0 and δ is small, there are (3) (4) (5) where E is the RMS value of the reference voltage vr, E* is the rated RMS value of the output voltage v0, ω* and ω are the rated and measured system line frequency, n and m are the droop coefficients. These are used as basic rules to construct conventional droop controller, which is widely used in parallel-operated inverters.

However, the conventional droop controller is sensitive to numerical errors, noises, disturbances, component mismatches and parameter shifts etc. To address this problem, a robust droop controller shown in Figure. 2 was disclosed in GB2483879. There are (6) (7) where Ke is an amplifier. In the steady state, there is

(8)

It means as long as Ke is the same for all inverters, there is nP = constant, (9) which guarantees the accurate proportional sharing of active power. Moreover, the parallel-operated inverters would have the same frequency as long as the system is stable, and thus the accurate proportional sharing

Table I

Operation Modes of the Disclosed SRDC

* Note that when Switch Sc is at Position s, Switch Sp is automatically turned OFF and Switch Sq is automatically turned ON. Moreover, Pset and Qset are automatically set to be 0. of reactive power is guaranteed as well. According to (8), the output voltage is

(10) where the designed voltage drop ratiocan be maintained within a given desired range by choosing a suitable Ke.

II. The Self-synchronized Robust Droop Controller

In order to synchronise the output voltage of inverters with the grid (terminal) voltage, a synchronisation unit like PLLs is often needed. However, it is well known that the parameters of PLLs are usually difficult and time-consuming to be tuned for performance. Besides, there is a trade-off between the accuracy and computational economy when a PLL is applied. This invention embeds the synchronisation function into the robust droop controller so that the output voltage of the inverter can automatically synchronize with the grid (terminal) voltage so that the inverter can be smoothly connected to the grid without noticeable voltage and/or current spikes. After the inverter is connected to the grid, the inverter could accurately regulate the real power, reactive power, voltage and frequency. A. Design Procedures

The disclosed control device for R-inverters is shown in Figure 3. Compared to the RDC shown in Figure 2, several inventive changes are made: 1) A virtual current iv is generated by a feedback of the voltage error va — vg via a virtual impedance Ls + R, where vg is the grid (terminal) voltage and L is a virtual inductor with series resistance R\ 2) A Switch Sc is added so that the current sent to the power unit can be switched between the virtual current iv and the inductor current i /,; 3) A Switch 5/· is added, so that the term Ke(E* — V,,) can be added to or removed from the controller; 4) An integral controller with the reset function is added to regulate Q* — Q to be zero and the reset function can be enabled and disabled via switching ON and OFF the Switch Sq. The following parts of this section are devoted to introducing the above four changes in detail.

As can be seen from Figure 3 and Table I, this controller is (11) (12) with where K is a positive gain. When the Switch Sp is turned OFF, the term Ke(E* — V0) is removed from the controller; and when the Switch Sp is switched ON, the term Ke(E* — V0) is added to the controller. Similarly, if the Switch Sq is switched OFF (ON), the reset function of the integrator -j is enabled (disabled). The real power P and reactive power Q are calculated from vQ and i. Note that the i could be switched between the virtual current iv and the inductor current ip where (13)

In other words, when the Switch Sc is set at Position s, the virtual current iv is sent to the power unit; and when the Switch Sc is set at Position g, the inductor current is sent instead. B. Self-synchronization Mode

Before the inverter is connected to the grid, the terminal voltage vQ should be synchronized with the grid voltage vg, which means V0 = Vg and ω = ω9. According to (11), (12) and Table I, when Sp is OFF and Sq is ON, at the steady state, the real and reactive power sent to the grid, i.e., P and Q, are controlled to be around their references Pset and Qset, respectively, which are set at zero in the self-synchronisation mode. However, both P and Q are not controllable because the inverter is not connected to the grid yet. In order to generate the right power for the SRDC to regulate the voltage magnitude and the frequency, a virtual impedance Ls + R is introduced to virtually connect the inverter with the grid. Then, a virtual current iv described by (13) is resulted. For this purpose, the Switch Sc is set at Position s and then the iv replaces

the ig for power calculation. In this case, the SRDC becomes (14) (15) with (16)

Under this condition, if Pset and ()s,i are both set to be zero, then at the steady state, the virtual current iv is maintained at zero and hence, the terminal voltage vQ can be synchronized with the grid voltage vg. In order to enable this, whenever the Switch Sc is set at Position s, the Switch Sp and the Switch Sq should be automatically set as ON and OFF, respectively. After the synchronisation is achieved, the circuit breaker in the inverter can be closed to connect the inverter to the grid. At the same time, the Switch Sc should be set to Position g so that the real inductor current ip can be fed into the SRDC for the power calculation. C. P-mode and Q-mode

When the Switch Sc is at Position g and Sp is OFF, there is

and the voltage magnitude settles down at a constant value that results in P = Pset·

Similarly, when Switch Sc is at Position g and Sq is turned ON, there is

and the frequency settles down at a certain value that results in Q Qset·

This mode is called the set mode, in particular, the P-mode for the real power and the Q-mode for the reactive power. D. Pp-mode and Qp-mode

When the Switch Sc is at Position g and the Switch Sp is ON, there is

Table II

Parameters of the inverter

and the voltage magnitude settles down at a constant value, which means

(17)

Similarly, when Switch Sc is at Position g and Sq is turned OFF, there is ω = ω* - m(Qset - Q) and the frequency settles down at a certain value, which means

(18)

As can be seen from (17) and (18), the real power and reactive power deviate from their set points Pset and Qset according to the droop coefficients.

Note that for P-mode, Q-mode, P^-mode, and Qd-mode, the current fed into the controller is the the real inductor current % while the virtual current i„ is only used in the self-synchronisation mode. III. Experimental Validation

In order to verify the disclosed controller, intensive experiments were conducted on a grid-tied inverter. The parameters of the inverter used for experiments are summarised in Table II. The power components used to fabricate the inverter (e.g. the inductor Ls and the capacitor C) are not optimised for performance. The DC-bus voltage was 200 V. The inverter is designed in such a way that 5% increase of the voltage results in 100% decrease of the real power P and 1% increase of the frequency results in 100% increase of the reactive power Q. Then the droop coefficients can be calculated as n = °-05E^E and m = fu'<% , where S is the rated apparent power of the inverter. The inverter was tested for connection to both a grid simulator and a public grid.

A. Connected to a Grid Simulator

Since the real grid voltage could not be controlled in the laboratory, a grid simulator was used to facilitate the tests presented in this subsection. The experiments were conducted according to the following sequence of actions: 1) starting the self-synchronization mode (Sc- Position s; Sp: OFF; and Sq: ON) with Pset = 0 W, Qset = 0 Var, E = 112 V and / = 50.1Hz at t = 0 s; 2) turning the relay on and switching Sc to the Position g at t = 10 s; 3) applying Pset = 150 W at t = 20 s; 4) changing E from 112 V to 108 V at around t = 25 s; 5) applying Qset = 150 Var at t = 30 s; 6) changing / from 50.1 Flz to 49.9 Hz at around t = 35 s; 7) switching Sp ON to enable the P^-mode at t = 40 s; 8) switching Sq OFF to enable the Qp-mode at t = 50 s; 9) stopping data acquisition of the power analyser at around t = 57 s. 1) Self-synchronisation: After the self-synchronisation mode was enabled, the output voltage vQ was quickly built up as shown in Figure 4. Accordingly, the voltage difference between the output voltage and the grid voltage becomes very small quickly and the inverter is ready to be connected to the grid. 2) Regulation of real power and reactive power : The output of the inverter is now connected to the grid simulator through the inductor Lg. In this case, the grid voltage is governed by the grid simulator, which can be changed for the purpose of testing. As shown in Figure 5, the / and E were initially set at 50.1 Hz and 112 V, respectively, before starting the inverter.

At t = 0 s, the self-synchronisation was enabled. As shown in Figure 5, the real power was controlled around zero while the reactive power was around —41 Var, which is the reactive power consumed by the filter capacitor. Since the virtual current iv instead of the current is is used to calculate the power in the controller, both the real and the reactive power in the controller are actually maintained around zero. When the inverter was connected to the grid at 10 s, there is no much transient response and both the real and reactive power were maintained around zero. The system responded quickly to the step change of the real and reactive power set-points at L = 20 s and l = 30 s, respectively. Note that both the real and reactive power were always well controlled at their set points instead of drifting to other values even if there were step changes of the E and the / at around t = 25 s and around t = 35 s, respectively, because the inverter was operated in the set mode. After the Pp-mode was enabled at t = 40 s, the real power does not change much, because the E is almost around the nominal value, which is 110 V here. On the other hand, the reactive power dropped by about 56 Var when the Qp-mode was enabled at t = 50 s, which is expected (about 19% of the power rating) because the / is about 0.2% lower than the nominal value. B. Connected to a Public Grid

In order to further demonstrate this, the experimental system was connected to the public grid through a step-up transformer. The results demonstrating the interaction with the grid are shown in Figure 6. The real power P changed with the voltage inversely, almost in a symmetrical way. The reactive power Q followed the grid frequency / very well. This is consistent with the analysis made before. Hence, the self-synchronized robust droop controller is able to take part in the regulation of grid frequency and voltage promptly and contributes to the stability of the grid.

Claims

CLAIMS 1) A control device that embeds the synchronization function for controlling an inverter to achieve proportional load sharing and tight voltage regulation, comprising • a power unit to provide real and reactive power of the inverter, • a voltage generation unit to form a sinusoidal signal to be used as a voltage reference for an inner-loop controller of the inverter via taking the output of a first integrator as the voltage amplitude and the output of a second integrator as the phase, • a first switch to select the current fed into the power unit from either the measured inverter current or the virtual current that is generated from the voltage difference between the inverter output voltage and the inverter terminal voltage across a virtual impedance, • a second switch to enable or disable the reset of a third integrator, of which the input is the scaled power difference between the reactive power set-point and the reactive power from the power unit and the output is subtracted from the rated system frequency, together with the scaled power difference between the reactive power set-point and the reactive power, to form the input to the second integrator, • a third switch to add or not to add the scaled difference between the rated voltage and the output voltage onto the scaled power difference between the real power set-point and the real power from the power unit to form the input to the first integrator.
2) A control device as claimed in Claim 1 in which the scaling factors are dynamic.
3) A control device as claimed in Claim 1 in which the virtual impedance is resistive.
4) A control device as claimed in Claim 1 in which the virtual impedance is inductive-resistive.
5) A control device as claimed in Claim 1 in which the scaled power difference fed into the first integrator is the scaled power difference between the reactive power set-point and the reactive power from the power unit and the scaled power difference fed into the second and the third integrators is the scaled power difference between the real power set-point and the real power from the power unit.