GB2456292B - Interleaving or de-interleaving a stream of data received in successive frames - Google Patents

Interleaving or de-interleaving a stream of data received in successive frames

Info

Publication number
GB2456292B
GB2456292B GB0721853A GB0721853A GB2456292B GB 2456292 B GB2456292 B GB 2456292B GB 0721853 A GB0721853 A GB 0721853A GB 0721853 A GB0721853 A GB 0721853A GB 2456292 B GB2456292 B GB 2456292B
Authority
GB
United Kingdom
Prior art keywords
data
interleaving
sequence
memory
locations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0721853A
Other versions
GB0721853D0 (en
GB2456292A (en
Inventor
Christopher Ryan Nokes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
British Broadcasting Corp
Original Assignee
British Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by British Broadcasting Corp filed Critical British Broadcasting Corp
Priority to GB0721853A priority Critical patent/GB2456292B/en
Publication of GB0721853D0 publication Critical patent/GB0721853D0/en
Priority to PCT/GB2008/003726 priority patent/WO2009060185A2/en
Publication of GB2456292A publication Critical patent/GB2456292A/en
Application granted granted Critical
Publication of GB2456292B publication Critical patent/GB2456292B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707Simple row-column interleaver, i.e. pure block interleaving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276Interleaving address generation
    • H03M13/2764Circuits therefore
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782Interleaver implementations, which reduce the amount of required interleaving memory
    • H03M13/2785Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789Interleaver providing variable interleaving, e.g. variable block sizes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/24Systems for the transmission of television signals using pulse code modulation

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention concerns an efficient interleaver, preferably for use with DVB-T2. The interleaver is initially filled sequentially [0,1,2,3,4...]. The data in the nth memory locations, with an increment when the maximum memory address has been reached, is then read out and immediately replaced with data for the second frame [0,3,6,9...1,4,7,10...]. The data nth memory location in the frames write sequence is then read out and again immediately refilled with the next frame [0,9,18,27...1,10,19,28...] and then [0,27,54...1,28,55...]. Thus the sequence of memory locations has steps of n0 for the initial write and then n1, n2, n3... for subsequent read/writes. Depending on memory size the sequence of locations can loop around quicker and can return to sequential at some point. When used with variable bit rate (VBR) data the interleave will skip address positions for which input data is lacking. Therefore if rate data was received addresses outside the shaded area in the figure would not be used.
GB0721853A 2007-11-07 2007-11-07 Interleaving or de-interleaving a stream of data received in successive frames Expired - Fee Related GB2456292B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB0721853A GB2456292B (en) 2007-11-07 2007-11-07 Interleaving or de-interleaving a stream of data received in successive frames
PCT/GB2008/003726 WO2009060185A2 (en) 2007-11-07 2008-11-05 Interleaving or de-interleaving a stream of data received in successive frames

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0721853A GB2456292B (en) 2007-11-07 2007-11-07 Interleaving or de-interleaving a stream of data received in successive frames

Publications (3)

Publication Number Publication Date
GB0721853D0 GB0721853D0 (en) 2007-12-19
GB2456292A GB2456292A (en) 2009-07-15
GB2456292B true GB2456292B (en) 2010-03-17

Family

ID=38858299

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0721853A Expired - Fee Related GB2456292B (en) 2007-11-07 2007-11-07 Interleaving or de-interleaving a stream of data received in successive frames

Country Status (2)

Country Link
GB (1) GB2456292B (en)
WO (1) WO2009060185A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2465611B (en) * 2008-11-25 2011-04-27 British Broadcasting Corp Interleaving or de-interleaving of data of variable rate
FR2955001A1 (en) * 2010-01-06 2011-07-08 St Microelectronics Grenoble 2 METHOD AND DEVICE FOR LINE AND COLUMN INTERLACING FOR BLOCKS OF VARIABLE SIZE
EP2595320A4 (en) * 2010-07-12 2014-01-22 Panasonic Corp De-interleaving device and method, and data transmission system and method
GB2491377A (en) * 2011-05-31 2012-12-05 British Broadcasting Corp Method and apparatus for memory access in an interleaver
US8804452B2 (en) 2012-07-31 2014-08-12 Micron Technology, Inc. Data interleaving module
WO2015023148A1 (en) 2013-08-14 2015-02-19 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978883A (en) * 1993-12-07 1999-11-02 Thomson Multimedia Sa Block interleaving and deinterleaving method and device therefor
EP1100202A1 (en) * 1998-07-17 2001-05-16 Kabushiki Kaisha Kenwood De-interleave circuit
US6986081B1 (en) * 1999-03-15 2006-01-10 Matsushita Electric Industrial Co., Ltd. Block interleaving apparatus, block deinterleaving apparatus, block interleaving method and block deinterleaving method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978883A (en) * 1993-12-07 1999-11-02 Thomson Multimedia Sa Block interleaving and deinterleaving method and device therefor
EP1100202A1 (en) * 1998-07-17 2001-05-16 Kabushiki Kaisha Kenwood De-interleave circuit
US6986081B1 (en) * 1999-03-15 2006-01-10 Matsushita Electric Industrial Co., Ltd. Block interleaving apparatus, block deinterleaving apparatus, block interleaving method and block deinterleaving method

Also Published As

Publication number Publication date
WO2009060185A2 (en) 2009-05-14
GB0721853D0 (en) 2007-12-19
GB2456292A (en) 2009-07-15
WO2009060185A3 (en) 2009-06-25

Similar Documents

Publication Publication Date Title
GB2456292B (en) Interleaving or de-interleaving a stream of data received in successive frames
TW200634838A (en) Page buffer of flash memory device with improved program operation performance and program operation control method
TW200701233A (en) Use of data latches in cache operations of non-volatile memories
WO2003071689A3 (en) Combined interleaver and deinterleaver, and turbo decoder comprising a combined interleaver and deinterleaver
WO2006064497A3 (en) A method of handling limitations on the order of writing to a non-volatile memory
EP1587227A3 (en) Method for controlling a memory for time deinterleaving in a receiver for Digital Multimedia Broadcast (DMB)
EP1801981A3 (en) Decoding device, control method, and program
TW200513045A (en) Device and method of interleaving or deinterleaving an incoming word sequence to form an outgoing word sequence
WO2009097677A8 (en) Non-volatile memory device having configurable page size
WO2010147770A3 (en) Use of emerging non-volatile memory elements with flash memory
WO2007028026A3 (en) Flash drive fast wear leveling
EP2227810A4 (en) Fault-tolerant non-volatile integrated circuit memory
US20060236045A1 (en) Apparatus for deinterleaving interleaved data using direct memory access
WO2010051621A8 (en) Bridge device having a virtual page buffer
TW200703360A (en) Page buffer architecture for programming, erasing and reading nanoscale resistive memory devices
CN101489135B (en) Encoder convenient for LDPC long code implementation on FPGA and encoding method
US10025709B2 (en) Convolutional de-interleaver and convolutional de-interleaving method
US7783936B1 (en) Memory arbitration technique for turbo decoding
GB2465611B (en) Interleaving or de-interleaving of data of variable rate
TW201130231A (en) Receiving apparatus, receiving method, program, and receiving system
WO2002003598A3 (en) Block interleaver and de-interleaver with buffer to reduce power consumption
GB0917013D0 (en) Memory device with error correction capability and efficient partial word write operation
WO2008054987A3 (en) Using no-refresh dram in error correcting code encoder and decoder implementations
TW200708948A (en) Architecture and method for storing data
US20070277064A1 (en) Reconfigurable convolutional interleaver/deinterleaver using minimum amount of memory and an address generator

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20141107