GB2454364A

GB2454364A - A programmable oscillator circuit with fine frequency resolution and low jitter

Info

Publication number: GB2454364A
Application number: GB0820076A
Authority: GB
Inventors: Stephen John Harold
Original assignee: EOSEMI Ltd
Current assignee: EOSEMI Ltd
Priority date: 2007-11-02
Filing date: 2008-11-03
Publication date: 2009-05-06
Also published as: GB0721540D0; GB0820076D0; WO2009056835A1

Abstract

The output frequency fosc of a programmable oscillator circuit is finely adjusted by modifying 26 the basic frequency control code 24 so that the output 16 of the RC oscillator 12 repeatedly alternates between two adjacent spot frequencies with an adjustable number of oscillator cycles output at each frequency. The divider 18 provides an output fosc with very low jitter and a 50% mark-space ratio. The comparator 20 compares the count value from counter 18 with the dither ratio code 22 to provide a pulse width modulated binary signal for modifying the frequency control code 24.

Description

PRECISION OSCILLATOR

This invention relates to oscillators which produce an output of well defined frequency, with particular reference to oscillators whose frequency output is substantially unaffected by jitter.

Electronic oscillators are important and fundamental components of a wide range of electrical devices. It is of course a desired aim that the output frequency of an electronic oscillator is of high precision. Key figures of merit for all oscillators are the accuracy of the frequency output relative to a desired frequency output, and the cycle-to-cycle variation in the frequency output. The latter figure of merit will herein after be termed "jitter". Precision oscillators rely on a "tuning" mechanism to adjust component values and thereby achieve a desired oscillation frequency. This is commonly achieved by connecting or disconnecting parallel and/or series elements in an integrated circuit. In such arrangements, the frequency output is not continuous, but rather consists of a series of discrete frequencies separated by frequency "steps". It is desirable that the size of the frequency steps is minimised; however, the frequency step size is limited by errors in the matching of the circuit elements. These errors impose a lower limit on the achievable frequency steps -the use of an increasing number of smaller elements to define component values does not result in a continuous reduction in the frequency step size (and a concomitant increase in the oscillator precision) due to these errors. Typically, the errors are greater than one part in 1000 (10 bits), and thus limit the achievable precision.

The effective precision of a programmable oscillator can be increased by p the technique of "dithering" wherein the oscillation frequency is varied between two or more separate frequency values. When averaged over a number of cycles, the resulting output frequency lies between the programmed frequency values, thereby increasing the effective precision. Dithering has been used in circuits such as Fractional Phase-Locked Loops (PLLs) and digitally controlled oscillators (DCOs) (see, for example, Staszewski et al, IEEE Transactions on Circuits and Systems -II: Analog and Digital Signal Processing, Vol.50, No.11, November 2003, 8 15-28). Another implementation is described in Staszewski et al, IEEE Journal of Solid-State Circuits, Vol. 40, No. 12, December 2005, 2469- 2482. An example of the improved precision available from dithering is shown in Figure 1, where the target oscillation frequency is 32000 Hz, and an 8-bit capacitor array (made up of 256 elements) is assumed. The raw frequency step size is approximately 32000/256 = 125 Hz, and thus the precision is 3906 ppm.

By dithering the oscillation frequency between one frequency which is above the target frequency (32090 Hz in this example), and another which is below the target frequency (31965 Hz), the average frequency can be brought much closer to the target. By averaging over 16 cycles and using a 4:12 dither ratio, the average oscillation frequency will be too low by only 3.8 Hz. A 5:11 dither ratio would produce an average frequency which is too high by only 4.0 Hz. The average frequency step size has thus been reduced to 7.8 Hz, and the precision improved to 244 ppm. The cycle-to-cycle jitter will be 122 ns, as defined by the difference between the periods of the 32090 Hz and 31965 Hz frequencies, and this will not be reduced by further increases in the number of cycles in the averaging period.

The present invention, in at least some of its embodiments, provides precision oscillators with improved jitter characteristics, and improves the precision available from a programmable oscillator beyond that expected from the number of circuit elements, and beyond the limit imposed by errors in the matching of the elements.

According to a first aspect of the invention there is provided an electronic oscillator for producing an output signal having an output frequency, including: a programmable oscillator having a variable frequency output which can be controlled to produce at least a first and a second oscillation frequency; control means for controlling the programmable oscillator so as to dither the output of the programmable oscillator between at least the first and second oscillation frequencies so as to produce an average frequency which is N times higher in frequency than the output frequency, where N is greater than 1; and a frequency divider for dividing the average frequency by N to produce the output signal having the output frequency.

The present invention can improve the precision available from a programmable oscillator beyond that expected from the number of circuit elements, and beyond the limit imposed by errors in the matching of these elements. In particular, the present inventors have recognised that prior art dithering techniques will be susceptible to cycle-to-cycle variations in their periods, i.e. jitter. The output waveforms in the prior art dithering techniques have additional frequency components either side of the oscillation frequency, and a waveform period which is not equal in every cycle. This gives rise to jitter which is equal to the difference between the periods of the separate, discrete frequencies which the technique dithers between. In contrast to the prior art, in the present invention dithering is carried out between frequencies which are very close to N times higher than the output frequency in order to produce a signal which is N times higher in frequency than the output frequency. The output is obtained by dividing down from the dithered average signal. This has the advantage that the divided output does not have any cycle-to- cycle variation in period, and thus jitter is significantly improved. The dithered, average frequency is equal or very close to N times higher in frequency than the desired frequency.

Thus, the output frequency is equal to or at least is very close to the actual desired frequency which the user wishes to obtain from the oscillator device.

A further advantage is that the circuitry associated with the oscillator can be simplified and minimised. Prior art dithering techniques commonly use a sigma-delta modulation process in which the time slots allocated to the different frequencies are randomised. This reduces the energy associated with spurious tones in the frequency spectrum but at the cost of additional power consumption and die area. The present invention can be implemented without the complexity of the circuitry associated with sigma-delta modulation techniques.

Preferably, N is greater than or equal to 2 and most preferably N is greater than or equal to 4. Most commonly, N is 2, 4, 8, or 16. In general, N is an integer, although it is in principal possible for N to be a non-integer, for instance if the dithered, average frequency was converted into the desired frequency using a multiplier stage in addition to a divider stage.

Advantageously, the programmable oscillator is an analogue programmable oscillator. Typically, the variable oscillator includes a plurality of * 5 circuit elements which are programmably interconnectable so as to produce a variable output frequency. Advantageously, the analogue programmable oscillator is an RC variable oscillator. Other forms of programmable oscillators, such as an LC programmable oscillator, are possible.

The first, second, and any further frequencies that the programmable oscillator dithers between may be interleaved so that the output signal has a mark-space ratio of or close to 50:50.

The control means may produce a digital control signal which controls the programmable oscillator. The control signal may include a control programming code which defines the frequency of the output of the programmable oscillator.

The electronic oscillator may further include modifying means for modifying the control signal in dependence on a desired dither ratio. The electronic oscillator may include a comparator which compares a desired dither ratio with the output of the programmable oscillator and alters the control signal in dependence on the comparison. Preferably, the desired dither ratio is defined by a dither ratio programming code.

The frequency divider may be a counter. In embodiments having the comparator, the comparator may compare the desired dither ratio with a count value outputted by the counter.

According to a second aspect of the invention there is provided a method of producing an output signal having an output frequency including the steps of: controlling a programmable oscillator so that said programmable oscillator dithers between at least a first and a second oscillation frequency so as to produce an average frequency which is N times higher in frequency than the output frequency, where N is greater than 1; and dividing the average frequency by N to produce the output signal having the output frequency.

Whilst the invention has been described above, it extends to any inventive combination as set out above or in the following description, drawings or claims.

Embodiments of electronic oscillators and methods in accordance with the invention will now be described with reference to the accompanying drawings, in which: Figure 1 depicts a prior art dithering technique for obtaining a target frequency of 32000 Hz; Figure 2 depicts a dithering technique of the invention; Figure 3 is a schematic diagram of an electronic oscillator of the invention; and Figure 4 is a schematic diagram of a second electronic oscillator of the invention.

The present invention is based on the realisation that prior art dithering techniques are subject to cycle-to-cycle jitter, and seeks to reduce or eliminate this jitter. In the present invention, the dithering is carried out between two frequencies which are chosen to provide a dithered target frequency which is N times higher than the true, desired frequency. The true, desired frequency is obtained by dividing down from the dithered signal. The chief advantage of this method is that the divided output does not have any cycle-to-cycle variation in period, and thus jitter is significantly improved.

Figure 2 illustrates a method of the present invention. In common with Figure 1, the desired output frequency is 32000 Hz. It is assumed that an identical programmable oscillator to the one assumed in respect of Figure 1 is used; in other words, an 8 bit capacitor array, made up of 256 elements, is employed. In the instance depicted in Figure 2, N is 16, and so the target frequency for the dithering is 16 x 32000 Hz = 512000 Hz, and the oscillator dithers between 513440 Hz and 511440 Hz. As depicted in Figure 2, a 4:12 dither ratio between these frequencies is employed. In Figure 2, fi is the 513440 Hz frequency, and f2 is the 511440 Hz frequency. The dithered frequency obtained by this dithering process is divided by 16 in order to obtain the desired frequency output from the electronic oscillator. This can be achieved using a simple counter which, as shown at the bottom portion of Figure 2, produces a high output for 8 cycles followed by a low output for the next 8 cycles. It is noted that it may in some embodiments be advantageous to interleave the fi and f2 cycles so that the divided output has a mark-space ratio close to 50:50. However, it is not essential to do this in order to eliminate the cycle-to-cycle variation in the output period.

Figures 3 and 4 show possible embodiments of an electronic oscillator device of the invention, depicted generally at 10 and 30, respectively. The devices can be realised as integrated circuits. The devices 10 and 30 share a number of common elements, and identical numerals are used to denote these common elements. The device 10 shown in Figure 3 comprises a programmable RC oscillator arrangement 12 which can be programmed to oscillate at a frequency determined by a digital control signal supplied by a control arrangement shown generally at 14. The digital control signal selects the series and/or parallel elements in the programmable RC oscillator arrangement which are connected into an oscillating circuit, thereby determining the frequency output of the programmable RC oscillator arrangement 12. Thus, the output frequency of the programmable RC oscillator arrangement 12 varies with time under the control of the control arrangement 14. The programmable RC oscillator arrangement 12 is designed to operate N times high in frequency than the desired output frequency. For example, the device 10 of Figure 3 can be configured to perform the method shown and described with respect to Figure 2.

In the arrangement shown in Figure 3 the output 16 of the programmable RC oscillator arrangement 12 is fed to a frequency divider 17, the output of which toggles between high and low states every N/2 oscillation cycles in order to provide the required output frequency A monitor stage 21 outputs a control signal which toggles between different states in accordance with the desired dither ratio defined by programming code 22. In the arrangement shown in Figure 3 a further programming code 24 defines the oscillation frequency of the programmable RC oscillator arrangement 12. The programming code is adjusted by the modify stage 22 in dependence on the control signal from the monitor stage 21. The amended programming code is then fed to the programmable RC oscillator arrangement 12. In this way, the oscillation of the programmable RC oscillator arrangement is controlled so that the oscillation switches between two separate frequencies to produce an average frequency which is equal or close to N times higher than the desired output frequency.

In the arrangement shown in Figure 4 the frequency divider is a digital counter 18, the output of which toggles between high and low states every N12 oscillation cycles in order to provide the required output frequency fosc. The count value from the counter 18 is fed to a comparator 20 where the count value is compared with a programming code 22. The programming code 22 defines the desired dither ratio. The result of the comparison is used to control the frequency output of the programmable RC oscillator arrangement 12. In the arrangement shown in Figure 4 a further programming code 24 defines the oscillation frequency of the programmable RC oscillator arrangement 12. The programming code is adjusted in dependence on the result obtained from the comparison made at the comparator 20. As shown in Figure 4, the programming code 24 can be altered by adding either 1 or 0 to the code at stage 26. The amended programming code is then fed to the programmable RC oscillator arrangement 12. In this way, the oscillation of the programmable RC oscillator arrangement is controlled so that the oscillation switches between two separate frequencies to produce an average frequency which is N times higher than the desired output frequency.

The arrangement shown in Figure 4 is a favoured one since it is easily and economically implemented. However, many variations would readily occur to the skilled person. Oscillators of the present invention can be used in a great many applications where a frequency output is required. Applications are not restricted to the frequency values depicted in the examples.

Claims

1. An electronic oscillator for producing an output signal having an output frequency, including: a programmable oscillator having a variable frequency output which can be controlled to produce at least a first and a second oscillation frequency; control means for controlling the programmable oscillator so as to dither the output of the programmable oscillator between at least the first and second oscillation frequencies so as to produce an average frequency which is N times higher in frequency than the output frequency, where N is greater than 1; and a frequency divider for dividing the average frequency by N to produce the output signal having the output frequency.

2. An electronic oscillator according to claim 1 in which N is greater than or equal to 2, preferably greater than or equal to 4.

3. An electronic oscillator according to claim 2 in which N is 2, 4, 8 or 16.

4. An electronic oscillator according to any one of claims 1 to 3 in which the programmable oscillator is an analogue programmable oscillator.

5. An electronic oscillator according to claim 4 in which the analogue programmable oscillator is an RC programmable oscillator.

6. An electronic oscillator according to any previous claim in which the first, second and any further frequencies that the programmable oscillator dithers between are interleaved so that the output signal has a mark-space ratio of or close to 50:50.

7. An electronic oscillator according to any previous claim in which the control means produces a digital control signal which controls the programmable oscillator.

8. An electronic oscillator according to claim 7 in which the control signal includes a control programming code which defines the frequency of the output of the programmable oscillator.

9. An electronic oscillator according to claim 7 or claim 8 further including a modifying means for modifying the control signal in dependence on a desired dither ratio.

10. An electronic oscillator according to claim 9 including a comparator which compares a desired dither ratio with the output of the programmable oscillator and alters the control signal in dependence on the comparison.

11. An electronic oscillator according to claim 9 or claim 10 in which the desired dither ratio is defined by a dither ratio programming code.

12. An electronic oscillator according to any previous claim in which the frequency divider is a counter.

13. An electronic oscillator according to claim 12 when dependent on claim or claim 11 in which the comparator compares the desired dither ratio with a count value outputted by the counter.

14. A method for producing an output signal having an output frequency including the steps of: controlling a programmable oscillator so that said programmable oscillator dithers between at least a first and a second oscillation frequency so as to produce an average frequency which is N times higher in frequency than the output frequency, where N is greater than 1; and dividing the average frequency by N to produce the output signal having the output frequency.