GB2400729B - CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same - Google Patents

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

Info

Publication number
GB2400729B
GB2400729B GB0415350A GB0415350A GB2400729B GB 2400729 B GB2400729 B GB 2400729B GB 0415350 A GB0415350 A GB 0415350A GB 0415350 A GB0415350 A GB 0415350A GB 2400729 B GB2400729 B GB 2400729B
Authority
GB
United Kingdom
Prior art keywords
substrates
methods
integrated circuit
silicon germanium
circuit devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0415350A
Other versions
GB0415350D0 (en
GB2400729A (en
Inventor
Geum-Jong Bae
Tae-Hee Choe
Sang-Su Kim
Hwa-Sung Rhee
Nae-In Lee
Kyung-Wook Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/711,706 external-priority patent/US6633066B1/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB0415350D0 publication Critical patent/GB0415350D0/en
Publication of GB2400729A publication Critical patent/GB2400729A/en
Application granted granted Critical
Publication of GB2400729B publication Critical patent/GB2400729B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66893Unipolar field-effect transistors with a PN junction gate, i.e. JFET
    • H01L29/66916Unipolar field-effect transistors with a PN junction gate, i.e. JFET with a PN heterojunction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78684Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
    • H01L29/78687Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/802Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with heterojunction gate, e.g. transistors with semiconductor layer acting as gate insulating layer, MIS-like transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
GB0415350A 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same Expired - Fee Related GB2400729B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20000000670 2000-01-07
US09/711,706 US6633066B1 (en) 2000-01-07 2000-11-13 CMOS integrated circuit devices and substrates having unstrained silicon active layers
KR10-2000-0075482A KR100429869B1 (en) 2000-01-07 2000-12-12 CMOS Integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0100209A GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

Publications (3)

Publication Number Publication Date
GB0415350D0 GB0415350D0 (en) 2004-08-11
GB2400729A GB2400729A (en) 2004-10-20
GB2400729B true GB2400729B (en) 2004-12-08

Family

ID=27350133

Family Applications (4)

Application Number Title Priority Date Filing Date
GB0415350A Expired - Fee Related GB2400729B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415351A Expired - Fee Related GB2400730B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0100209A Expired - Fee Related GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415353A Expired - Fee Related GB2400731B (en) 2000-01-07 2001-01-04 Substrates having buried silicon germanium layers therein and methods of forming same

Family Applications After (3)

Application Number Title Priority Date Filing Date
GB0415351A Expired - Fee Related GB2400730B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0100209A Expired - Fee Related GB2365214B (en) 2000-01-07 2001-01-04 CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same
GB0415353A Expired - Fee Related GB2400731B (en) 2000-01-07 2001-01-04 Substrates having buried silicon germanium layers therein and methods of forming same

Country Status (5)

Country Link
JP (1) JP4549542B2 (en)
KR (1) KR100429869B1 (en)
CN (1) CN1165085C (en)
DE (1) DE10100194A1 (en)
GB (4) GB2400729B (en)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6410371B1 (en) * 2001-02-26 2002-06-25 Advanced Micro Devices, Inc. Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer
US7157119B2 (en) * 2002-06-25 2007-01-02 Ppg Industries Ohio, Inc. Method and compositions for applying multiple overlying organic pigmented decorations on ceramic substrates
FR2842350B1 (en) * 2002-07-09 2005-05-13 METHOD FOR TRANSFERRING A LAYER OF CONCEALED SEMICONDUCTOR MATERIAL
US6953736B2 (en) 2002-07-09 2005-10-11 S.O.I.Tec Silicon On Insulator Technologies S.A. Process for transferring a layer of strained semiconductor material
US7018910B2 (en) 2002-07-09 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Transfer of a thin layer from a wafer comprising a buffer layer
FR2842349B1 (en) * 2002-07-09 2005-02-18 TRANSFERRING A THIN LAYER FROM A PLATE COMPRISING A BUFFER LAYER
DE10231964A1 (en) * 2002-07-15 2004-02-19 Infineon Technologies Ag Semiconductor component with stress-absorbing semiconductor layer and associated manufacturing process
DE10260860B4 (en) * 2002-12-23 2008-07-10 Robert Bosch Gmbh Layer of Si1-xGex, process for their preparation and micromechanical device with it
FR2851848B1 (en) * 2003-02-28 2005-07-08 Soitec Silicon On Insulator RELAXATION AT HIGH TEMPERATURE OF A THIN LAYER AFTER TRANSFER
US7348260B2 (en) 2003-02-28 2008-03-25 S.O.I.Tec Silicon On Insulator Technologies Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
FR2851847B1 (en) * 2003-02-28 2005-10-14 Soitec Silicon On Insulator RELAXATION OF A THIN LAYER AFTER TRANSFER
US7018909B2 (en) 2003-02-28 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
US6963078B2 (en) * 2003-03-15 2005-11-08 International Business Machines Corporation Dual strain-state SiGe layers for microelectronics
US7084460B2 (en) * 2003-11-03 2006-08-01 International Business Machines Corporation Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates
WO2005067058A1 (en) * 2004-01-08 2005-07-21 Nec Corporation Mis field-effect transistor
US7579636B2 (en) 2004-01-08 2009-08-25 Nec Corporation MIS-type field-effect transistor
US20050280081A1 (en) * 2004-06-16 2005-12-22 Massachusetts Institute Of Technology Semiconductor devices having bonded interfaces and methods for making the same
US7115955B2 (en) * 2004-07-30 2006-10-03 International Business Machines Corporation Semiconductor device having a strained raised source/drain
US8063397B2 (en) 2006-06-28 2011-11-22 Massachusetts Institute Of Technology Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission
US7863653B2 (en) 2006-11-20 2011-01-04 International Business Machines Corporation Method of enhancing hole mobility
JP5152827B2 (en) * 2007-03-22 2013-02-27 株式会社日立製作所 THIN FILM TRANSISTOR AND ORGANIC EL DISPLAY DEVICE USING THE SAME
US7989306B2 (en) 2007-06-29 2011-08-02 International Business Machines Corporation Method of forming alternating regions of Si and SiGe or SiGeC on a buried oxide layer on a substrate
US8138579B2 (en) 2007-06-29 2012-03-20 International Business Machines Corporation Structures and methods of forming SiGe and SiGeC buried layer for SOI/SiGe technology
US8049253B2 (en) 2007-07-11 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
GB2467935B (en) * 2009-02-19 2013-10-30 Iqe Silicon Compounds Ltd Formation of thin layers of GaAs and germanium materials
FR2957456B1 (en) 2010-03-10 2013-01-04 Commissariat Energie Atomique METHOD FOR MANUFACTURING A SUBSTRATE COMPRISING A SLIMMING STEP WITH DETECTION STOP OF A POROUS AREA
CN101924138B (en) * 2010-06-25 2013-02-06 中国科学院上海微***与信息技术研究所 MOS (Metal Oxide Semiconductor) device structure for preventing floating-body effect and self-heating effect and preparation method thereof
CN101916770B (en) * 2010-07-13 2012-01-18 清华大学 Si-Ge-Si semiconductor structure with double graded junctions and forming method thereof
KR101657872B1 (en) * 2014-12-23 2016-09-19 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Improved transistor channel
FR3064398B1 (en) * 2017-03-21 2019-06-07 Soitec SEMICONDUCTOR TYPE STRUCTURE ON INSULATION, ESPECIALLY FOR A FRONT-SIDE TYPE IMAGE SENSOR, AND METHOD FOR MANUFACTURING SUCH STRUCTURE
CN111952186A (en) * 2020-08-21 2020-11-17 中国科学院上海微***与信息技术研究所 Field effect transistor based on cavity surrounding structure and preparation method
CN113871451A (en) * 2021-09-24 2021-12-31 华虹半导体(无锡)有限公司 DMOS device and forming method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5998807A (en) * 1996-09-27 1999-12-07 Siemens Aktiengesellschaft Integrated CMOS circuit arrangement and method for the manufacture thereof

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69609313T2 (en) * 1995-12-15 2001-02-01 Koninkl Philips Electronics Nv SEMICONDUCTOR FIELD EFFECT ARRANGEMENT WITH A SIGE LAYER
JP3376211B2 (en) * 1996-05-29 2003-02-10 株式会社東芝 Semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
US5906951A (en) * 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
DE19720008A1 (en) * 1997-05-13 1998-11-19 Siemens Ag Integrated CMOS circuit arrangement and method for its production
JP3607194B2 (en) * 1999-11-26 2005-01-05 株式会社東芝 Semiconductor device, semiconductor device manufacturing method, and semiconductor substrate
JP4226175B2 (en) * 1999-12-10 2009-02-18 富士通株式会社 Semiconductor device and manufacturing method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5998807A (en) * 1996-09-27 1999-12-07 Siemens Aktiengesellschaft Integrated CMOS circuit arrangement and method for the manufacture thereof

Also Published As

Publication number Publication date
GB2400731B (en) 2004-12-08
GB0415353D0 (en) 2004-08-11
CN1165085C (en) 2004-09-01
KR100429869B1 (en) 2004-05-03
JP2001217433A (en) 2001-08-10
GB0415350D0 (en) 2004-08-11
GB2400731A (en) 2004-10-20
GB2365214A (en) 2002-02-13
GB2365214B (en) 2004-09-15
GB0100209D0 (en) 2001-02-14
KR20010070298A (en) 2001-07-25
CN1322016A (en) 2001-11-14
JP4549542B2 (en) 2010-09-22
GB2400730A (en) 2004-10-20
GB0415351D0 (en) 2004-08-11
GB2400729A (en) 2004-10-20
GB2400730B (en) 2004-12-08
DE10100194A1 (en) 2001-07-19

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