GB2395077A - An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection - Google Patents

An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection Download PDF

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Publication number
GB2395077A
GB2395077A GB0225459A GB0225459A GB2395077A GB 2395077 A GB2395077 A GB 2395077A GB 0225459 A GB0225459 A GB 0225459A GB 0225459 A GB0225459 A GB 0225459A GB 2395077 A GB2395077 A GB 2395077A
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Prior art keywords
amplifier
input
output
modulated carrier
accordance
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GB0225459A
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GB0225459D0 (en
Inventor
Martin Neuhaus
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N & L Ltd
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N & L Ltd
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Priority to GB0225459A priority Critical patent/GB2395077A/en
Publication of GB0225459D0 publication Critical patent/GB0225459D0/en
Priority to AU2003271959A priority patent/AU2003271959A1/en
Priority to PCT/GB2003/004462 priority patent/WO2004040751A1/en
Priority to GB0325306A priority patent/GB2396498A/en
Publication of GB2395077A publication Critical patent/GB2395077A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3221Predistortion by overamplifying in a feedforward stage the distortion signal to have a combined main signal and "negative" distortion to form the predistorted signal for a further stage. so that after amplification in the further stage only the amplified main signal remains

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

An amplifier arrangement comprises a preamplifier 002 feeding a power amplifier 012. The distortion produced by the preamplifier 002 is isolated by summer 007 and this distortion signal is then added to the preamplifier output with appropriate phase and amplitude to provide a predistorted input signal suitable for the power amplifier 012. Residual distortion at the output of the power amplifier is removed by an adaptive feedforward loop 014-020. Amplifier efficiency may be improved by altering amplifier bias and supply voltage in dependence on the input signal (figure 10). Amplifier bias and attenuation of the input signal may be adjusted as a function of the signal power input integrated over time, the thermal capacity of the transistor junction, and the statistical probability of data occurrence in the modulated input signal. In particular, the input may be attenuated to prevent thermal overload.

Description

( AMPLIFIER ASSEMBLY
5 This invention relates to power amplifiers and in particular to a multicarrier power amplifier system including pre-distortion and feed-forward to reduce intermodulation distortion and to a method of operating such an amplifier system.
In general, high power amplifiers are operated in the vicinity of the saturation region. In the case of a complex modulated input signal, the non-linearity of the amplifier will generate inter-modulation 15 distortion. BACKGROUND OF THE INVENTION
UK Patent Application GB 2318938 A filed 13 May 1997, Samsung Electronics Co Limited, describes an arrangement for linearizing an amplifier by a combination of two methods. In the first a pre 25 distorter supplies harmonics to the main amplifier in such a way as to counteract the distortion. In the second a feed-forward arrangement subtracts a signal derived from the input of the main amplifier from a signal derived from the output to produce a distortion so signal which is then subtracted from the main amplifier output to remove remaining distortion.
UK Patent Application GB 2352570 A filed 28 July 1999, Wireless Systems International Limited, describes a 35 linearizing arrangement including a digital signal lUU1. 111= Ulyl1 lyll=1 plUU1 1111 pre-distorter process which pre-distorts the input
( signal to the amplifier in such a manner as to counter distortion imposed by the amplifier. Feedback from the amplifier output is sampled to provide a feedback signal for controlling the pre-distortion process.
5 Additionally, a feed-forward signal is combined with the amplifier output to further reduce distortion therein. The feed-forward signal is derived by subtracting the input signal from feedback from the amplifier output (which may contain residual 10 distortion). SUMMARY OF THE INVENTION
According to one aspect of the present invention there is provided an amplifier assembly including a pre amplifier having an input receiving an input modulated carrier and an output feeding an amplifier, wherein a 20 first loop derives a distortion component from the output of the preamplifier and sums this distortion component with the modulated carrier output of the pre amplifier before feeding the resultant summed signal to an input of the amplifier.
According to another aspect of the present invention there is provided an amplifier assembly including a pre-amplifier having an input receiving an input modulated carrier and an output feeding an amplifier, 30 wherein: a first loop derives a distortion component from the output of the preamplifier and sums this distortion component with the modulated carrier output of the pre amplifier before feeding the resultant summed signal to 35 an input of the amplifier; and a second loop Derives a reslaud1 us ollllc from the output of the amplifier and sums this residual
( distortion component with the input modulated carrier before feeding the resultant summed signal to an output of the amplifier assembly.
5 The system comprises two distinct loops. The first loop is an arrangement and a method of pre-distorting the modulated carrier in order to compensate for the non- l linearities present in the power amplifier. The second loop is a feed-forward loop that compensates for the lo residual distortion present in the amplified modulated carrier after it has passed through the amplifier.
The first loop extracts the modulated carrier signal from the input feed to a pre-amplifier. The output of 15 the pre-amplifier will comprise both the amplified modulated carrier signal and a distortion component induced by the pre-amplifier. This pre-amplifier output is also fed into the first loop and combined with the input modulated carrier. Feedback in the so first loop dynamically reverses the phase and amplitude of the modulated carrier element relative to the output of the pre-amplifier. The resultant combined signal, consisting primarily of the distortion component, is used as a pre-distortion signal and fed towards a power 25 amplifier. Preferably, in order to achieve the correct amplitude and phase characteristics the pre-distortion signal is fed to the power amplifier through a variable amplifier JO and a phase shifter which are controlled on a feed forward basis by the second loop, as described below.
The output of the power amplifier may still contain a small residual distortion component derived from the 35 first loop. The second loop extracts this output of the power amber ana combines 1c WlUn and Q Iyll' modulated carrier signal input to the pre-amplifier.
( - 4 - Feedback in the second loop dynamically reverses the phase and amplitude of the modulated carrier element relative to the output of the power amplifier. The resultant combined signal, comprising primarily the s residual distortion component, is fed through a variable amplifier and a phase shifter before re combination with the power amplifier output. The afore mentioned residual distortion component of the second loop is continuously measured or detected and controls lo the variable amplifiers and phase shifters in both the first and second loops on a feed-forward basis so as to optimise the distortion present in the pre-distortion signal and hence minimise the overall distortion present at the power amplifier output.
The complex modulated carrier contains both an amplitude and frequency component. The amplitude component, which might typically be 10 times greater than the average power level, presents itself as a so function of the modulating data stream. This might typically be 1 data bit per million. This amplitude component will cause an increase in temperature of the amplifier's semiconductor junction. If the amplifier's bias is such that it allows the amplifier to deliver 25 this higher than normallyrated average output power, then the time it is able to do this before destruction occurs will be a function of the amplifier's maximum semiconductor junction temperature and specific heat capacity. In order to maximise efficiency of an amplifier, it is desirable to operate the amplifier as close as possible to its maximum power output level before the onset of thermal damage. Conventionally, the output circuit of 35 the amplifier is rated to operate without damage at the expeccea pear power levels. rut utLll=^ lkluuula=d carrier signal, peak power inherently exceeds the
( - 5 average power level. For a multi-carrier signal, peak signal values may be superimposed causing sum excursions with large peak-to-average values.
Typically, peak power is approximately ten times the 5 average power level but the amplifier circuits will be operating only at the average power levels more than 99% of the time.
According to another aspect of the present invention lo there is provided an amplifier wherein the bias is dynamically adjusted in accordance with a power component of a modulated carrier input to the amplifier. In particular, there is provided an amplifier wherein an amplitude component of a modulated 15 carrier input to the amplifier is integrated to generate a power level signal independently of amplification of the modulated carrier and the amplifier bias is dynamically adjusted in accordance with the power level signal. The amplitude component so is integrated as a function of time. This will vary the DC operating conditions of the amplifier transistor in order to optimise the transistor load-line characteristic and efficiency.
25 The amplifier bias is adjusted in accordance with a power function of the modulated carrier integrated over time. This has a statistical relationship to the probability of data being present and hence peak power.
In particular the amplifier bias is adjusted in so accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier. The bias is adjusted to maximise power output of the amplifier and, 35 in particular, to optimise the power output and e' ieilly ut tulle llLler.
- 6 - Additionally a variable attenuator may be included in the modulated carrier input to the amplifier. The modulated carrier is dynamically attenuated in accordance with a function of the specific heat 5 capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier. In particular the modulated carrier input is attenuated when the duration of the amplifier power output exceeds lo a predetermined time limit that if exceeded would induce thermal damage to the amplifier.
The feedback and feed-forward parameters are adopted dynamically to maximise linearity of the overall output 15 of the amplifier assembly and to maintain output power levels without excessive reductions in efficiency. In summary: a) The variable attenuator will reduce the
power presented to the amplifier should the duration of the power produced as a result of the modulated carrier so exceed a predetermined time limit that would cause junction damage in the amplifier. b) The dynamic bias adjustment functions to increase the supply voltage and base bias to the amplifier transistor when it is required to produce more output power. As the 25 transistor is operating in a non linear mode, its output impedance (load-line characteristic) will vary according to signal level so at certain input power levels the transfer of power will be less efficient than at others. (For maximum power transfer the source so impedance (transistor output) should equal the load impedance.) By varying the bias conditions the efficiency may be kept at a more constant level.
An amplifier assembly and its method of operating as 35 described above are particularly useful in multi channel telecommunications networks, ana especially Lit broadband and the so-called Third Generation (3G)
( networks. Typically, broadband networks such as 3G operate in the range 2.14 GHz to 2.17 GHZ with a channel bandwidth of 5 MHz. Typical power output of the amplifier is around 10 W per channel.
DESCRIPTION OF THE DRAWINGS
0 Figure 1 is an overall amplifier assembly block diagram according to the present invention.
Figure 2 is a spectral distribution diagram of a modulated carrier as presented at the input to the 15 amplifier system.
Figure 3 is a spectral distribution diagram of the output of the preamplifier stage.
20 Figure 4 is a spectral distribution diagram of the output of the summation circuit of the first loop.
Figure 5 is a spectral distribution diagram of the output of the first loop.
Figure 6 is a spectral distribution diagram of the modulated carrier as presented at the input to the amplifier stage.
so Figure 7 is a spectral distribution diagram of the output of the summation circuit of the second loop.
Figure 8 is a spectral distribution diagram of the output of the second loop.
- 8 Figure 9 is a spectral distribution diagram of the modulated carrier at the output of the amplifier system. 5 Figure 10 is a block diagram showing the amplifier stage split into its constituent sub-blocks.
DESCRIPTION OF THE INVENTION
With reference to Figure 1; The system comprises two distinct loops. The first loop is an arrangement and a method of pre-distorting the modulated carrier in order 15 to compensate for the non-linearities present in amplifier 012. The second loop is a feed-forward loop that compensates for the residual distortion present in the amplified modulated carrier after it has passed through amplifier 012.
Loopl The first loop comprises system components 001 to 011 and 021. A modulated carrier is presented at the input :5 to the amplifier system, as shown in Figure 2. The modulated carrier is then split by circuits 001 and 005 into three paths. Two of these three paths will be considered in the description of loopl.
so Path 1. The modulated carrier passes through coupler 001 and preamplifier 002. The pre-amplifier 002 will naturally introduce a distortion component to the modulated carrier, as shown in Figure 3. The modulated carrier then passes through coupler 003 before being 35 presented to a summation circuit 004 on input port (a).
Considering the modulated carrier spilt at coupler 00; the modulated carrier passes through variable
( attenuator 008 where it is presented to input port (b) on summation circuit 007. Circuits 003 and 008 may be considered to be linear, that is they introduce an insignificant level of distortion with respect to the s modulated carrier.
Path 2. The modulated carrier is split into two paths by coupler circuit 001 and then split by circuit 005.
From port (c) the modulated carrier then passes through 10 a variable phase shifter circuit 006 and is presented to input port (a) on the summation circuit 007. The variable attenuator 008 and variable phase shifter 006 are then adjusted by circuit 011 so that the resultant summed signal at the output of summation circuit 007 15 port (c) contains as little of the original modulated carrier as possible, and thus comprises mainly the distortion component introduced by pre-amplifier 002, as shown in Figure 4. Circuits 001, 005, 006 and 007 may be considered to be linear.
The distortion component present at the output of summation circuit 007 port (c), as shown in Figure 4, is then adjusted in phase and amplitude on passing through phase shifter circuit 009 and variable 25 amplifier circuit 010. Operation of phase shifter circuit 009 and variable amplifier circuit 010 is described below with reference to the second loop and the resultant signal is shown in Figure 5. On arriving at port (b) of summation circuit 004 the distortion So component is then summed with the modulated carrier and distortion component on port (a) of circuit 004. The result at port (c) is a modulated carrier with a distortion component of specific phase and amplitude as shown in Figure 6, which when passed through amplifier 35 012 will cancel the distortion component normally produced by amplifier 012 lo amber Ulna were presented with just the modulated carrier.
( 10 Loop 2.
5 At the output of amplifier 012 the modulated carrier will still contain a small distortion component that is a function of the dynamic cancellation of loop 1. The | modulated carrier and the distortion component is split | into two paths by coupling circuit 013. The modulated 10 carrier and the distortion component are linearly reduced in amplitude on passing through variable attenuator circuit 014 and presented to input port (b) of summation circuit 016.
15 Input port (a) of summation circuit 016 receives an i undistorted modulated carrier from the input, via circuit 005 port (b). Circuit 005 splits the modulated carrier that is then passed through the variable phase shifting circuit 015. The modulated carriers that are 20 present on ports (a) and (b) of summation circuit 016 are adjusted in phase (via variable phase shifting circuit 015) and magnitude (via variable attenuator circuit 014) so that the resultant signal at the output port (c) of summation circuit 016 contains the minimum 25 modulated carrier component and the maximum distortion component, as shown in Figure 7.
As shown in Figure 8 dynamic control circuit 021 then adjusts the phase via variable phase shifting circuit So 017 and magnitude via variable amplifier 018, of the resultant signal from port (c) of summation circuit 016. On re-combination via coupling circuit 019 with the signal present at the output of amplifier 012 the distortion component is reduced further, as shown in 35 Figure 9. Concurrently, circuit 021 adjusts the phase v.-.._ Ned. i_ i... r variable amplifier circuit 010, of the resultant signal
! from port (c) of summation circuit 007, as shown in Figure 5, so that on re-combination via summation circuit 004 with the signal present at the output of pre-amplifier 002 the distortion component is 5 dynamically opposed in phase and amplitude to the distortion components inherent in operation of the amplifier 012.
With reference to Figure 2; A composite modulated JO carrier signal fed from port (c) of summation circuit 004 is presented to port (a) of splitter 012a. Port (b) transmits a proportion of the modulated carrier to an integrator circuit 012b, which contains a method of detecting the amplitude component of the modulated Is carrier. This is then integrated and the bias of amplifier circuit 012d is adjusted to enable the amplifier 012 to produce the requisite power. Should the integrator 012b determine that the duration of the power produced by amplifier circuit 012d exceeds a 20 finite time limit that if exceeded will result in junction damage to amplifier circuit 012d, then the integrator 012b will reduce the power by attenuating the modulated carrier via variable attenuator circuit 012c, possibly as well as adjusting the amplifier bias.

Claims (1)

  1. An amplifier assembly including a pre-amplifier 5 having an input receiving an input modulated carrier and an output feeding an amplifier, wherein a first loop derives a distortion component from the output of the pre-amplifier and sums this distortion component with the modulated lo carrier output of the pre-amplifier before feeding the resultant summed signal to an input of the amplifier. 2. An amplifier assembly including a pre-amplifier having an input receiving an input modulated carrier and an output feeding an amplifier, wherein: (i) a first loop derives a distortion component from the output of the pre-amplifier and so sums this distortion component with the modulated carrier output of the pre amplifier before feeding the resultant summed signal to an input of the amplifier; and 25 (ii) a second loop derives a residual distortion component from the output of the amplifier and sums this residual distortion component with the input modulated carrier before feeding the resultant summed signal to an 30 output of the amplifier assembly.
    An amplifier assembly as claimed in Claims 1 or 2
    wherein the resultant summed signal of the or each loop comprises mainly the distortion component 35 relative to the modulated carrier.
    4. An amplifier assembly as claimed in any one of the preceding claims wherein the first loop generates distortion signals dynamically opposed in phase and amplitude to the distortion components 5 inherent in operation of the amplifier.
    5. An amplifier assembly as claimed in any one of Claims 2 to 4 wherein the output of the second loop cancels distortion signals generated by the lo first loop.
    6. An amplifier assembly as claimed in Claim 5 including a variable amplifier and a phase shifter in the respective output paths of each loop, 15 wherein the variable amplifiers and phase shifters are dynamically controlled in accordance with an output signal of the second loop.
    An amplifier assembly as claimed in Claim 6 so wherein the variable amplifiers and phase shifters are dynamically controlled in accordance with the level of distortion present in the second loop.
    8. An amplifier assembly as claimed in any one of the 25 preceding claims wherein the first loop comprises: (a) a summation circuit including two inputs; (b) a supply path from before the input of the pre-amplifier to an input of the summation circuit; and 30 (c) a further supply path from the output of the pre-amplifier to a second input of the summation circuit; the phase and amplitude of the signals on the two supply paths being dynamically controlled in 35 accordance with an output signal of the summation circuit.
    ( - 14
    9. An amplifier assembly as claimed in any one of Claims 2 to 8 wherein: (i) the second loop comprises: (a) a summation circuit including two 5 inputs; (b) a supply path from before the input of the pre-amplifier to an input of the summation circuit; and (c) a further supply path from the output of lo the amplifier to a second input of the summation circuit; the phase and amplitude of the signals on the two supply paths being dynamically controlled in accordance with an output signal of the summation 15 circuit; and wherein (ii) the first and second loops each include a variable amplifier and a phase shifter in the outputs of the respective summation circuits, and the variable amplifiers and phase shifters are so dynamically controlled in accordance with an output signal of the summation circuit of the second loop.
    10. An amplifier wherein the bias is dynamically is adjusted in accordance with a power component of a modulated carrier input to the amplifier.
    An amplifier wherein an amplitude component of a modulated carrier input to the amplifier is 30 integrated to generate a power level signal independently of amplification of the modulated carrier and the amplifier bias is dynamically adjusted in accordance with the power level signal. 3s
    12. An amplifier as claimed in Claims 10 or 11 wherein the bias is adjusted to maximise power output of the amplifier.
    5 13. An amplifier as claimed in Claims 10 or 11 wherein the bias is adjusted to optimise the power output and efficiency of the amplifier.
    14. An amplifier as claimed in any one of Claims 10 to lo 13 wherein the bias is adjusted in accordance with a function of the power input to the amplifier integrated over time.
    15. An amplifier as claimed in Claim 14 wherein the 15 bias is adjusted in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier.
    16. An amplifier as claimed in any one of Claims 10 to 15 additionally including a variable attenuator in the modulated carrier input to the amplifier.
    25 17. An amplifier as claimed in Claim 16 wherein the modulated carrier is dynamically attenuated in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data so occurrence in the modulated carrier input to the amplifier. 18. An amplifier as claimed in Claim 17 wherein the modulated carrier input to the amplifier is 35 attenuated when the duration of the amplifier power output exceeas a preuecelu cl lit
    which would induce thermal damage to the amplifier. 5 19. An amplifier assembly as claimed in any one of Claims 1 to 9 including an amplifier as claimed in any one of Claims 10 to 18.
    20. An amplifier assembly as claimed in any one of Claims 1 to 9 substantially as described and with reference to the accompanying drawings.
    21. A method of operating an amplifier assembly including a pre-amplifier having an input 15 receiving an input modulated carrier and an output feeding an amplifier, wherein a first loop derives a distortion component from the output of the pre amplifier and sums this distortion component with the modulated carrier output of the pre-amplifier 20 before feeding the resultant summed signal to an input of the amplifier.
    22. A method of operating an amplifier assembly including a pre-amplifier having an input 25 receiving an input modulated carrier and an output feeding an amplifier, wherein: (i) a first loop derives a distortion component from the output of the pre-amplifier and sums this distortion component with the so modulated carrier output of the pre amplifier before feeding the resultant summed signal to an input of the amplifier; and (ii) a second loop derives a residual distortion 35 component from the output of the amplifier and sums this residual distortion component with the input modulated carrier before
    ( feeding the resultant summed signal to an output of the amplifier assembly.
    23. A method of operating an amplifier assembly 5 wherein the amplifier bias is dynamically adjusted in accordance with a power component of a modulated carrier input to the amplifier.
    24. A method of operating an amplifier assembly lo wherein an amplitude component of a modulated carrier input to the amplifier is integrated to generate a power level signal independently of amplification of the modulated carrier and the amplifier bias is dynamically adjusted in 15 accordance with the power level signal.
    25. A method of operating an amplifier assembly as claimed in Claims 23 or 24 wherein the bias is adjusted in accordance with a function of the so power input to the amplifier integrated over time.
    26. A method of operating an amplifier assembly as claimed in Claim 25 wherein the bias is adjusted in accordance with a function of the specific heat 25 capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier. so 27. A method of operating an amplifier assembly as claimed in Claims 23 or 24 wherein the modulated carrier is dynamically attenuated in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the 35 statistical probability of data occurrence in the modulated carrier input to the amber.
    / 28. A method of operating an amplifier assembly as claimed in Claim 27 wherein the modulated carrier input to the amplifier is attenuated when the duration of the amplifier power output exceeds a 5 predetermined time limit which would induce thermal damage to the amplifier.
    29. A method of operating an amplifier assembly as claimed in Claims 21 or 22 wherein the amplifier lo bias is dynamically adjusted in accordance with a power component of a modulated carrier input to the amplifier.
    30. A method of operating an amplifier assembly as is claimed in Claims 21 or 22 wherein an amplitude component of a modulated carrier input to the amplifier is integrated to generate a power level signal independently of amplification of the modulated carrier and the amplifier bias is 20 dynamically adjusted in accordance with the power level signal.
    31. A method of operating an amplifier assembly as claimed in Claims 29 or 30 wherein the bias is _ 25 adjusted in accordance with a function of the power input to the amplifier integrated over time.
    32. A method of operating an amplifier assembly as claimed in Claim 31 wherein the bias is adjusted 30 in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier. 33. A method of operating an amplifier assembly as claimed in Claims 29 or 30 wherein the modulated
    carrier is dynamically attenuated in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the 5 modulated carrier input to the amplifier.
    34. A method of operating an amplifier assembly as claimed in Claim 33 wherein the modulated carrier input to the amplifier is attenuated when the lo duration of the amplifier power output exceeds a predetermined time limit which would induce thermal damage to the amplifier.
GB0225459A 2002-11-01 2002-11-01 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection Withdrawn GB2395077A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB0225459A GB2395077A (en) 2002-11-01 2002-11-01 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection
AU2003271959A AU2003271959A1 (en) 2002-11-01 2003-10-14 Amplifier assembly
PCT/GB2003/004462 WO2004040751A1 (en) 2002-11-01 2003-10-14 Amplifier assembly
GB0325306A GB2396498A (en) 2002-11-01 2003-10-30 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0225459A GB2395077A (en) 2002-11-01 2002-11-01 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection

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GB0225459D0 GB0225459D0 (en) 2002-12-11
GB2395077A true GB2395077A (en) 2004-05-12

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GB0325306A Withdrawn GB2396498A (en) 2002-11-01 2003-10-30 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection

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CN115808614B (en) * 2023-02-09 2023-05-16 四川省华盾防务科技股份有限公司 Power amplifier chip thermal performance monitoring method, system and storage medium

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AU2003271959A1 (en) 2004-05-25
GB0325306D0 (en) 2003-12-03

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