GB2354139A - Signal processor - Google Patents

Abstract

A digital signal processor has an input for receiving a digital input signal e.g. an audio signal, a multiplier (24) having first and second input ports and an output port and first and second channels (I and II) coupling the input to respective input ports of the multiplier. The second channel II has an envelope detector (4), first and second digital circuits (TC1, TC2) each coupled to the said envelope detector (4) and each defining attack and release time constants, and a differencer (16) for forming the difference between the outputs of the first and second circuits. The output of the differencer is coupled, possibly via effects control (18,20), to the first input port of the multiplier 24. A controller (12,14) controls at least one of the attack and release time constants of at least one of the first and second circuits. The first channel I couples the input to the second input port of the multiplier and has a delay (30) corresponding to the delay incurred by the digital signal in the second channel.

Description

1 2354139 SIGNAL PROCESSOR The present invention relates to signal

processors. Embodiments of the invention relate to audio signal processors for controlling the dynamics of audio signals.

It is known to control the dynamics of an audio signal. Such control includes:

a) controlling the dynamic range of the signal; i.e. compression and/or expansion of the dynamic range; b) controlling the time constants to set desired "attack" and "release" times; C) controlling other factors as is known in audio signal processing.

The dynamics are controlled to provide a desired subjective sound quality. In some circumstances, such as recording and reproducing classical music, the dynamics are controlled so that the reproduced signal has a subjective quality which is a faithful reproduction of the original music. In other circumstances, such as the recording and reproduction of 'pop' music, the dynamics may be controlled to provide an artificial sound quality.

The dynamic range of an audio signal may be controlled to fit the dynamic range of a recording and/or transmission channel such as an FM radio channel.

The present invention concerns the creation of transients to modulate a signal in a simple manner and with precise control.

According to the present invention, there is provided a digital signal processor having an input for receiving a digital input signal, a multiplier having first and second input ports and an output port, first and second channels coupling the said input to respective input ports of the multiplier, the second channel having an envelope detector for detecting the envelope of the input signal, first and second circuits each coupled to the said envelope detector and each defining attack and release time constants, and a differencer for forming the difference between the outputs of the first and second circuits which difference is coupled to the first input port of the multiplier, and control means for controlling at least one of the attack and release time constants of at least one of the first and second circuits, the first channel coupling the said input 2 to the second input port of the multiplier and having a delay corresponding to the delay incurred by the digital signal in the second channel.

The digital signal processor of the invention allows precise control. The time constant circuits, being digital, can be precisely designed to provide a desired relationship between them. Thus, for example, the two digital time constant circuits are designed to provide identical characteristics, but one of them has, for example, an ad ustable attack time. That cannot be done using analogue filters due to tolerances in components and drift of component values with time and/or temperature. Furthermore, the digital delay provides a precisely controlled delay, again something which is not achievable in the analogue domain. The control of at least one of the said time constants is achieved simply and precisely. By controlling e.g. the attack time constant of one circuit to be different from that of the other, produces a transient difference at the out put of the differencer when there is a leading change in input signal level. The transient difference is applied to the multiplier to transiently change the gain of the first channel. This can be used to transiently enhance or reduce the change in signal level of the input signal. The transient difference may be applied to the multiplier via signal modifiers such as an amplifier and/or a compander.

In a preferred embodiment of the invention, the controller controls the attack time constant of one of the time constant circuits: the release time constants of both circuits are identical and fixed. This allows a single control for use by the operator: thus control is simple for, and easily understood by, the operator. The control is used for example to enhance or reduce leading transient changes in the input signal. The identical release time constants cause the transient gain to return to the long term gain level of the input signal over a period of time defined by the release time constant.

Thus the long term gain of the signal is substantially unchanged by the signal processor.

In a most preferred embodiment, the transient difference signal is applied to the multiplier via an "effects" control. This control is a multiplier which multiplies the difference signal by an effects signal having a value which ranges between a negative value through zero to a positive value. Thus the effect of the difference signal on the input signal may be to enhance a transient change if the effects signal is positive, 3 reduce the transient if the effects signal is negative, or to nullify the difference signal if the effects signal is zero. Thus a simple easily understood control is provided to produce a variety of effects.

In another embodiment, one of the release time constants is controlled and the attack time constants are fixed and equal. This embodiment thus provides a similar effect to the preferred embodiment but effects trailing transient changes of the input signal.

In other possible embodiments, both the attack and the release time constants of one of the time constant circuits may be controlled. In yet further possible embodiments, other combinations of attack and release time constants may be subject to control. However such other embodiments are not currently preferred because they are more complex.

The invention is preferably applied to audio signals.

For a better understanding of the present invention, reference will now be made by way of example, to the accompanying drawings, in which:

Figure I is a block diagram of an audio signal processor according to an illustrative embodiment of the invention.

Figure 2A to F are schematic waveform diagrams illustrating the operation of the processor of Figure 1.

Referring to Figure 1, an analogue audio signal, from a source such as a microphone, is fed to an analogue to digital converter 2. The digital audio signal produced by the converter 2 is applied via first and second channels I and II to first and second input ports of a digital multiplier 24. The output signal of the multiplier is applied via a gain stage 26 to a digital to analogue converter 28. The first channel 1.

includes a digital delay element 30 which delays the digital audio signals by the same amount as the delay incurred in the second channel II.

The second channel Il provides a control signal which modulates the gain of the audio signal in the first channel I in response to changes in signal level of the input signal. By way of explanation, and referring to Figures 2A and C, consider an input audio signal having an envelope VrB as shown in Figure 2A. In this example, it is 4 desired to accentuate the leading edge of transient changes in the envelope as indicated by En in Figure 2C.

It will be appreciated that Figure 2 shows a simplified signal for the purpose of illustrating the invention and that such a signal may not be a typical audio signal.

The second channel H comprises an absoluting circuit 4. The input signal of Figure 2A is a bipolar signal WB. The absoluting circuit converts the input signal to unipolar form WU shown in Figure 2B. It is followed by a logarithmic converter 6 which converts the unipolar envelope signal VVU to logarithmic form.

The log envelope signal is applied to a processing circuit 32 which will be described below. The processed signal produced by the circuit 32 is applied, preferably via an "effects control" 18, 20, to an anti-log converter 22 which outputs the control signal to the multiplier 24. The effects circuit 18, 20 will be described herein below.

The processing circuit 32 will now be described.

The processing circuit 32 comprises: a differencing circuit 16; two time constant circuits TCl, (8) and TC2, (10) both connected to receive the envelope signal WU from the log converter 6, and having outputs connected to respective inputs of the differencing circuit 16; an attack control circuit having an attack control knob 12, an adder 11 and a circuit 9 defining a reference value VALA of the attack time constant; and a release control circuit 14 having a release control knob 14, an adder 15 and a circuit 13 defining a reference value VALR of the release time constant.

The time constant circuits 8 and 10 define attack and release time constants, where the attack time constant defines the response time of the circuit to a leading edge of the input signal, and the release time constant defines the response of the circuit to a trailing edge.

First Embodiment In a first embodiment, the attack time constant of only one of the circuits 8 and is controlled; the release time constants are fixed.and identical. In this example the attack time constant of the time constant circuit TC2 (10) is fixed at the reference value VALA and the release time constants of both circuits are fixed at VALR. The fixed time constants of circuit TC2 are chosen to faithfully follow the input signal envelope WU with minimal distortion.

In the first embodiment, the circuits 8 and 10 are physically identical and, in the absence of variation of the values VALA and VALR, functionally identical in that 5 they have identical attack and release time constants.

When the circuits 8 and 10 have identical attack and release time constants, the output of the differencing circuit 16 is zero. The gain of the multiplier 24 is then unity, and thus the audio signal at the output of the first channel I is unchanged.

The attack control knob 12 is used to manually vary the reference value VALA by adding (11) to it a control value dependent on the rotation of the knob 12. The attack time constant of the first circuit TC1 (8) connected to the input of the differencing circuit 16, is then different to the attack time constant of the first circuit TC1 (8) for a period of time until the release time constant takes effect. During that period of time the differencer produces a non-zero output. The output of the differencer 16 is applied to the multiplier 24. Because of the delay 30 the non-zero output of the differencer derived from the leading edge of the input signal in the second channel Il coincides with the same leading edge in channel I at the multiplier and is used to change that leading edge: in Figure 2C it enhances that leading edge.

By way of'further explanation attention is invited to Figures 2D, E and F.

Figure 2D shows schematically the impulse response of the time constant circuits M and TC2 for the first embodiment. Both have the same fixed release time constant dfined by VALR. TC2 has a fixed attack time constant defined by VALA. By operation of the attack control knob 12, the attack time constant of TC1 is varied as shown by the dotted line and the arrow in Figure 2D. Figure 2E shows a simplified envelope signal WU in solid lines. The second time constant circuit TC2 is set up so that its output faithfully follows the envelope WU. The attack time constant of TCl is different to VALA and so for a period of time dependent on the setting of the control knob 12, the response of TC I to the leading edge L differs from that of TC2. The output of TC1 is shown in Figure 2D by the dashed line. Once the release time constant of TC1 takes effect, the two circuits have identical outputs. Thus the differencer produces the output shown in Figure 2F. Assuming the compander 18, 20 6 is absent the output shown in Figure 2F is applied to the multiplier 24 and modulates the digital audio signal to accentuate the leading edge as shown in Figure 2C.

It will be appreciated that to ensure the leading edge is accentuated, the delay 30 must provide the appropriate time delay so the leading edge of the audio signal of 5 Figure 2A coincides in time with the signal of Figure 2D.

Second Embodiment The second embodiment differs from the first embodiment in that the release time of one M of the time constant circuits TC1 and TC2 (8 and 10) is controlled whilst the attack time constants of both circuits are fixed at VALA. The release control knob 14 varies the reference release time constant VALR by means of the adder 15. The effect is on the trailing edge of the input signal and is similar to that of the first embodiment.

7"hird Embodiment In this embodiment, the attack time constant control knob 12 manually controls the attack time constant of the time constant circuits M and the release control knob 14 controls the release time constant of the circuit TCL The release and attack time constants of the circuit TC2 are fixed at VALR and VALA respectively.

Effects Control An effects dontrol circuit 18, 20 may be provided. It is a preferred feature of embodiments of the invention. A multiplier 18 is provided in the second channel 11 between the differencing circuit and the anti-log converter 22. A control 20 provides to the multiplier 18 a signal of value in the range -X< 0 < +Y. X and Y may be unity for example but could be any suitable value. Assume X and Y are unity. Thus if the control 20 is set to O< Y< +1 then the output of the differencing circuit enhances leading edges as shown in Figure 2C. If the control is set to 0 > X> -1 then leading edges are reduced. If the control 20 is set to zero, the differencing circuit has no effect on the signal in channel I.

Modiflcations Various modifications may be made to the signal processor of Figure 1, as described above. The absoluting circuit may be a full or half wave rectifier. The log and antilog circuits could in principle be omitted 7 The attack control 12 may control the time constant circuit 10 connected to the plus input of the differencing circuit 16. This would produce an effect opposite to that of the first embodiment.

Although the invention has been described with reference to audio signals it 5 may be applied to other types of signal.

The differnce signal produced by the differencing circuit 16 may be modified before being applied to the multiplier 24. For example the difference signal may be subject to a gain and/or other signal modification stage.

The channel II may be incorporated into a dynamics control channel of an 10 audio signal processor.

The embodiments of the invention have been described above by way of example to a block diagram of a digital signal processor. The elements of the processor may be implemented by software in a programmable digital signal processor. Thus "circuits" and other elements of the embodiments may be defined by 15 a combination of hardware and software.

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Claims (15)

1. A digital signal processor having an input for receiving a digital input signal, a gain controller having first and second input ports and an output port, first and second channels coupling the said input to respective inputs of the gain controller, the second channel having an envelope detector for detecting the envelope of the input signal, first and second means defining time constants each coupled to receive the said envelope of the input signal and each defining attack and release time constants, a differencer for forming the difference between the outputs of the first and second circuits coupled to the first input of the gain controller, and control means for controlling at least one of the attack and release time constants of at least one of the first and second circuits, the first channel coupling the said input to the second input of the gain controller and having a delay corresponding to the delay incurred by the digital signal in the second channel.

2. A processor according to claim 1, wherein the control means defines desired relationships between the attack and release times of the time constant circuits.

3. A processor according to claim 1 or 2, wherein the control means is arranged to control the attack time constant of one of the said circuits.

4. A processor according to claim 3, wherein the release time constants of the two circuits are substantially identical.

5. A processor according to claim 4, wherein the release time constants of the two circuits are fixed.

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6. A processor according to claim 1 or 2, wherein the control means is arranged to control the release time constant of one of the said circuits.

7. A processor according to claim 6, wherein the attack time constants of 5 the two circuits are substantially identical.

8. A processor according to claim 7, wherein the attack time constants of the two circuits are fixed.

9. A processor according to any preceding claim, wherein the control means comprises a first controller for controlling the attack time constant of at least one of the circuits, and a second controller for controlling the release time constant of at least one of the circuits.

10. A processor according to any preceding claim, further comprising means for multiplying the difference signal by an effects control signal which controls the effect of the difference signal on the input signal.

11. A processor according to claim 10, wherein the control signal has a value in the range -X< 0 < +Y.

12. A processor according to claim 11, wherein X=Y=1.

0 A processor according to any preceding claim, wherein the second channel comprises a dynamic range control circuit for adjusting the dynamic range of the difference signal and comprising a further multiplier having a first input coupled to the differencer, and a second input for receiving a dynamic range control signal, and an output coupled to the first input port of the first-mentioned multiplier.

14. A processor substantially as hereinbefore described with reference to Fioure 1.

CP

15. An audio signal processor according to any preceding claim.