GB2351210A - Processing digital bitstreams - Google Patents

Processing digital bitstreams Download PDF

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Publication number
GB2351210A
GB2351210A GB9909893A GB9909893A GB2351210A GB 2351210 A GB2351210 A GB 2351210A GB 9909893 A GB9909893 A GB 9909893A GB 9909893 A GB9909893 A GB 9909893A GB 2351210 A GB2351210 A GB 2351210A
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United Kingdom
Prior art keywords
data
memory block
memory
block
atm
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GB9909893A
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GB9909893D0 (en
Inventor
Charles Cartwright
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Synamedia Ltd
Ericsson Television AS
Original Assignee
NDS Ltd
Tandberg Television AS
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Priority to GB9909893A priority Critical patent/GB2351210A/en
Publication of GB9909893D0 publication Critical patent/GB9909893D0/en
Publication of GB2351210A publication Critical patent/GB2351210A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782Interleaver implementations, which reduce the amount of required interleaving memory
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention relates to an apparatus for processing a data stream made up of a plurality of cells each including block-interleaved data from one of a plurality of inputs. The apparatus comprises a plurality of memory blocks 63 and a memory controller 61 for temporarily allocating one or more memory blocks so that data may be written into the allocated block or blocks and data from a full memory block may be read out and applied to a following Reed-Solomon decoder 46. A stream identifier identifies the identity of the input to which each cell belongs. The status i.e full or otherwise of each memory block is monitored by a monitor 62. The present invention relates to the field of digital broadcasting and is concerned with receiving and deinterleaving multiple transport streams transmitted using ATM in an efficient manner.

Description

2351210 - 1 A METHOD AND APPARATUS FOR PROCESSING DIGITAL BITSTREAMS
The present invention relates to the field of digital broadcasting, and more particularly, to the reception of multiple digital transport streams.
In a conventional digital broadcasting system, a number of elementary data streams, such as video, audio or subtitle bitstreams, are transmitted in the form of a digital transport stream. The elementary data streams may also be associated with other elementary data streams in the transport stream. For example, a video elementary data stream will generally be associated with at least one audio and subtitle elementary data stream. A transport stream provides a mechanism for packaging together multiple elementary data streams in a robust and efficient manner. Further details on the structure of transport streams may be found in the Moving Picture Experts Group (MPEG-2) standard.
In conventional digital broadcasting systems, transport streams are generally transmitted over a network, such as a satellite, terrestrial or microwave network. A receiver receives the transmitted transport stream and filters off a single elementary video data stream for decoding. Additional data streams associated with the video data stream, such as audio or subtitles, may also be filtered off and decoded accordingly.
There is now increased demand for transmitting transport streams using, for example, Asynchronous Transfer Mode (ATM). ATM is a packetised data protocol which allows data to be transferred at high data rates (in excess of 155Mbg). ATM defines a number of different adaptation layers which define specific characteristics of ATM. One particular ATM adaptation layer, AAL1, requires the data in ATM packets (known as ATM cells) to be block interleaved and Reed-Solomon encoded before transmission. At a receiver, the block-interleaved data must be de-interleaved and Reed-Solomon decoded to reproduce to the original data sequence.
In order to de-interleave block-interleaved data two de-interleaving memories (or matrices) are required, so that block-interleaved data can be read into one matrix whilst de-interleaved data is being read out of the other. A block of data can only be de-interleaved once a de-interleave matrix is full.
Figure 1 is a diagram of an overview of a typical ATM system. ATM provides a flexible way of multiplexing both individual data streams and previously multiplexed data streams. Figure 1 illustrates a number of ways in which ATM streams can be constructed. A number of individual data streams 10 are fed to an ATM multiplexer (more commonly known as a switch) 11 which produces an ATM cell stream 12. A number of additional ATM cell streams 13 may also be input to a ATM multiplexer 14 to produce a number of ATM cell streams, two of which are shown at 15 and 16. Each of the output streams 15 and 16 may contain a combination of data from some or all of the input data streams, depending on the configuration of the multiplexers (or switches) 11 and 14.
Figure 2 is a diagram showing an ATM cell stream in detail. An ATM cell stream comprises a sequence of ATM cells 20. Each cell comprises a header 21 and a payload 22. As shown in Figure 1, an ATM cell stream comprises a sequence of cells each of which contains data from any one of the input streams.
The source data is processed into ATM cells in the follow manner: 124 bytes of the source data and an additional 4 bytes of Reed-Solomon coding bytes are combined to form a 128 byte block. 47 of these 128 byte blocks are written into an interleaver matrix column by column. Once the matrix is full, each row (comprising 47 bytes) is read out row by row. An additional byte is placed at the start of each row of 47 bytes, and these 48 bytes form the payload of an ATM cell. Block interleaving and ReedSolomon coding help reduce the effects of burst and other interference on the transmitted data.
At a receiver, the interleave process is reversed. The additional byte inserted during the interleave process is removed, and the remaining 47 bytes of the payload are written into a de-interleaver matrix row by row. Once all of the original 47 byte rows have been written in the deinterleaver matrix (and the de-interleaver matrix is full), the data is read out column by column to restore the order of the original source -3data. The de-interleaved data may then be fed to a Reed-Solomon decoder if required.
Figure 3 is a diagram showing a system for de-interleaving a single cell stream. An ATM cell stream 30, which may comprise a plurality of blockinterleaved transport streams, is input to a filter 31. The filter 31 is able to split out some or all of the individual cell streams to provide a single cell stream 38. The cell stream 38 is fed to a de-interleaver 32, which comprises a pair of de-interleaving matrices (or memories) 34 and 35. The de-interleaver 32 de-interleaves the cell stream 38 to produce a deinterleaved data stream 36. The data stream 36 is then processed by a ReedSolomon decoder 33 where the data stream 36 is forward error corrected, to reproduce the original transport stream 37. As stated above, the de-interleaver 32 comprises two de-interleaving matrices 34 and 35. Block de-interleaving can only take place once a de-interleaving matrix is full. Therefore, as one de-interleaving matrix is being filled with data, the other de-interleaving matrix can be read out in deinterleaved form to the Reed-Solomon decoder. In operation, one matrix is having data written to it, the other having data read from it. The matrices are then swapped over, and the newly filled matrix is read out to the Reed-Solomon decoder, and the newly emptied matrix is filled with new data from ATM cells.
Receiving individual transport streams transmitted using ATM is well known and requires a pair of de-interleaving matrices and a Reed-Solomon decoder. The ReedSolomon decoder is used to apply forward error correction to the de-interleaved data. Problems arise, however, when receiving multiple transport streams over ATM.
Accordingly, one object of the present invention is to overcome the problems of the prior art, and to provide a system for de-interleaving multiple transport streams in an efficient manner.
According to a first aspect of the present invention there is provided a method of processing a data stream made up of a plurality of cells, each cell including blockinterleaved data from one of a plurality of inputs, the method comprising the steps of: temporarily allocating a memory block from a plurality of available memory blocks to -4an input; writing data from the/each input into a respective allocated memory block; and reading data from a full memory block to reproduce one of said plurality of inputs.
One advantage of this is that the amount of hardware required to receive multiple block-interleaved streams is reduced. A further advantage is that a varying number of streams can be received providing that the total bitrate of transport streams is not greater than the bitrate at which the Reed-Solomon decoder runs.
According to a second aspect of the present invention there is provided apparatus for processing a data stream made up of a plurality of cells, each cell including blockinterleaved data from one of a plurality of inputs, the apparatus comprising: a memory manager for temporarily allocating a memory block from a plurality of available memory blocks to an input; a processor for writing data from each input into a respective allocated memory block and for reading data from a full memory block to reproduce one of said plurality of inputs.
The invention will now be described, with reference to the accompanying drawings, in which:
Figure 1 is a diagram of an overview of a typical asynchronous transfer mode (ATM) system; Figure 2 is a diagram showing an ATM cell stream in detail; Figure 3 is a diagram of an ATM de-interleaving system for deinterleaving a single ATM cell stream; Figure 4 is a diagram of an one embodiment of the present invention; Figure 5 is a diagram of the embodiment of Figure 4 in greater detail; and Figure 6 is a flow diagram showing the operation of the memory controller of Figure 4.
To receive multiple transport streams based on the method of receiving a single transport described above would require a pair of de-interleaving matrices and a Reed-Solomon decoder for each transport stream. For N transport streams, 2N deinterleaver matrices and N Reed-Solomon decoders are required.
One disadvantage of the above method is that Reed-Solomon decoders are expensive. A further disadvantage of this method is that, since a large number of transport streams may be transmitted via ATM, a certain amount of redundancy needs to be built into such a system. For example, if the capacity of an ATM network allows up to 50 transport streams to be transmitted, a receiver system would ideally require 50 de-interleavers (therefore 100 de-interleaving matrices) and 50 ReedSolomon decoders to cope with the maximum capacity. However, such an ATM system might rarely be used at its theoretical maximum capacity, leaving a large amount of redundancy.
The present invention provides a method and apparatus for receiving and deinterleaving multiple transport streams, which requires only a single Reed-Solomon decoder and substantially less de-interleaving matrices.
In a system having a single Reed-Solomon decoder and receiving N transport streams via ATM, N de-interleaving matrices could become full simultaneously and therefore more than one de-interleaving matrix might need to be supplied to the Reed-Solomon decoder at the same time. This is due to the lack of synchronisation between each of the N streams. The Reed-Solomon decoder would therefore have to decode not one deinterleaving matrix while the other matrix fills up (as in the single stream operation) but N de-interleaving matrices. During this time, a further N blocks may have filled up. This problem is compounded since the receiver has no control over the number or bitrate of transport streams it receives.
The bitrate range for a single transport stream,BSN, may be defined as:
0 < BSN 5 ATM - MAX - FLOW - RA TE For multiple transport streams, the total combined bitrate of all transport streams, BSt,,t.1, may be defined as:
N BSN:- BS,,,,, -:! A TM _ MAX FLO W RA TE I - - Where ATM MAX FLOW RATEis the maximum flow rate of an ATM network, and N is the number of input transport streams.
Each transport stream therefore requires N de-interleaving matrices The minimum number of de-interleaving matrices is therefore ti. For a large number of transport streams, the number of de-interleaving matrices quickly becomes large as N increases.
The present invention aims to improve the management and use of deinterleaving matrices to substantially reduce their number whilst still using a single ReedSolomon decoder. The present invention uses a system of 'floating' memory blocks which can be allocated and de-allocated to individual cell streams as required.
Figure 4 is a diagram of an overview of one embodiment of the present invention. An ATM stream 30 comprising a plurality of cell streams is fed to a filter 31 which can remove any cells from unwanted cell streams. An output 38 from the filter 31 passes the desired cell streams to a memory controller and memory module 41. The memory controller and memory module 41 block de-interleaves each of the cell streams to produce a deinterleaved data stream 46. Data stream 46 is then input to a ReedSolomon decoder 42 which forward error corrects the data stream to produce an output stream 44. The Reed-Solomon decoder 42 is capable of operating at a bitrate greater or equal to the sum of the bitrates of all the cell streams to be received. The output stream is made of up de- interleaved data from each of the selected input streams. This stream could then be further processed by a stream processor (not shown) to convert this stream into a transport stream, individual elementary streams, or other data streams as required.
The memory controller and memory 41 comprises a number of memory blocks (not shown) each of which can be used as a de-interleaving matrix. Each of the memory blocks is capable of storing data in such a way that it may be read out in a deinterleaved format as described above.
Figure 5 is a diagram showing the memory controller 41 in greater detail. A plurality of cells from each individual block-interleaved stream are presented to a stream identifier 60. The stream identifier determines the identity of the input to which each cell belongs. The cell data and its identifier are then input to a memory controller 61. Each time data from a cell stream is received, the memory controller functions as shown in the flow diagram of Figure 6. A number of memory blocks 63 are available for use as de-interleaving blocks. Each of the memory blocks can be assigned a status of 'free', 'in use', or 'full'. The status of each memory block is maintained by a memory block status monitor 62. When a memory block 63 has a 'full' status, the data in that memory block is fed to the Reed-Solomon decoder 42. That memory block is then allocated a 'free' status.
The operation of the memory controller 61 will now be described with reference to Figure 6. When a cell from a cell stream arrives (step 50), the memory controller 41 determines (step 51) whether cells from that particular cell stream already have a memory block allocated. If no memory block has been allocated for cells from that cell stream, or if a memory block allocated for cell from that cell stream has a 'full' status, a memory block having a 'free' status is allocated (step 52) and the status of that memory block is changed to 'in use'. Data from cells is then stored in their respectively allocated memory blocks (step 53). If a memory block is determined as being full (step 54) the status of the memory block is changed to 'full' (step 55). The data in a full memory block is then available to be read out by the Reed-Solomon decoder (step 56). Once the data has been read out of the memory block the memory block is allocated a 'free' status (step 57).
One advantage of the present invention is that the number of deinterleaving blocks needed is only 2N + C, for N channels, where 2N + C << R.
C is an additional number of de-interleaving blocks required to take account of high frequency variation 0itter) in the arrival of cells over the ATM network. Jitter is the variation in time it takes each individual cell to pass from a transmission station to a receiver station. In ATM this is also known as cell delay variation (CDV). The number C of additional de-interleaving blocks depends on the bitrate of the system, the -8speed at which the memory blocks can be emptied (e.g. the speed of the ReedSolomon decoder) and the C13V. If, for example, half of the available 2N memory blocks become full simultaneously, the remaining memory blocks might be filling whilst the full blocks are being emptied. However, because of CM, it is possible that one or more of the blocks might fill early, before the other blocks have been emptied. In this situation, there would not be any extra memory blocks available for filling which would result in data loss. Increasing the rate at which memory blocks are emptied, by increasing the speed of the Reed-Solomon decoder, can reduce the number of C additional de-interleaving blocks. C can be approximated to:
C, M. R where: M = Cell Delay Variation (CDV) R = cell rate (cells per second) With an ATM cell rate of around 150Mbit91, a typical value of CDV is between 1 and 3 ms and the cell rate R is around 11360ps, thus C can be determined as:
C,:t; 3 x 10-3 X 1 360 X 106 C -- 9 C may be chosen to be larger than the derived value, to add extra integrity to the system.
For an example system of 30 transport streams, a system according to the present invention would only require 69 memory blocks (2N + C), whereas a conventional system would require 900 memory blocks (a). The present invention therefore provides a significant advantage over the prior art.
The invention is described above with reference to ATM. It would, however, be apparent to those skilled in the art that the techniques described above could equally be used in other situations in the reception of blockinterleaved data.

Claims (14)

-gCLAIMS
1. A method of processing a data stream made up of a plurality of cells, each cell including block-interleaved data from one of a plurality of inputs, the method comprising the steps of: temporarily allocating a memory block from a plurality of available memory blocks to an input; writing data from theleach input into a respective allocated memory block; and reading data from a full memory block to reproduce one of said plurality of inputs.
2. The method of claim 1, wherein the step of temporarily allocating a memory block further comprises allocating a memory block until the data therein has been read out.
3. The method of claims 1 or 2, wherein the step of temporarily allocating a memory block further comprises selecting a memory block from a bank of 2N + C available memory blocks, where N is the number of inputs, and where 2N + C is less than ft
4. The method of claims 1, 2 or 3, wherein the step of allocating a memory block comprises allocating a memory block of predetermined size.
5. The method of any of claims 1 to 4, further comprising supplying the block interleaved data in Reed-Solomon encoded form.
6. The method of claim 5, further comprising passing a reproduced input through a Reed-Solomon decoder.
7. Apparatus for processing a data stream made up of a plurality of cells, each cell including block-interleaved data from one of a plurality of inputs, the apparatus comprising: a memory manager for temporarily allocating a memory block from a plurality of available memory blocks to an input; -10a processor for writing data from each input into a respective allocated memory block and for reading data from a full memory block to reproduce one of said plurality of inputs.
8. The apparatus of claim 7, wherein the memory manager temporarily allocates a memory block until the data therein has been read out.
9. The apparatus of claims 7 or 8, wherein the memory manager temporarily allocates a memory block from a bank of 2N + C available memory blocks, where N is the number of inputs, and where 2N + C is less than R.
10. The apparatus of claims 7, 8 or 9, wherein the memory manager allocates a memory block of predetermined size.
11. The apparatus of any of claims 7 to 10, wherein the block-interleaved data is supplied in Reed-Solomon encoded form.
12. The apparatus of claim 11, further comprising a Reed-Solomon decoder for decoding a reproduced input.
13. A method of processing a data stream substantially as hereinbefore described with reference to the accompanying diagrams.
14. Apparatus for processing a data stream substantially as hereinbefore described with reference to the accompanying diagrams.
GB9909893A 1999-04-30 1999-04-30 Processing digital bitstreams Withdrawn GB2351210A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552979A2 (en) * 1992-01-23 1993-07-28 Samsung Electronics Co., Ltd. Apparatus and method for de-interleaving data
US5430767A (en) * 1992-09-15 1995-07-04 Samsung Electronics Co., Ltd. Method and apparatus for deinterleaving digital transmission data

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552979A2 (en) * 1992-01-23 1993-07-28 Samsung Electronics Co., Ltd. Apparatus and method for de-interleaving data
US5430767A (en) * 1992-09-15 1995-07-04 Samsung Electronics Co., Ltd. Method and apparatus for deinterleaving digital transmission data

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