GB2335328A

GB2335328A - Permanent virtual circuit communication system

Info

Publication number: GB2335328A
Application number: GB9905287A
Authority: GB
Inventors: Hiroshi Terasaki
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1998-03-09
Filing date: 1999-03-08
Publication date: 1999-09-15
Anticipated expiration: 2019-03-08
Also published as: GB2335328B; JPH11261565A; GB2335328A8; JP3152297B2; GB9905287D0

Abstract

A PVC (Permanent Virtual Circuit) communication system includes a parent station ATM (Asynchronous Transfer Mode) unit (1), first to n-th (where n is an integer equal to or more than 2) child station ATM units (2), and first to n-th transmission paths for connecting the parent station ATM unit and the first to the n-th child station ATM units (2), respectively. The parent station ATM unit (1) includes a single PVC and communicates with the first to the n-th child station ATM units (2) through the first to the n-th transmission paths using the PVC. Also disclosed is a method of communicating between a parent station ATM unit and child station ATM units which are respectively allocated with identifiers different from each other through transmission paths in a PVC communication system, including the steps of transmitting a transmission permission ATM message, including the identifier allocated to one of the child station ATM units and communication permission data in an ATM header section, from the parent station ATM unit to the child station ATM units through the transmission paths, and setting only the one child station ATM unit to a communication permission mode in which the one child station ATM unit is permitted to communicate with the parent station ATM unit, the child station ATM units, other than the one child station ATM unit which is permitted to communicate, being in a communication inhibition mode.

Description

1 PERKMENT VIRTUAL CIRCUIT COM MUN ICATION SYSTEM 2335328 The present

invention relates to a permanent virtual circuit (PVC) communication system for communication between asynchronous transfer mode (ATM) units of an ATM network.

In the specification of Japanese Laid Open Patent

Application (JPA-Heisei 4156742) there is described an ATM (Asynchronous Transfer Mode) allocation system of a time divisional multiplexing unit in which data for every channel is time-divided and transmitted. In this specification, the data is transmitted in units of ATM cells so that the data transmission efficiency is improved.

Also, in the specification of Japanese Laid Open Patent Application (JP-AHeisei 8-163142) there is disclosed a protocol processing method. In this latter specification, there is described a method of processing an ATM related protocol in transmission and reception cells in two directions in a single circuit in a line terminating unit of an ATM switching apparatus.

Further, in the specification of Japanese Laid Open Patent Application (JP-A-Heisei 6-197119) an analog line ATM subscriber circuit is disclosed. In this last mentioned specification, data is transmitted via an

2 analog subscriber line and is subjected to ATM conversion, so that an existing network can be connected to an ATM network.- In addition, a cell assembling circuit and an STM/ATM converting circuit are disclosed in the specification of Japanese Laid Open Patent Application (JP-A-Heisei 8-79263), in which a cell assembling circuit 100 includes a buffer 102, a write counter 116, a read counter 117, a counter setting section 124, and a multiplexing section 112. The buffer 102 stores line data 101. The write counter 116 and the read counter 117 provide a write address and a read address to the buffer 102, respectively. The counter setting section 124 sets the write counter 116 to a predetermined value when an external trigger is input. The multiplexing section 112 multiplexes read data 105, for transmission to a cell 113, a cell header 119, and an adaptation header 118.

Previously proposed arrangements will now be described with reference to Figs. 1 to 4 of the accompanying drawings in which Figs. 1 and 4 are block schematic diagrams and Figs. 2 and 3 are diagrams for use in explaining series of user data ATM cells.

Referring to Fig. 1, there is shown a previously proposed PVC communication system which includes a parent station ATM unit 1 (#0), first to n-th child station ATM units 2 (where n is an integer equal to or more than 2) (#1 to #n), and first to n-th high-speed transmission paths 3 (#1 to #n) in an ATM network. The first to n-th 3 high-speed transmission paths 3 (#1 to #n) are provided between the parent station ATM unit 1 and first to the n th child station ATM units 2 to connect the parent station ATM unit 1 to the first to n-th ATM units 2, respectively. In this PVC communication system, the communication between the parent station ATM unit 1 and the first to n-th child station ATM units 2 is realized through the first to n-th PVC's 14 (#1 to #n), respectively.

In this case, a system is adopted in which combinations of VPI (Virtual Path Identifier) value and a WI (Virtual Channel Identifier) value are provided between the parent station ATM unit 1 and the child station ATM units 2 and are different from each other. For example, the VCI value (VPI = yl) and VPI value (VPI = x), indicate that the PVC's 14 (#1) are allocated between the parent station ATM unit 1 and the first child station ATM unit 2 (#1). Also, the VCI value (VPI = y2) and VPI value (VPI = x), indicate that the PVCts 14 (#2) are allocated between the parent station ATM unit 1 and the second child station ATM unit 2 (#2). Further, the VCI value (VPI = yn) and the VPI value (VPI = x) indicate that the PVC's 14 (#n) are allocated between the parent station ATM unit 1 and the n-th child station ATM unit 2 (M). For example, in the case of communication with the n-th child station ATM unit 2 (#n), the parent station ATM unit 1 transmits a series of user data ATM cells 15 shown in Fig. 2 to the nth child station ATM unit 2 (#n) 4 through the n-th PVC 14 (#n).

In Fig. 2, each of the above-mentioned series of user data ATM cells 15 is shown to have an ATM header section of 5 bytes and an ATM data section of 48 bytes. The ATM header section contains the VPI value (VPI = x) indicating the n-th PVC 14 (#n) and the VCI value (VPI yn). The ATM data section contains a part of the user data. The last ATM cell of the abovementioned series of user data ATM cells 15 contains user data and an AAL5 trailer (this is well known in this field) in the ATM data section.

Referring to Fig. 1 again, in the case of communication with the first child station ATM unit 2 (#1), the parent station ATM unit 1 transmits a series of user data ATM cells to the first child station ATM unit 2 (#1) through the first PVC 14 (#1). Each of the data ATM cells contains the VPI value (VPI = x) indicating the first PVC 14 (#1) and the VCI value (VPI = yl) in the ATM header section, as in the previously mentioned cells.

Similarly, in the case of communication with the second child station ATM unit 2 (#2), the parent station ATM unit 1 transmits a series of user data ATM cells to the second child station ATM unit 2 (#2) through the first PVC 14 (#2), as in the previously mentioned cells. Each of them contains the VPI value (VPI = x) indicating the first PVC 14 (#2) and the VCI value (VPI = y2) in the ATM header section.

Also, the parent station ATM unit 1 receives a series of user data ATM cells 61 transmitted from the first child station ATM unit 2 (#1) through the first PVC 14 (C). The series of user data ATM cells 61 have the structure shown in Fig. 3.

In Fig. 3, each of the above-mentioned series of user data ATM cells 61 has an ATM header section of 5 bytes of an ATM data section of 48 bytes. The ATM header section contains the VPI value (VPI = x) indicating the first PVC 14 (W and the VCI value (VPI = yl). The ATM data section contains a part of the user data. The last ATM cell of the above-mentioned series of user data ATM cells 61 contains a part of the user data and an AAL5 trailer (this is well known in this field) in the ATM data section. The series of user data ATM cells 61 transmitted from the first child station ATM unit 2 to the parent station ATM unit 1 have the same format as that of the above-mentioned series of user data ATM cells transmitted from the parent station ATM unit 1 to the first child station ATM unit 2 (#1).

Returning to Fig. 1, the parent station ATM unit 1 receives a similar series of user data ATM cells 62 transmitted from the second child station ATM unit 2 (#2) through the second PVC 14 (#2). Each of them contains the VPI value (VPI = x) indicative of the second PVC 14 (#2) and the VCI value (VPI = y2) in the ATM header section. The series of user data ATM cells 62 transmitted from the second child station ATM unit 2 (#2) to the parent station ATM unit 1 have the same format as 6 1 1 that of the above-mentioned series of user data ATM cells transmitted from the parent station ATM unit 1 to the second child station ATM unit 2 (#2).

Similarly, the parent station ATM unit 1 receives a similar series of user data ATM cells transmitted from the n-th child station ATM unit 2 (#n) through the second PVC 14 (#n). Each of them contains the VPI value (VPI x) indicative of the n-th PVC 14 (#n) and the VCI value (VPI = yn) in the ATM header section. The series of user data ATM cells transmitted from the n-th child station ATM unit 2 (#n) to the parent station ATM unit 1 have the same format as that of the above- mentioned series of user data ATM cells 15 transmitted from the parent station ATM unit 1 to the n-th child station ATM unit 2 (#n).

Referring to Fig. 4, the details of the parent station ATM unit 1 of the PVC communication system shown in Fig. 1 are shown. The parent station ATM unit 1 has a main signal processing section 8, an AALS terminate section 9, a microprocessor 13, first to n-th FIFO (first-in and first-out) memories (#1 to #n) 10, first to nth FIFO memories (#1 to #n) 11, n line terminate sections 12. The n line terminate sections 12 terminate the high-speed transmission paths 3 (#1 to #3) which are physical transmission paths connected with the n child station ATM units 2. Each of the n line terminate sections 12 has the function of converting user data with an optional length into AAL5 type packets which are disassembled into a series of user data ATM cells, as 7 shown in Fig. 1 by a reference numeral 15. The AALS terminate section 9 assemblies an AAL5 type packet from the series of user data ATM cells, as shown in Fig. 1 by the reference numeral 61 or 62, to convert them into user data with an optional length. An ATM cell multiplexing and separating section 7 is connected between the AAL5 terminate section 9 and the n line terminate sections 9 to multiplex and separate data in units of ATM cells. The main signal processing section 8 controls the destination of the ATM cells in ATM cell multiplexing and separating section 7. A microprocessor 13 controls the communication application to provide communication with the n child station ATM units 2. The N pairs of FIFO memories are connected between the microprocessor 13 and the AAL5 terminate section 9 for respective first to n-th line terminate sections 12. Each of the first to n-th pairs of FIFO memories (#1 to #n) is composed of the FIFO memory 10 for storing communication data from the microprocessor 13 and the FIFO memory 11 for storing communication data from the AAL5 terminate section 9.

As mentioned above, in the previously proposed PVC communication system shown in Fig. 1, the communication between the parent station ATM unit 1 and the first to n-th child station ATM units 2 is provided through the first to n-th PVC's 14 (#1 to #n). In this case, a system is adopted in which combinations of the VPI value and the VCI value indicative of the first to n-th PVC's 14 (#1 to #n) and different from each other are allocated 8 between the parent station ATM unit 1 and the first to nth child station ATM units 2, respectively.

Therefore, in the previously proposed parent station ATM unit 1, there are a pair of FIFO memories 10, 111 which temporarily store communication data from the microprocessor 13, and communication data from the child station ATM unit 2 for each child station ATM unit 2. This means that the microprocessor 13 is able to carry out communication with only one child station ATM unit 2, as a transmission destination at a time when in a communication state, for a very short time. At this time, the resources such as the other pairs of the FIFO memory 10 and the FIFO memory 11 which are provided for the other child station ATM units 2 are not used. The is efficiency of use of the resources is thus low in the previously proposed PVC communication system.

Arrangements to be described below by way of example in illustration of the invention provide an improvement in the efficiency of the use of the resources, and a parent station ATM unit which is comparatively simplified in its structure.

In one arrangement to be described below, by way of example in illustration of the invention a PVC communication system includes a parent station ATM unit, first to n-th (where n is an integer equal to or more than 2), child station ATM units, and first to n-th transmission paths for connecting the parent station ATM unit and the first to n-th child station ATM units, 9 respectively. The parent station ATM unit includes a single PVC and communicates with the first to n-th child station ATM units through the first to n-th transmission paths using the PVC.

The first to n-th child station ATM units have identifiers which are respectively different from each other. The parent station ATM unit communicates with one of the first to n-th child station ATM units using an ATM cell which includes a combination of a VPI (Virtual Channel Identifier) value and M (Virtual Path Identifier) value indicative of the single PVC in an ATM header section, and the identifier allocated to the one child station ATM unit in an ATM data section.

The parent station ATM unit transmits a transmission permission ATM cell which includes a combination of a VPI value and V= value indicative of the single PVC in an ATM header section, and the identifier allocated to one of the first to n-th child station ATM units and a communication permission message in an ATM header section, to the first to n-th child station ATM units through the first to n-th transmission paths, such that only the one child station ATM unit is set to a communication permission mode in which only the one child station ATM unit is permitted to communicate with the parent station ATM unit. The first to n-th child station ATM units other than the one child station ATM unit are in a communication inhibition mode.

Also, the parent station ATM unit transmits a transmission inhibition ATM cell which includes the combination of the VPI value and VCI value indicative of the single PVC in the ATM header section, and the identifier allocated to the one child station ATM unit and a communication permission cancellation message in the ATM header section, to the first to the n-th child station ATM units through the first to the n-th transmission paths, such that only the one child station ATM unit is reset to the communication inhibition mode in which the one child station ATM unit is inhibited from communicating with the parent station ATM unit. The parent station ATM unit transmits the transmission inhibition ATM cell to the first to the n-th child station ATM units through the first to the n-th transmission paths, after a predetermined time elapses from the transmission of the transmission permission ATM cell.

In the communication permission mode, the parent station ATM unit transmits a series of user data ATM cells to the first to the n-th child station ATM units at the same time using the single PVC, and the one child station ATM unit in the transmission permission mode receives the series of user data ATM cells. At this time, the first to the n-th child station ATM units, other than the one child station ATM unit in the transmission inhibition mode, ignore the series of user data ATM cells. The parent station ATM unit includes a single FIFO (First-in and Firstout) store for 11 temporarily storing first user data of the series of user data ATM cells.

In one particular arrangement to be described, below, by way of example in illustration of the invention the one child station ATM unit in the transmission permission mode transmits another series of user data ATM cells to the parent station ATM unit, and the parent station ATM unit receives the other series of user data ATM cells. The parent station ATM unit includes a single FIFO memory for temporarily storing second user data of the other series of user data ATM cells.

There will also be described below, by way of example in illustration of the invention a method of communicating between a parent station ATM unit and a is first to an n-th (where n is an integer equal to or more than 2) child station ATM unit respectively allocated with identifiers different from each other through first to n-th transmission paths, in a PVC communication system, including the steps of transmitting a transmission permission ATM message including an identifier allocated to one of the first to the n-th child station ATM units and a communication permission data in an ATM header section, from the parent station ATM unit to the first to the nth child station ATM units through the first to the n-th transmission paths, and setting only the one child station ATM unit to a communication permission mode in which the one child station ATM unit is permitted to communicate with the 12 parent station ATM unit, the first to the n-th child station ATM units, other than the one child station ATM unit, being in a communication inhibition mode.

In one particular illustrative arrangement to be described, a transmission inhibition ATM message. including an identifier allocated to one child station ATM unit and communication permission cancellation data in the ATM header section, is transmitted from the parent station ATM unit to the first to the n-th child station ATM units through the first to the n-th transmission paths. The one child station ATM unit is reset to the communication inhibition mode, in which the one child station ATM unit is inhibited from communicating with the parent station ATM unit.

The transmission inhibition ATM message is transmitted from the parent station ATM unit to the first to the n-th child station ATM units through the first to the n-th transmission paths, after a predetermined time has elapsed from the transmission of the transmission permission ATM message.

Arrangements illustrative of the invention will now be described, by way of example, with reference to Figs. 5 to 8 of the accompanying drawings, in which:- Fig. 5 is a block schematic diagram of a PVC communication system, Fig. 6 is a block schematic diagram illustrating the structure of the parent station ATM unit of the PVC communication system of Fig. 5, 13 Fig. 7 is a diagram for use in describing a message ATM cell which is used in the PVC communication system of Fig. 5, and Fig. 8 is a diagram for use in describing a series of user data ATM cells which are used in the PVC communication system of Fig. 5.

Referring to Fig. 5, there is shown a PVC communication system which includes a parent station ATM unit 1 (#0), the first to the n-th (where n is an integer equal to or more than 2) child station ATM units 2 (#1 to #n), and the first to the n-th high speed transmission paths 3 (#1 to #n) which connect the parent station ATM unit 1 and the first to the n-th ATM units 2 in an ATM network. The first to the n-th ID (Identification) numbers #1 to #n, which are different from each other, are allocated to the first to the n-th child station ATM units 2, respectively.

In the PVC communication system, a message ATM cell 5 which contains the ID number (this is the first ID number, ID #1 allocated to the first child station ATM unit 2 (#1) in the illustrated example) and a message MSG indicative of transmission permission is transmitted from the parent station ATM unit 1 to the n child station ATM units 2 through a single PVC (Permanent Virtual Circuit) 4. As the result of the transmission permission, one of the n child station ATM units 2 which is identified based on the ID number is permitted to transmit a series of user data ATM cells 6. In addition, in the PVC 14 communication system, a message ATM cell 5 which contains the ID number (ID C) and a message MSG indicative of transmission inhibition (transmission permission cancellation) is transmitted from the parent station ATM unit 1 to the n child station ATM units 2 through the single PVC 4. As the result of the transmission inhibition, one of the n child station ATM units 2 which is identified based on the ID number is inhibited from transmitting the series of user data ATM cells 6.

Fig. 6 is a block schematic diagram illustrating the structure of the parent station ATM unit 1 of the PVC communication system. The parent station ATM unit 1 has an ATM cell multiplexing and separating section 7, a main signal processing section 8, an AAL5 terminate section 9, a FIFO (First-in and First-out) memory (FIFO-1) 10, a FIFO memory (FIFO- 2) 11, the first to the n-th line terminate sections 12, and a microprocessor 13.

The first to the n-th line terminate sections 12 are connected with the n child station ATM units 2 (Fig. 5) through the high-speed transmission paths 3 (#1 to #n). respectively. Each of the first to n-th line terminate sections 12 functions to convert user data with an optional length into an AAL5 type packet to be disassembled into a series of user data ATM cells. The AALS terminate section 9 assembles an AALS type packet from a series of user data ATM cells to convert them into user data with an optional length. The ATM cell multiplexing and separating section 7 is connected between the AAL5 terminate section 9 and the n line terminate sections 9 to multiplex and separate data in units of ATM cells. The main signal processing section 8 controls the destination of the ATM cells in the ATM cell multiplexing and separating section 7. The microprocessor 13 controls a communication procedure to provide communication with the n child station ATM units 2. The FIFO memory (FIFO-1) 10 stores communication data from the microprocessor 13 and the FIFO memory (FIFO-2) 11 stores communication data from the AALS terminate section 9 to the microprocessor 13.

The operation of the PVC communication system of Fig. 5 will now be described.

In Figs. 5 and 6, it is first supposed that transmission is carried out from the parent station ATM unit 1 (#0) to one (#1) of the child station ATM units 2 (#1 to #n). Also, a unique ID number is allocated to each of the child station ATM units 2 (#1 to #n) and each of the child station ATM units 2 (#1 to #n) is able to recognize the ID number which is allocated to itself.

In the parent station ATM unit 1 (#0), the microprocessor 13 issues a message packet including the ID number #1 indicative of the child station ATM unit 2 (#1) and a message MSG indicative of transmission permission. Here, it is assumed that the message packet has an ATM cell length for 1 cell, when it is converted into an ATM cell by the AALS terminate section 9, as will be described later. Instead, the message packet may have 16 such a structure that it is converted into a plurality of AIM cells.

The message packet is stored once in the FIFO memory (FIFO-1) 10. The message packet is read in order by the AALS terminate section 9, in accordance with the processing procedure determined by the ATM cell multiplexing and separating section 7. The read ATM packet is.converted into a message ATM cell 5 with one cell length, as shown in Fig. 5. The ATM cell has an ATM header section has the ID number #1 and a message (MSG) indicative of transmission permission. The message ATM cell 5 with one cell length is delivered to the n line terminate sections 12 at the same time by the ATM cell multiplexing and separating section 7. By this, the same message ATM cell 5 with the one cell length is transmitted to the n child station ATM units 2 (#1 to #n) through the n high-speed transmission paths 3 (#l to #n) at the same time.

Referring to Fig. 7, the above-mentioned message ATM cell 5 with one cell length is shown. As shown in Fig. 7, the message ATM cell 5 with one cell length has an ATM header section of 5 bytes and an ATM data section of 48 bytes. The ATM header section contains the VPI value WPI = x) and the VCI value (VCI = y) which indicate a single PVC 4. The ATM data section includes the ID number #1, the message indicative of transmission permission, and the AALS trailer (this is well known in this field).

17 Returning to Figs. 5 and 6, the n child station ATM units 2 (#1 to #n) receive the message ATM cell 5 with the one cell length which is transmitted from the parent station ATM unit 1 (#0), at substantially the same time. Then, in each of the n child station ATM units 2 (#1 to #n), the original message packet is assembled in accordance with the inverse procedure to the procedure mentioned above. In this case, only the child station ATM unit 2 (#1) of the n child station ATM units 2 (#1 to #n) determines, based on the ID number #1, that the transmitted message is a message destined to itself. Then, the child station ATM unit 2 (#1) recognizes that communication using the single PVC 4 (VPI = x and PCI = y) has been permitted, after the message indicative of communication permission has been decoded and the state of the child station ATM unit (C) has been switched into a communication state. Thus, only the child station ATM unit 2 (#1) is set to a communication permission mode. In this case, the child station ATM units 2 (#2 to #n) are kept in a communication inhibition mode.

The (n-1) child station ATM units 2 (#2 to #n), other than the child station ATM unit 2 (C), ignore the message, because the ID number contained in the transmitted message is different from their ID numbers. Each of the child station ATM units 2 (#2 to #n) discards all received ATM cells until a message packet containing its ID number is received.

18 After this, the user data with an optional length from the microprocessor 13 of the parent station ATM unit 1 (#0) is converted into a series of user data ATM cells shown in Fig. 8 by the AAL5 terminate sections 9 of the parent station ATM unit 1 (#0). This process is similar to the above case. Then, the series of user data ATM cells are transmitted from the n line terminate sections 12 (#1 to #n) to all the n child station ATM units 2 (#1 to #n) through the single PVC 4 (VPI = x and VCI = y) at the same time.

In Fig. 8, each of the above-mentioned series of user data ATM cells has an ATM header section of 5 bytes and an ATM data section of 48 bytes. The ATM header section contains the VPI value (VPI = x) and the VCI value (VCI = y) to indicate the single PVC 4. The ATM data section contains a part of user data. The last ATM cell of the above-mentioned series of user data ATM cells contains a part of the user data and an AAL5 trailer (this is well known in this field) in the ATM data section.

Returning to Figs. 5 and 6, the series of user data ATM cells transmitted to all the n child station ATM units 2 (#1 to #n) are assembled as the user data in all the n child station ATM units 2 (#1 to #n). However, the assembled data is only recognized as the user data in the child station ATM units 2 (C) which is then permitted to communicate. In the other (n1) child station ATM units 2 (#2 to #n), which are not permitted to communicate, the 19 user data is ignored.

On the contrary, the user data with an optional length is input from the child station ATM unit 2 (#1), which is permitted to communicate, through the line terminate sections 12 (#1) and the single PVC 4 (VPI = x and VCI = y) as a series of user data ATM cells 6 shown in Fig. 8. The series of user data ATM cells 6 are output from the ATM separating and multiplexing section 7 to the AAL5 section 9.

If another series of ATM cells is input through the single PVC 4 (VPI = x and VCI = y) from at least one of the other (n-1) child station ATM units 2 (#2 to #n) at the same time, the user data with the optional length from the child station ATM unit 2 (#1), which is permitted to communicate, would be mixed with the user data with an optional length from the other child station ATM unit 2, which is not permitted to communicate. As a result, the user data with the optional length from the child station ATM unit 2 are all lost. However, it is only the child station ATM unit 2 (C) that is permitted to transmit the ATM cells through the single PVC 4 (VPI x and VCI = Y) at this time point. Therefore, such a situation would never happen.

The series of ATM cells 6 from the child station ATM unit 2 (#1) are output from the ATM separating and multiplexing section 7 to the AAL5 terminate section 9 and are then output to the FIFO memory 10 in order by the AAL5 terminate section 9. Thereafter, the series of ATM 1 1 cells 6 are stored until they are assembled as the user data with the optional length. The assembled user data with the optional length from the child station ATM unit 2 (#1) is received by the microprocessor 13 and decoded.

After a predetermined time, the microprocessor 13 of the parent station ATM unit 1 (#0) issues a message packet which has the ID number #1 and the message indicative of transmission inhibition (cancellation of the transmission permission). The issued message packet is converted into a message ATM cell of the same format as that of the message ATM cell of Fig. 7, and is transmitted to the n child station ATM unit 2 (#1 to #n) at the same time. Only the child station ATM unit 2 (#1) which is permitted to communicate recognizes the communication inhibition from the parent station ATM unit 1 (#0), and the communication (for example, thetransmission of the series of ATM cells 6) from the child station ATM unit 2 (#1) is inhibited thereafter. Thus, the child station ATM unit 2 (#1) is set to the communication inhibition mode.

Next, the microprocessor 13 of the parent station ATM unit 1 (#0) newly issues the message packet which has the ID number #2 and the message indicative of transmission permission. Similarly, the issued message packet is recognized only by the child station ATM unit 2 (#2) based on the ID number #2, and then communication is permitted.

Once again, after the predetermined time, the 21 microprocessor 13 of the parent station ATM unit 1 (#0) issues a message packet which has the ID number #2, and the message indicative of transmission inhibition (cancellation of the transmission permission), to end the communication with the child station ATM unit 2 (#2).

The above-mentioned operation is performed, in order, over the first to nth ID numbers (totally, n times), and then the communication between the parent station ATM unit 1 (#0) and all the n child station ATM units 2(#1 to #n) is ended.

As described above, when communication between the parent station ATM unit and the plurality of child station ATM units through the single PVC is realized in units of ATM cells, the communication with the plurality is of child station ATM units can be provided only through the single PVC. The single PVC is provided between the parent station ATM unit and the plurality of child station ATM units and is allocated with a combination of the unique VPI value and VCI value. The message ATM cell with the 1 cell length which contains one of the ID numbers which are allocated to the plurality of child station ATM units is transmitted from the parent station ATM unit to the plurality of child station ATM units at a predetermined time interval. As a result, communication with one child station ATM unit which is identified, based on the ID number, is permitted. Thus, the single PVC is used for the plurality of child station ATM units in a time divisional manner.

22 Although particular arrangements have been described, by way of example in illustration of the invention, variations and modifications thereof, as well as other arrangements may be conceived within the scope of the appended claims.

- - in 23

Claims

1. A PVC (Permanent Virtual Circuit) communication system including a parent station ATM (Asynchronous Transfer Mode) unit, first to the n-th (where-n is an integer equal to or more than 2) child station ATM units, and first to the n-th transmission paths for connecting together the parent station ATM unit and a respective one of the first to the n-th child station ATM units. wherein the parent station ATM unit includes a single PVC and communicates with the respective one of the first to the n-th child station ATM units through the first to the nth transmission paths using the PVC.

2. A PVC communication system as claimed in claim 1, wherein the first to the n-th child station ATM units each are allocated with an identifier which is different from each other, respectively, and wherein the parent_ station ATM unit communicates with one of the first to the n-th child station ATM units using an ATM cell which includes a combination of a VPI (Virtual Path Identifier) value and a WI (Virtual Channel Identifier) value indicative of the single PVC in an ATM header section, and the identifier allocated to one child station ATM unit in an ATM data section.

3. A PVC communication system as claimed in claim in which the first to the n-th child station ATM units 24 are each allocated a respective identifier which is different from each other, and wherein the parent station ATM unit transmits a transmission permission ATM cell, which includes a combination of a VPI value and a VCI value indicative of the single PVC in an ATM header section, the identifier allocated to one of the first to the n-th child station ATM units and a communication permission message in an ATM header section, to the first to the n-th child station ATM units through the first to the n-th transmission paths, such that only the one child station ATM unit is set to a communication permission mode in which only the one child station ATM unit is permitted to communicate with the parent station ATM unit, the first to the n-th child station ATM units, other than the one child station ATM unit, being in a communication inhibition mode.

4. A PVC communication system as claimed in claim 3. wherein the parent station ATM unit transmits a transmission inhibition ATM cell, which includes the combination of the VPI value and the VCI value indicative of the single PVC in the ATM header section, the identifier allocated to the one child station ATM unit, and a communication permission cancellation message in the ATM header section, to the first to the n-th child station ATM units through the first to the n-th transmission paths, such that only the one child station ATM unit is reset to the communication inhibition mode in which the one child station ATM unit is inhibited from communicating with the parent station ATM unit.

5. A PVC communication system as claimed in claim 4, wherein the parent station ATM unit transmits the transmission inhibition ATM cell to the first to the n-th child station ATM units through the first to the n-th transmission paths, after a predetermined time has elapsed from the transmission of the transmission permission ATM cell.

6. A PVC communication system as claimed in claim 3, wherein the parent station ATM unit transmits a series of user data ATM cells to the first to the n-th child station ATM units at the same time using the single PVC, and wherein the one child station ATM unit in the transmission permission mode receives the series of user data ATM cells.

7. A PVC communication system as claimed in cl-aim 6, wherein the first to the n-th child station ATM units in the transmission inhibition mode, other than the one child station ATM unit in the transmission permission mode ignore the series of user data ATM cells.

8. A PVC communication system as claimed in claim 6, wherein the parent station ATM unit includes a single FIFO (First-in and Firstout) store for temporarily 26 storing first user data of the series of user data ATM cells.

9. A PVC communication system as claimed in claim 3, wherein the one child station ATM unit in the transmission permission mode transmits another series of user data ATM cells to the parent station ATM unit, and wherein the parent station ATM unit receives the other series of user data ATM cells.

10. A PVC communication system as claimed in claim 9, wherein the parent station ATM unit includes a single FIFO memory for temporarily storing second user data of the other series of user data ATM cells.

11. A method of communicating between a parent station ATM (Asynchronous Transfer Mode) unit and first to n-th (where n is an integer equal to or more than 2) child station ATM units which are respectively allocated with identifiers different from each other through first to n-th transmission paths in a PVC (Permanent Virtual Circuit) communication system, including the steps of transmitting a transmission permission ATM message, including the identifier allocated to one of the first to the n- th child station ATM units and communication permission data in an ATM header section, from the parent station ATM unit to the first to the n-th child station ATM units through the first to the n-th transmission 27 paths, and setting only the one child station ATM unit to a communication permission mode in which the one child station ATM unit is permitted to communicate with the parent station ATM unit, the first to the n-th child station ATM units, other than the one child station ATM unit which is permitted to communicate, being in a communication inhibition mode.

12. A method as claimed in claim 11, including the steps of transmitting a transmission inhibition ATM message, which includes the identifier allocated to the one child station ATM unit and communication permission cancellation data in the ATM header section, from the parent station ATM unit to the first to the n-th child station ATM units through the first to the n-th transmission paths, and resetting the one child station ATM unit to the communication inhibition mode in which the one child station ATM unit is inhibited from communicating with the parent station ATM unit.

13. A method as claimed in claim 12, wherein the step of transmitting a transmission inhibition ATM message includes transmitting the transmission inhibition ATM message from the parent station ATM unit to the first to the n-th child station ATM units through the first to the n-th transmission paths, after a predetermined time has elapsed from the transmission of the transmission permission ATM message.

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14. A method as claimed in claim 12 including the steps of transmitting a series of user data ATM cells from the parent station ATM unit to the first to the n-th child station ATM units at the same time, and receiving the series of user data ATM cells by the one child station ATM unit in the transmission permission mode.

15. A method as claimed in claim 14 including the step of ignoring the series of user data ATM cells by the first to the n-th child station ATM units in the transmission inhibition mode, other than the one child station ATM unit in the transmission permission mode.

16. A PVC communication system as claimed in claim 14, including the step of transmitting another series of user data ATM cells from the one child station ATM unit in the transmission permission mode to the parent station ATM unit, wherein the parent station ATM unit receives the other series of user data ATM cells.

17. A PVC communication system as claimed in claim 1, substantially as described herein with reference to Figs. 5 to 8 of the accompanying drawings.

18. A method of communicating as claimed in claim 11, substantially as described herein with reference to Figs. 5 to 8 of the accompanying drawings.