GB2315920A - Infra-red led - Google Patents
Infra-red led Download PDFInfo
- Publication number
- GB2315920A GB2315920A GB9715319A GB9715319A GB2315920A GB 2315920 A GB2315920 A GB 2315920A GB 9715319 A GB9715319 A GB 9715319A GB 9715319 A GB9715319 A GB 9715319A GB 2315920 A GB2315920 A GB 2315920A
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- United Kingdom
- Prior art keywords
- layer
- approximately
- atom
- gaalas
- amounts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 10
- 239000010703 silicon Substances 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 9
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 6
- 230000007423 decrease Effects 0.000 claims description 4
- 239000007791 liquid phase Substances 0.000 claims description 4
- 239000002019 doping agent Substances 0.000 claims description 3
- 229910052714 tellurium Inorganic materials 0.000 claims description 3
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims description 3
- 229910017974 NH40H Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 27
- 229910052782 aluminium Inorganic materials 0.000 description 27
- 239000004411 aluminium Substances 0.000 description 27
- 239000000155 melt Substances 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 239000003795 chemical substances by application Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 238000004943 liquid phase epitaxy Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
- H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
A first GaAIAs-layer 3.2, 3.1 amphoterically doped with silicon and comprising a p-conducting sub-layer 3.2 and an overlying, n-conducting sub-layer 3.1 wherein the Al-content continuously increases exponentially over the thickness of the whole of the first layer commencing from the surface side of the p-conducting sub-layer and amounts to approximately 0 atom-% on the surface side of the p-conducting sub-layer, approximately 5-10 atom-% in the zone of the pn-junction and approximately 25-40 atom-% on the surface side of the n-conducting sub-layer, and a second tellurium-doped, n-conducting GaAlAs-layer 2 arranged on the surface side of the n-conducting sub-layer of the first GaAlAs-layer, wherein the Al-content continuously increases exponentially over the thickness of the whole of the second layer commencing from the boundary surface to the first GaAlAs-layer and at the boundary surface to the first GaAlAs-layer amounts to approximately 6-16 atom-% but in any case is greater than in the zone of the p-junction, and at the surface amounts to at least 24 atom-% but at the maximum corresponds to the Al-content on the surface side of the n-conducting sub-layer. A process for the production of the semiconductor arrangement is also disclosed.
Description
2315920 Semiconductor Arrangement The invention relates to a semiconductor
arrangement, in particular for a LED emitting infrared light, with a window layer which improves the light emission, and to a process for the production of such a semiconductor arrangement.
EP 0 356 037 A describes a process for the production of a LED with a double-hetero-structure. The following layers consisting of GaAlAs and having different aluminium constituents are produced consecutively on a GaAs substrate in the stated sequence from different melts. Firstly there is provided a p-conducting current propagation layer with an Al-content of 40 to 90 atom-i. The p-conducting current propagation layer is to distribute the current uniformly from the surface contacts onto the active layer. Then a pconducting covering layer with an Al-content of 60 to 90 atom-% is formed. This is followed by the p-active layer with an aluminium content of 35 to 45 atom-%. The p-active layer forms a first heterojunction with the p-conducting covering layer. A n-conducting covering layer with an aluminium. content of 60 to 90 atom-o-o is grown onto the pactive layer. The p-active layer forms a second heterojunction with the n-conducting covering layer. Finally a n-conducting, transparent carrier layer is formed on the n-conducting covering layer and the original substrate is removed. The n-conducting, transparent carrier layer is made as thick as possible in order to provide the semiconductor arrangement with adequate mechanical stability for the following process steps upon the separation of the diode chips and the mounting in the housings. The LEDs produced from this semiconductor arrangement have a very high luminous intensity. However, the production process is very complex and thus costly.
Gillessen and Schairer "Light -Emitting Diodes", PrenticeHall International, 1987, p. 118 to 125 describes a process 2 for the production of a diode emitting infrared light with a so-called graded-band-gap structure. A GaAlAs-layer doped with silicon is grown on a GaAs substrate by a liquid phase epitaxy process. The composition and geometrical configuration of the melt are selected such that the aluminium content of the grown layer reduces continuously along the thickness in the direction of growth. The silicon contained in the melt is incorporated into the lattice as acceptor or donor as a function of the temperature of the melt, so that the light-generating pn-junction 3.3 of the LED is formed from only one melt at a specified temperature during the epitaxy process. Following the removal of the GaAs substrate, the contact layers are produced and structured. Then the diode chips are separated.
Due to the relatively simple structure, such a semiconductor arrangement can be produced in a favourable manner. LEDs with diode chips produced from these semiconductor arrangements have a lower luminous intensity compared to those with double-hetero-structures. Because of its high aluminium content, the one surface side of this semiconductor arrangement is difficult to provide with a contact.
The present invention seeks to provide a semiconductor arrangement for LEDs emitting infrared light, which arrangement is simple to produce but mechanically stable and from which LEDs with a high luminous intensity can be produced. The present invention also seeks to provide a process for the production of such a semiconductor arrangement.
According to a first aspect of the present invention, there is provided a semiconductor arrangement comprising a first GaAlAs-layer amphoterically doped with silicon and comprising a p-conducting sub-layer and an overlying, nconducting sub-layer, wherein the Al-content continuously 3 increases exponentially over the thickness of the whole of the first layer commencing from the surface side of the pconducting sub-layer and amounts to approximately 0 atom-% on the surface side of the p-conducting sub-layer, approximately 5-10 atom--. in the zone of the pn-junction and approximately 25-40 atom-% on the surface side of the nconducting sublayer; and a second tellurium-doped, nconducting GaAlAs-layer arranged on the surface side of the n-conducting sub-layer of the first GaAlAs-layer, wherein the Al-content continuously increases exponentially over the thickness of the whole of the second layer commencing from the boundary surface to the first GaAlAs-layer and at the boundary surface to the first GaAlAs-layer amounts to approximately 6-16 atom-0-. but in any case is greater than in the zone of the pn-junction and at the surface amounts to at least 24 atom-% but at the maximum corresponds to the Alcontent on the surface side of the n-conducting sub-layer.
According to a second aspect of the present invention, there is provided a process for the production of a semiconductor arrangement comprising the following steps, in order: provision of a monocrystalline substrate wafer consisting of GaAs; growth of a second epitaxial layer consisting of nconducting GaAlAs from the liquid phase of a first melt, wherein the Al-content continuously decreases exponentially over the thickness of the whole of the second epitaxial layer in the direction of growth and at the start of the epitaxial growth amounts to at least 24 atom--oo; growth of a first epitaxial layer consisting of GaAlAs from the liquid phase of a second melt, wherein the Al-content continuously decreases exponentially over the thickness of the whole of the first epitaxial layer in the direction of growth and at the start of the epitaxial growth amounts to 25-40 atom--., and the second melt is doped with silicon in such manner that 4 firstly a n-conducting sub-layer and later a pconducting sub-layer grow, which sub-layers form and enclose a light-emitting pn-junction; and removal of the substrate by etching.
A preferred embodiment of the present invention will now be described, by way of example only, with reference to the accompanying drawings, of which:
Figure 1 is a cross-section through a LED chip produced from a semiconductor arrangement according to the invention; Figure 2a shows the characteristic of the aluminium concentration as a function of the layer thickness in the semiconductor arrangement; Figure 2b is a cross-section through the semiconductor arrangement; Figure 3 is a view from above of the LED chip according to Figure 1.
In the following an exemplary embodiment of the invention will be explained making reference to the Figures.
Figure 1 is a cross-section through a LED chip which has been produced from a semiconductor arrangement according to the invention. The semiconductor arrangement comprises a first GaAlAs-layer 3.2, 3.1 amphoterically doped with silicon. This first GaAlAs-layer is subdivided into a pconducting sub-layer 3.2 and a n-conducting sub-layer 3.1. Arranged on the surface of the n-conducting sub-layer 3.1 is a second GaAlAs-layer 2 which is n-conducting, for example as a result of doping with tellurium (Te). Contact layers 4, 5 are arranged on the corresponding surface sides of the first and second GaAlAs-layer 2. The aluminium content of the two GaAlAs layers changes continuously and exponentially over the thickness of the respective layer. The characteristic of the aluminium concentration as a function of the layer thickness is shown in Figure 2a in the form of a graph. Figure 2b shows the corresponding points in a cross-section through the semiconductor arrangement.
Viewed f rom the rear of the arrangement (f rom the surf ace of the pconducting sub-layer 3.2) the aluminium content in the first GaAlAslayer continuously increases exponentially from a value of approximately 0 atom-% up to a value of approximately 32 atom-%. This increase also continues without discontinuities over the light-generating pnjunction 3. 3 so that the p-conducting sub-layer 3.2 and the n-conducting sub-layer 3. 1 merge steplessly into one another in respect of the aluminium content.
At the pn-junction 3.3 the aluminium content amounts to approximately 8 atom-o-., corresponding to a wavelength of the emitted light of approximately 880 nm. At the boundary surface to the second GaAlAs-layer 2 the aluminium content of the first layer 3.1 finally amounts to approximately 32 %. At this point the aluminium content jumps to approximately 13 atom-% in the second GaAlAs-layer 2. It is important that here more aluminium is incorporated into the crystal than in the zone of the pn-junction 3.3. Then the band gap is sufficiently large to prevent any noticeable absorption of the light generated at the pn- junction 3.3 so that the second GaAlAs-layer 2 is transparent to this light.
Also in the second layer 2 the aluminium content continuously increases exponentially towards the surface. At the surface it amounts to approximately 25 atom-%. Here it is important that on the one hand the aluminium content at the surface be kept as small as possible so that the layer can be provided with a good electric contact while on the other hand the production process, which will be described later, requires a minimum aluminium content at 6 this point. The stated 25 atom-' has proved particularly advantageous. In the case of the diode chip according to Figure 1 the surface of the p- conducting sub-layer 3.2 of the first GaAlAs-layer is provided with a whole-surface rear contact 4. As the aluminium content in this layer is smaller than at the pn-junction 3.3, this layer is not transparent to the light generated here. The light is thus absorbed and does not reach the rear contact 4. A structured front contact 5, as shown in Figure 3, is arranged on the surface of the second GaAlAs layer 2.
In pulsed operation with a pulse current of approximately 1.5 A, an infrared diode of this type emits a radiated power of approximately 300 mW with an emission wavelength of approximately 870 nm and a forward voltage of approximately 2.8 V. The diode is thus particularly suitable for remotecontrol purposes, photoelectric beam devices, optocouplers and data transmission, also in particular since it can be operated for example from a 3V battery consisting of two cells.
The described semiconductor arrangement is produced with the aid of liquid phase epitaxy processes. Firstly the second GaAlAs-layer 2 is grown from a first melt on the surface of a substrate wafer 1 consisting of GaAs. The composition and geometrical configuration of the melt and the temperature characteristic during the growth are selected such that the aluminium content changes along the thickness of the grown layer, as shown in Figure 2a. At the start of the growth, the aluminium content of the instantaneously growing layer amounts to approximately 25 atom-%. At the end of the growth the aluminium content has fallen to approximately 13 atom-o-. as the melt is rapidly depleted of aluminium. The melt additionally contains a dopant which renders the layer n-conducting. Tellurium (Te) has proved particularly advantageous for this purpose.
7 Then the first GaAlAs-layer 3.1, 3.2 is grown from a second melt onto the surface of the second GaAlAs-layer 2. The second melt contains silicon as dopant. Silicon has the property mentioned in the introduction that it is incorporated either as donor or as acceptor as a function of the temperature at which the growth of the GaAlAs-layer takes place. The pnjunction 3.3 can thus be produced from one melt simply by changing the growth temperature. Also in the case of the growth of the first GaAlAslayer 3.1, 3.2, the composition and geometrical configuration of the melt are selected such that during the growth the aluminium content changes along the direction of growth in accordance with the characteristic shown in Figure 2a. During the growth of the approximately 150 pm thick layer the aluminium content falls from approximately 32 atom-% to approximately 0 atom-05. At the pn-junction 3.3 the aluminium content amounts to approximately 8 atom-05 whereas previously an approximately 30 pm thick, n-conducting sub-layer 3.1 has grown. Due to the low aluminium content the p-conducting sub-layer 3.2 is not transparent to the light generated at the pn-junction 3.3.
When the two GaAlAs-layers 2; 3.1, 3.2 have grown, the substrate 1 is removed. A mixture of NH40H and HA2 'S suitable as etching agent for this purpose. The boundary surface of the second GaAlAs-layer 2 to the substrate acts as etching boundary when the aluminium content at this boundary surface is greater than 24 atom-o-.. Then, under the influence of the etching agent, an oxide forms which is not soluble in the etching agent and which prevents the further attack of the etching agent.
Finally a whole-surface rear contact 4 is applied to the surface of the first GaAlAs-layer 3.2, which corresponds to the rear side of the later diode chip. The surface of the nconducting, second GaAlAs-layer 2 is provided with structured contacts 5 as shown in Figure 3. Then the 8 arrangement is separated into diode chips which are finally mounted in housings.
The process is characterised by its simplicity and permits the production of diodes of high luminous intensity at a comparatively low outlay.
9
Claims (19)
1. A semiconductor arrangement comprising a first GaAlAslayer amphoterically doped with silicon and comprising a pconducting sub-layer and an overlying, n-conducting sublayer, wherein the Al-content continuously increases exponentially over the thickness of the whole of the first layer commencing from the surface side of the p-conducting sublayer and amounts to approximately 0 atom-1; on the surface side of the pconducting sub-layer, approximately 510 atom-% in the zone of the pnjunction and approximately 25-40 atom-0-. on the surface side of the nconducting sublayer; and a second tellurium-doped, n-conducting GaAlAslayer arranged on the surface side of the n-conducting sublayer of the first GaAlAs-layer, wherein the Al-content continuously increases exponentially over the thickness of the whole of the second layer commencing from the boundary surface to the first GaAlAs-layer and at the boundary surface to the first GaAlAs-layer amounts to approximately 6-16 atom-% but in any case is greater than in the zone of the pn-junction and at the surface amounts to at least 24 atom-% but at the maximum corresponds to the Al-content on the surface side of the n-conducting sublayer.
2. A semiconductor arrangement according to Claim 1, wherein the thickness of the p-conducting sub-layer amounts to approximately 100-140 Am and the thickness of the nconducting sub-layer amounts to approximately 20-40 Am.
3. A semiconductor arrangement according to Claim 1 or 2, wherein the thickness of the second GaAlAs-layer amounts to between 40 Am and 60 Am.
4. A semiconductor arrangement according to any of Claims 1 to 3, wherein the Al-content in the zone of the pnjunction amounts to approximately 8 atom-Oi.
S. A semiconductor arrangement according to any of Claims 1 to 4, wherein the rear of the p-conducting sub-layer of the first GaAlAs-layer is provided with a whole-surface contact.
6. A semiconductor arrangement according to any of Claims 1 to 5, wherein a structured front contact is arranged on the surface of the second, nconducting GaAlAs-layer.
7. A semiconductor arrangement substantially as herein described with reference to the accompanying drawings.
8. A light emitting diode device comprising a semiconductor arrangement according to any preceding claim.
9. A process for the production of a semiconductor arrangement comprising the following steps, in order: provision of a monocrystalline substrate wafer consisting of GaAs; growth of a second epitaxial layer consisting of nconducting GaAlAs from the liquid phase of a first melt, wherein the Al-content continuously decreases exponentially over the thickness of the whole of the second epitaxial layer in the direction of growth and at the start of the epitaxial growth amounts to at least 24 atom-0i; growth of a first epitaxial layer consisting of GaAlAs from the liquid phase of a second melt, wherein the Al-content continuously decreases exponentially over the thickness of the whole of the first epitaxial layer in the direction of growth and at the start of the epitaxial growth amounts to 25-40 atom-i, and the second melt is doped with silicon in such manner that firstly a n-conducting sub-layer and later a pconducting sub-layer grow, which sub-layers form and enclose a light-emitting pn-junction; and removal of the substrate by etching.
10. A process according to Claim 9, wherein the Al-content amounts to approximately 5-10 atom-0i in the zone of the pnjunction.
11. A process according to Claim 9 or 10, wherein at the start of the epitaxial growth of the second epitaxial layer the Al-content corresponds at the maximum to the Al-content at the start of the epitaxial growth of the first epitaxial layer.
12. A process according to any of Claims 9 to 11, wherein the growth of the second epitaxial layer is terminated in the case of an Al-content which amounts to approximately 616 atom-Oi but in any case is greater than in the zone of the pn-junction.
13. A process according to any of Claims 9 to 12, wherein the first melt contains tellurium as dopant.
14. A process according to any of Claims 9 to 13, wherein the epitaxial growth of the first epitaxial layer takes place up to a total thickness of approximately 150 Am, the thickness of the n-conducting sub-layer amounting to approximately 30 Am.
15. A process according to any of Claims 9 to 14, wherein the Al-content of the first epitaxial layer has fallen to approximately 0 atom-% at the end of the growth.
16. A process according to any of Claims 9 to 15, wherein the substrate is removed by means of an etching solution consisting of NH40H and H,O,.
17. A process according to Claim 16, wherein the Alcontent of the second epitaxial layer at the boundary surface to the substrate is selected such that the boundary surface terminates the etching attack upon the removal of 12 the substrate.
18. A process for the production of a semiconductor arrangement substantially as herein described with reference to the accompanying drawings.
19. A process according to any of claims 9 to 18 for the production of a light emitting diode device.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1996130689 DE19630689C1 (en) | 1996-07-30 | 1996-07-30 | Semiconductor device and manufacturing method |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9715319D0 GB9715319D0 (en) | 1997-09-24 |
GB2315920A true GB2315920A (en) | 1998-02-11 |
GB2315920B GB2315920B (en) | 2000-12-06 |
Family
ID=7801249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9715319A Expired - Lifetime GB2315920B (en) | 1996-07-30 | 1997-07-21 | Semiconductor arrangement |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPH10107314A (en) |
DE (1) | DE19630689C1 (en) |
GB (1) | GB2315920B (en) |
TW (1) | TW408507B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10056476A1 (en) * | 2000-11-15 | 2002-05-23 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor body used as a light emitting diode comprises a radiation-producing layer sequence and a window layer having one or a number of subsequent aluminum gallium arsenide layers produced by liquid phase epitaxy |
DE10329079A1 (en) * | 2003-06-27 | 2005-01-27 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor component |
US7307284B2 (en) * | 2000-07-05 | 2007-12-11 | Osram Gmbh | Luminescent diode |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19962037A1 (en) * | 1999-12-22 | 2001-07-12 | Vishay Semiconductor Gmbh | Illuminating diode used in wireless data transmission has a light-producing layer sequence made of gallium aluminum arsenide and a neighboring p-conducting semiconductor layer |
DE10039945B4 (en) * | 2000-08-16 | 2006-07-13 | Vishay Semiconductor Gmbh | A method of fabricating a dual heterostructure GaAIAs light emitting semiconductor device and corresponding semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0143957A1 (en) * | 1983-10-28 | 1985-06-12 | Siemens Aktiengesellschaft | Process for making A3B5 light-emitting diodes |
EP0317228A2 (en) * | 1987-11-13 | 1989-05-24 | Mitsubishi Kasei Polytec Company | Epitaxial wafer |
US5525539A (en) * | 1994-09-27 | 1996-06-11 | Opto Diode Corporation | Method for forming a light emitting diode for use as an efficient emitter or detector of light at a common wavelength |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0356027A1 (en) * | 1988-07-29 | 1990-02-28 | Kuraray Co., Ltd. | Near-infrared ray absorbent resin composition and method for production thereof |
-
1996
- 1996-07-30 DE DE1996130689 patent/DE19630689C1/en not_active Expired - Lifetime
-
1997
- 1997-07-15 TW TW86109937A patent/TW408507B/en not_active IP Right Cessation
- 1997-07-21 GB GB9715319A patent/GB2315920B/en not_active Expired - Lifetime
- 1997-07-29 JP JP23531697A patent/JPH10107314A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0143957A1 (en) * | 1983-10-28 | 1985-06-12 | Siemens Aktiengesellschaft | Process for making A3B5 light-emitting diodes |
US4606780A (en) * | 1983-10-28 | 1986-08-19 | Siemens Aktiengesellschaft | Method for the manufacture of A3 B5 light-emitting diodes |
EP0317228A2 (en) * | 1987-11-13 | 1989-05-24 | Mitsubishi Kasei Polytec Company | Epitaxial wafer |
US5525539A (en) * | 1994-09-27 | 1996-06-11 | Opto Diode Corporation | Method for forming a light emitting diode for use as an efficient emitter or detector of light at a common wavelength |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7307284B2 (en) * | 2000-07-05 | 2007-12-11 | Osram Gmbh | Luminescent diode |
DE10056476A1 (en) * | 2000-11-15 | 2002-05-23 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor body used as a light emitting diode comprises a radiation-producing layer sequence and a window layer having one or a number of subsequent aluminum gallium arsenide layers produced by liquid phase epitaxy |
DE10056476B4 (en) * | 2000-11-15 | 2012-05-03 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor body and method for its production |
DE10329079A1 (en) * | 2003-06-27 | 2005-01-27 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor component |
US7629670B2 (en) | 2003-06-27 | 2009-12-08 | Osram Opto Semiconductors Gmbh | Radiation-emitting semi-conductor component |
DE10329079B4 (en) * | 2003-06-27 | 2014-10-23 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor component |
Also Published As
Publication number | Publication date |
---|---|
DE19630689C1 (en) | 1998-01-15 |
TW408507B (en) | 2000-10-11 |
GB2315920B (en) | 2000-12-06 |
JPH10107314A (en) | 1998-04-24 |
GB9715319D0 (en) | 1997-09-24 |
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Legal Events
Date | Code | Title | Description |
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732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
PE20 | Patent expired after termination of 20 years |
Expiry date: 20170720 |