GB2313506A - Digital filter - Google Patents

Description

2313506 TONE FILTER The present invention relates to apparatus and methods

for filtering musical tones.

INTRODUCTION

It is known that digital filters can provide improvements in performance in comparison with analogue filtering techniques. However, in the field of audio signal processing, known digital filters lack certain of the characteristics of analogue filters which are important for the creation and or modification of musical tones.

SUMMARY OF THE INVENTION

According to a first aspect of the invention, a digital 11fter is provided for digitally filtering samples representing an audio signal, comprising a plurality of processing elements and a feed-back path, wherein a non-linear element having a non-linear characteristic is included in said feed-back path. Said non- linear characteristic may be controlled, such that the degree of non-linearity is controllable in real time.

According to a second aspect of the present invention, a method is provided of sampling digital samples representing an audio signal, comprising steps of supplying digital samples of an audio signal to a digital filtering means, filtering said samples via a plurality of processing elements including a feed-back path, wherein said feedback path includes a non-linear element, and receiving sampled signals from an output of said filter.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows a musical instrument arranged to generate sounds, including a musical synthesizer; Figure 2 details modules in the synthesizer shown in Figure 1, including tone generation; Figure 3 details the tone generation module shown in Figure 2, including a state variable filter, Figure 4 details processes for implementing a known form of the state variable filter shown in Figure 3; Figure 5 details processes for implementing an improved version of the state variable filter shown in Figure 3, including a polynomial transfer function; Figure 6 shows a graphical representation of the polynomial transfer function shown in Figure 5; Figure 7A details input and output level controllers for the state variable filter shown in Figure 5; Figure 713 details input and output level controllers for cascaded state variable filters of the type shown in Figure 5; Figure 8 compares the response of the filter shown in Figure 4 with the filter shown in Figure 5, to a constant amplitude square wave, with both types of filter arranged to self-oscillate; Figure 9 compares the response of the filter shown in Figure 4 with the filter shown in Figure 5, to a variable amplitude square wave, with both types of filter arranged to self-oscillate; Figure 10 details the hardware circuitry of the preferred embodiment of the tone generator shown in Figure 3, including the filter shown in Figure 5; Figure 11 details the hardware circuitry of an alternative embodiment of the tone generator shown in Figure 3, including the filter shown in Figure 5, including a digital signal processor; Figure 12 details instructions for the digital signal processor shown in Figure 11, required to implement the filter arrangement indicated in Figure 7A; Figure 13A shows processes for implementing a corner peaking filter, as an alternative to the state variable filter shown in Figure 5, including an improved low pass filter section; and Figure 13B details the improved low pass filter section shown in Figure 13A.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

3 The invention will now be described by way of example only with reference to the accompanying drawings, identified above.

A musical synthesizer 101 is shown in Figure 1 which supplies an audio signal to a stereo amplifier 102, which supplies audio signal transducers, such as loudspeakers 103 and 104 with an amplified audio signal. The audio output from the musical synthesizer 101 may also be supplied to audio recording apparatus such as a tape recorder, such that sounds resulting from playing the synthesizer 101 maybe replayed.

Modules operating in the musical synthesizer shown in Figure 1 are detailed in Figure 2. A keyboard 201 generates electrical signals in response to notes played on ft. The elechical signals are supplied to interface and control processing circuitry 202. The electrical signals are interpreted by control processing instructions running on a control processor 202 to generate electrical signals suitable for controlling tone generation circuitry 203, which generates tones of an appropriate pitch, volume and timbre, in response to notes played on the keyboard 201.

Analog audio signals from the tone generation circuitry 203 are supplied to left and right audio outputs 204 via a stereo digital to analogue converter 221.

Audio samples are generated once for left and right at a rate of fortyfour point one kilohertz. The stereo digital to analogue converter 221 includes an oversampling integrated circuit, the SM5803APT, manufactured by Nippon Precision Circuits.

The SM5803 generates an over-sampled representation of the stereo digital audio signal, which is supplied at eight times forty-four point one kilohertz, to a high speed digital to analogue converter, an AD1864WK, manufactured by Analog Devices of Norwood, Massachusetts.

A musical instrument digital interface (MIDI) 205 is an alternative source of note information, in addition to the note information supplied from the keyboard 201. A MIDI input 206 may be connected to receive signals from another item of MIDI compatible equipment, such as a computer. Using the MIDI connection, sounds may be produced by the synthesizer without notes being played on the keyboard 201. Electrical signals generated in response to notes played on the keyboard 201 may be translated into suitable MIDI codes which may in turn be 4 supplied to a MIDI output 207. By providing a MIDI input 206 and a MIDI output 207 on the synthesizer 101, note events resulting from a musician playing the keyboard 201 may be recorded and played back by a computer equipped with a MIDI interface and a suitable sequencing program.

Front panel controls 209 provide means for controlling the type of sounds produced when the keyboard 201 is played. The front panel controls 209 include means for selecting pre-defined characteristics of sounds from a library of sounds stored in a memory of the control processor 202. In response to manual operation of the front panel controls 209, the interface and control processing circuitry 202 may supply electrical signals to front panel display devices 210, such as an alphanumeric display 211 and light-emitting diode indicators 212. The front panel display devices 210 give an indication of the status of the synthesizer, for example displaying the library number and description of a pre-defined tone generation characteristic which is currently in operation.

The front panel controls 209 and the front panel display devices 210 in combination provide facilities for the modification of pre-defined characteristics of tone generation, the results of which may be stored in memory for later use.

Operations required for tone generation are summarised in Figure 3. A tone generator 301 receives frequency and tone-defining parameters from the interface and control processing circuitry 202. In the preferred embodiment, the tone generator 301 generates tones substantially in accordance with the method described in patent application GB9417943.9. The tone generator generates audio samples at the standard audio sampling rate of forty-four point one kilohertz. Furthermore, each audio sample is represented as a binary number having a precision of twenty-four bits.

Samples from the tone generator 301 are supplied to a state variable filter 302, which receives frequency and resonance control parameters from the interface and control processing circuitry 202 shown in Figure 2. The state variable filter 302 generates samples at the standard sampling rate, again having a precision of twenty-four bits, which are supplied to an amplitude modulator 303. The amplitude modulator receives each individual sample and multiplies it by a left amplitude factor to define the left channel sample, and by a right amplitude factor to define the right channel sample. The left and right amplitude factors are supplied by the interface and control processing circuitry 202.

Thus, when a note is played on the keyboard 201, or a midi note on event is received by the midi input 206, the interface and control processing circuitry 202 supplies control parameters to the tone generator 301, the state variable 302 and the amplitude modulator 303. The tone generator 301 defines a pitch and a primary harmonic structure to the tone which will eventually be heard. The state variable filter 302 modifies the primary harmonic structure, increasing the amplitudes of some harmonics and reducing the amplitudes of others, according to the frequency and resonance parameters supplied to ft. The amplitude modulator 303 controls the amplitude envelope of the resulting tone, such that the sound increases rapidly in amplitude when the note is initially played, and then may decay more slowly when the note is released. The amplitude envelope may be defined as a set of user controllable parameters via the user interface 209 and 210. Furthermore, the left and right amplitudes may be independently set, thus achieving a particular position in the stereo field, or a dynamic stereo movement while the note is held.

By appropriate manipulation of the parameters supplied to the tone generator 301 and the state variable filter 302, dynamic changes in harmonic structure may be achieved. Thus a note may start with an extremely bright tone, and decay quickly to a less bright tone, in accordance with a tone envelope defined by the user via the user interface 209.

It is known that parameters supplied to a state variable filter 302 provide a highly intuitive approach to controlling harmonic structure, especially compared to those required for a tone generator based purely on phase modulation, such as that described in US 4,018,121. Thus ft is highly desirable that the effects achieved by manipulation of the state variable filter should be as dramatic and musical as possible. A straightforward implementation of a state variable filter, when performed to a high level of precision, results in a clean undistorted waveform. Thus, although harmonics are cut or boosted, sometimes to a great extent, the overall character of the sound is not dramatically changed. This transparent quality is therefore inferior to the intrinsically additive quality of 6 analogue processing, when musical synthesis is being performed.

A straightforward implementation of a twelve decibel-per-octave state variable filter is shown in Figure 4. An audio input sample 401 is supplied to an adder 402. The adder also receives a negated version of the low-pass output 413 and a negated version of the band pass output 406 via a multiplier 408. Thus the output of the adder 402 represents the high-pass output 403 of the filter. The high pass output 403 is also supplied as an input to a multiplier 404, which multiplies by a frequency control parameter FC. The output of the multiplier 404 is supplied to a digital integrator, comprising adder 405 and sample delay 407.

A band pass output 406 is derived from this stage of integration. The output of the band-pass integrator is supplied to a multiplier 408. This multiplier multiplies by a parameter QC, which defines the resonance, or band pass peak amplitude, of the state variable filter. Thus, when QC has a value of one, resonance is only slight. When QC is reduced to near zero, the filter rings at its resonant frequency.

If QC is equal to zero, the filter oscillates continuously in response to a single pulse supplied at its input. If QC is negabve, this creates positive feedback, and any pulse supplied at the input 401 to the filter will result in a gradual increase in amplitude of sine wave oscillations at the frequency of the filter defined by the frequency parameter FC. The output of the sample delay 407 is supplied to a third multiplier 409, which has the same frequency control parameter FC as the multiplier 404. The output of multiplier 409 is supplied to a second stage of integration comprising adder 410 and sample delay 414. This integration stage results in a low pass output 413 being generated, which is the most useful output from the state variable filter. A notch output 412, is generated by adding the high pass 403 and low pass 413 outputs in an adder 411. The notch output 412 rejects all frequencies except those in a narrow band, thus it is also known generally as a band reject output. Characteristics for all four outputs of a state variable filter are described in Musical Applications of Microprocessors, by Hal Chamberlin, ISBN 0 8104-5753-9, pages 206 to 207. The digital implementation of a state variable filter is described on pages 441 to 444 of the same book.

The operations required to calculate the four output samples 403, 406, 413 and 412, may be summarised by the following mathematical sequence:

7 LP LP + FC x BP HP INPUT - LP - QC BP BP FC HP + BP NT HP + LP where LP low pass sample, BP = band pass sample, HP = high pass sample, NT = notch sample, FC = frequency control parameter and QC = resonance or a control parameter.

The arrangement of mathematical operations represented by Figure 4 may be performed by suitable muffiplexing of a small number of digital logic circuit functions. For example, the multipliers 404, 408 and 409 are all implemented on a common multiplier, with appropriate control signals to define its operations. The adders may similarly be multiplexed arrangements of a single arithmetical logic circuit.

A problem with the arrangement shown in Figure 4 is that low or negative values of QC result in distorted ringing or oscillations. It is precisely this type of behaviour which makes analogue state variable filters so useful, as the change in harmonic structure is most dramatic when ringing or oscillation occur. In any practical digital circuit, negative values of OC applied in the filter shown in Figure 4, will result in clipping of waveforms to the maximum value of the data which may be represented in the binary system which is being used. This type of distortion is inherently urimusical, and always occurs at the absolute maximum amplitude of signals which may be represented. Furthermore, it is known that the overall ampRude response of a state variable filter increases dramatically when low values of QC are used to generate ringing. Thus, when ringing is obtained, it is likely that clipping will occur.

An improved state variable filter is shown in Figure 5. The same overall structure is used. However, the sample which is most likely to overload and result in clipping is the low pass sample 516. This sample is limited according to the polynomial function 515. Samples are considered as having a fractional value between -1 and +.999999, thus the polynomial function is a transfer function which 8 also generates an output in the same numerical range as its input. The polynomial function 515 prevents clipping from occurTing over a wide range of filtering conditions such as low values of QC. The polynomial function 515 also ensures that amplitudes of filter oscillation arising from negative values of QC are limited progressively before clipping occurs, such that the distorting harmonics which are added to the oscillating waveform are subtle and more musical.

The mathematical sequence required to calculate low pass, band pass, high pass and notch output samples from an input sample according to the improved filter structure shown in Figure 5 is:

LP (LP - LP A 3) + FC x BP HP INPUT - LP - QC x BP BP FC x HP + BP NT HP + LP where, as before, LP = low pass sample, BP = band pass sample, HP = high pass sample, NT = notch sample, FC = frequency control parameter and QC resonance or Q control parameter.

In addition to ensuring stability of the filter at extreme conditions of resonance, waveform quality is affected even when the filter is largely non resonant. The degree to which waveform quality is affected depends on the peak amplitude of the samples supplied to the input 501 of the filter. In the preferred embodiment, samples are represented by twenty-four bit fractional two's complement binary numbers. This represents a signal-to-noise ratio of approximately 144 decibels. Thus samples may be reduced in amplitude by a considerable degree, without unduly compromising the audio quality. For example, if the peak amplitude is represented by only sixteen of the twenty-four bits, this is forty-eight decibels quieter than a full scale signal, but the signal-to- noise ratio is still extremely high at ninety-six decibels.

By adjusting the amplitude of samples supplied to the filter, it is possible to affect the degree to which the polynomial function adds harmonics. The output samples from the filter may then be multiplied by a reciprocal amount, thus 9 maintaining an overall constant amplitude filter, but having a variable degree of non-linearity. It should be noted that, because the polynomial function is included in a feedback loop of the filter, non-linear effects are complex, and spread out over time. This is especially true, when ringing or self-oscillation of the filter is achieved 5 by low or negative values of QC.

A graph of the polynomial function 515 shown in Figure 5 is shown in Figure 6. A linear region of the graph may be used when input samples are of a sufficiently low peak-to-peak amplitude. As amplitudes are increased, the distorting effect of the polynomial function becomes increasingly prevalent, including reducing extremely large input values to extremely low input values. By using a high precision binary number, such as the twenty-four bits used in the preferred embodiment, a simple polynomial function may be used to define a wide range of non-linear filter behaviour.

Two polynomial functions are shown in Figure six. These are x - x A 3 and x X A 5. In the preferred embodiment, X _ X A 3 is used, as this requires the least calculation, and introduces distorting effects more gradually than x - x A 5. A function of x - x t% 2 is not directly suitable, as negative inputs result in positive outputs. However, logical arithmetic circuits may be arranged to perform inversion of the output from X _ X A 2, when it is known that the input is negative. This is not the preferred embodiment, as this represents an additional circuit complication.

An arrangement for selecting the degree to which the polynomial function 515 affects filter behaviour is shown in Figure 7A. An input sample 701 is supplied to a multiplier 702, which multiplies by an integer value A. The output from the multiplier 702 is supplied to the filter 703 shown in Figure 5. The output 516 from the filter 703 is supplied to a second multiplier 704, which multiplies by the reciprocal of A, to supply an output 705. Thus samples arriving at the input 701 have a notional full scale peak-to-peak amplitude represented by the full twenty four bits of precision which are available. Multiplier 702 reduces this precision by multiplying by a particular value. It should be noted that multiplication by an integer in a fractional domain multiplier has the effect of reducing amplitude - it is considered as a fraction, as is known.

The filter then processes the sample, with no practical loss of quak due to the long twenty-four bit word length. The output from the filter is then compensated by multiplier 704, such that the amplitude response of the arrangement shown in Figure 7A is largely independent of the gain factor A used in multiplier 702. The relationship is not completely independent, due to the non linear effect of the polynomial function 515 at medium to high amplitudes. Thus, the non-linear behaviour of the filter is selected by modifying the values used in the multipliers 702 and 704. When A is large, the polynomial function 515 dominates the fitter characteristic. When A is small, the polynomial function 515 may be effectively absent. A wide range of behaviours is exhibited by the filter between these two extremes, especially when values of QC are low or negative.

Two twelve decibel-per-octave state variable filters may be cascaded in order to achieve an overall frequency response of 24 decibels per octave. Such an arrangement is shown in Figure 7B. In this arrangement, amplitude adjustment is performed by the multiplier 712 and the multiplier 717 at respective ends of the cascaded filter chain. Thus, again, a wide range of non-linear effects may be achieved, but this time having a general response of twenty-four decibels- per octave, which is sometimes considered more applicable to the synthesis of certain types of musical tone than a simpler twelve decibel-per-octave filter. It is possible to achieve band pass, high pass, notch or band pass filter functions, by cascading the input of the second filter 714 from the appropriate output of the first filter 713.

The response of the arrangement shown in Figure 7A is compared with the known filter arrangement of Figure 4, in Figure 8. A square waveform 801 of constant amplitude is supplied to the input of the filters. Waveform 802 is the low pass output 413 of the known state variable filter shown in Figure 4. The filter has a negative value of QC, which results in sine wave oscillations being added to the filtered square wave. With a negative value of QC, there is overall positive feedback, and the oscillations quickly build, such that the sum of the oscillation waveform and the filtered square waveform go beyond the numerical range of the fitter circuitry, resulting in waveform clipping at 812 and 813.

The square wave 801 is set to zero amplitude 811 in order to show the property of self-oscillation. Thus, clipped sine wave oscillations 814 continue even when the input samples are all set to zero.

11 Waveform 803 shows the low pass output 516 of the filter shown in Figure 5. Again a negative value of QC results in self-oscillation. However, this is restricted smoothly, resulting in a musically useful waveform 815. The addition of the filtered square wave and the self oscillating sine wave is non-linear, resulting in interesting frequency domain artifacts, which are not easily distinguished without complex frequency and time domain analysis. However, the difference in shape between waveforms 802 and 803 at times when waveform 802 is not clipping, may be considered as evidence of this fact.

Waveform 804 is again the output 516 from the filter shown in Figure 5.

However, this waveform results from an increased peak-to-peak amplitude of the input signal 501 compared to that which causes waveform 803. The waveform amplitudes have been normalised by the multiplier 704 shown in Figure 7A.

Comparison of the waveform shapes shows that the change in amplitude of the input signal results in a change in the non-linearity of the addition between the filtered square wave and the self-oscillation of the filter. Again, this represents a musically useful result. The output from the filter continues oscillating at point 818 after the input square wave samples are reduced to zero.

The use of self-oscillating fitter settings enables the differences between filter behaviours to be demonstrated visually in the form of the graphs shown in Figure 8. However, the effects of the polynomial function are important without the necessity for self oscillation, as even without negative values of QC, the filter has a degree of ringing, which may be audible, or affect the waveform in a subtle way, and thus result in complex non-linear effects being spread out over time.

A similar set of graphs is shown in Figure 9, but with the square wave gradually increasing in amplitude to a peak, and then decaying suddenly. The waveform 901 from the known state variable filter shown in Figure 4 rapidly commences self oscillation 911, the waveform of which is linearly added to the filtered square wave, quickly building to a point 914 where clipping occurs.

Thereafter, the filter continues oscillation and clipping 915.

The waveform 903 of the output from the filter shown in Figure 5 adds the oscillating and filtered square wave components slightly differently at point 912 to the completely linear addition at point 911. By chance, these waveforms are out of 12 phase when the square wave reduces to zero amplitude 9 13, and self- oscillations 916 build up quickly to a maximum defined gradually by the polynomial function 515.

The waveform 904 represents the behaviour of the fitter which generated the waveform 903, but where the filter is supplied with signals having a greater peak-to-peak amplitude. Thus, the addition of the oscillating and filtered square wave components is more non-linear. Because the amplitude of the square wave is high, this predominates in the waveform which results, which can be seen as having a wavelength equal to that of the square waveform 901 while it is present.

When the square waveform reduces to zero 913, the self oscillations take over 918, which have a shorter wavelength, as defined by the frequency control parameter FC of the filter.

Again, in order to visually distinguish important characteristics, the filter waveforms shown in Figure 9 result from filters with negative values of QC, thus resulting in self-oscillation. Important effects of this type, but which are less easy to discern visibly in a graph, occur without self- oscillation or even any audible level of ringing. These effects are important for the musical properties of the filter.

Digital circuitry for the preferred embodiment is detailed in Figure 10. The circuitry shown performs the fundamental mathematical processes required to implement the three synthesizer processes shown in Figure three, which are: the tone generator 301, state variable filtering 302 and the amplitude modulator 303.

The circuit is based around a twenty-four by twenty-four bit multiplyaccumulator 1001. The multiply-accumulator 1001 receives two twenty-four bit numbers simultaneously supplied from a Y data bus 1003 and an X data bus 1004. Two basic operations may be performed: The X and Y data bus inputs are multiplied and supplied as an output to the X data bus, or the X and Y data bus inputs are multiplied and also added to the previous multiplication result, a process known as multiply-accumulation. Variants on these two processes are possible. For example, numbers may be in a two's complement or unsigned format.

Numbers may also be in a fractional or integer format, affecting the shifting of multiplication product bits. Furthermore, instead of adding, new products may be subtracted from the previous product or sum of products.

13 The X data bus 1004 and the Y data bus 1003 are connected to a dual port random access static memory array 1002, arranged as five hundred and twelve locations, each containing a twenty-four bit value. Nine bit addresses are supplied independently to each port of the dual port memory 1002. Thus, data from any location in the memory array may be supplied to either data bus. Reading from the same location simultaneously on both ports is permitted. The dual port memory array 1002 also permits data from either data bus to be written to any location in memory. However, writing to the same location simultaneously is not permitted, and has unpredictable results. Protocols are known for prioritising such a conflict.

However, circuit complexity is minimised by prohibiting the designer from supplying the same address to both ports of the dual port memory array 1002 when both ports are being written-to.

Addresses for the dual port memory array are supplied from a pipelined control store, which is not shown in Figure 10 for reasons of clarity. The control store is a read-only memory array whose address is supplied by a counter. The counter increments at twenty megahertz, thus a new data pattern is supplied by the control store once every fifty nanoseconds. The output from the control store is supplied to a pipeline register, which transfers the data supplied at its input, to its output, also at a rate offorty megahertz. The same clock which increments the address of the control store read-only memory array also clocks the pipeline register. In this way, propagation delays are reduced for control store signals, such that circuitry which is being controlled may be operated at a high speed.

Pipelined control store outputs are designated CO to C39. C31 to C39 supply addresses directly to port B of the dual port memory array 1002. C22 to C30 supply addresses to port A of the dual port memory array 1002 via a buffer 1009 and a register 1010. In order to define parameters of tones which are being generated, parameters must be supplied from a control processor to the dual port memory array 1002. Thus an access cycle is permitted, during wWich the buffer 1009 has its output set to a high impedance. SimultaneouOly,'the output impedance of a nine-bit register 1008 is set to low impedance, thihs supplying an alternative address which is defined by the controlling processor. Thus addresses may be supplied to port A of the dual port memory array 1002 from either the 14 control store via the buffer 1009, or from the controlling processor, via the register 1008. An additional pipeline register 1010 is required to avoid timing delays introduced by switching between either address source.

Register 1008 receives nine bit addresses for the location in dual port memory which is to be written-to. Data which is to be written to this location is supplied from a twenty-four bit data register 1007. Thus, control lines are activated in such a way that, periodically, an address defined by the control processor is written to with data also defined by the control processor. The buffer 1009, and registers 1007, 1008 and 1010 are all dedicated to the task of writing parameters to the dual port memory array 1002.

Parameters stored in the dual port memory array 1002 may then be supplied to the multiply accumulator 1001, and intermediate results stored back in spare locations in the dual port memory array 1002. The various types of operation which may be performed by the multiply-accumulator are defined by control lines CO to C7. These are changed every fifty nanoseconds. Furthermore, the multiply-accumulator 1001 contains data pipeline registers to achieve a high speed, and the multiply-accumulator 1001 therefore also receives the same twenty megahertz clock signal. Arithmetic processes performed by the circuit are clocked at a rate of twenty megahertz. Thus, in each fifty nanosecond clock cycle, a muffiply-accumulation may be performed, simultaneously with a read or write to both ports of the dual port memory array 1002.

It should be noted that the write enable controls of the dual port memory array are supplied by control lines C8 and C10. These are supplied indirectly from the control store, as their timing must be carefully controlled to prevent a partial write to a memory address occurring while address lines are still settling.

The circuit shown in Figure 10 includes a nine bit register 1005 supplied by the X data bus 1004. Thus, when control line C12 is asserted, data from the X data bus is transferred to the output of register 1005. The nine bit output is supplied as an address to a waveform memory 1006, which effectively contains a five hundred and twelve step sine wave look-up table and a five hundred and twelve step cosine look-up table. Sine or cosine outputs are selected by control lines Cl 3 or C14. Each addressed location contains a twenty- four bit data word. In the preferred embodiment, silicon area is reduced by storing a single quadrant sine wave in one hundred and twenty-eight physical read-only memory locations.

Other sine quadrants and the four cosine quadrants are be calculated by arithmetic manipulation of address lines and or the data.

The purpose of the sine and cosine read-only memory 1006 is to facilitate the tone generator 301, indicated in Figure 3. Details of the mathematics of tone generation for the preferred embodiment are shown in patent application G139417943.9. Alternatively, another waveform generation technique may be used, such as additive synthesis or physical modelling.

The filter shown in Figure 5 can be summarised as the short sequence of mathematical operations which has already been described. This sequence of operations is translated into a map of control line states, such that memory read and write cycles and multiply accumulator operations are co-ordinated to achieve the desired mathematical result. This result may then be stored in a location in the dual port memory array 1002.

In particular, the operations required to perform the polynomial function are as follows: firstly the low pass sample is supplied to both inputs of the multiply accumulator 1001, such that the low pass sample is squared. Next, the low pass sample is multiplied by one, such that the next stage may be performed. Finally, the result from the squaring process is supplied on the X data bus 1004 at the same time as the original low pass sample is again supplied on the Y data bus 1003. The final operation is a negated multiply-accumulation, such that the product of the original low pass sample and its square is subtracted from the original low pass sample. In this way, the function of x - x A 3 is achieved.

This method of simple polynomial calculation takes advantage of the high precision multiplier, which is required for other filter calculations. The same effect might be achieved using a polynomial curve stored as a data sequence in an area of read-only memory used for a look-up table. However, this technique requires steps for linear interpolation in order to avoid interpolation distortion. Thus, without the multiplication method, a polynomial process has two disadvantages, which are increased processing time to perform linear interpolation, and additional memory, such as one thousand and twenty four locations of read-only memory. This 16 represents a considerable additional expense, which is why a simple polynomial is used which may be calculated in a minimum number of cycles.

Using the circuit shown in Figure 10, operations are performed at a rate of twenty million per second. With an audio sampling rate of forty-four point one kilohertz, this provides a control sequence of four hundred and fifty- three steps.

The calculation of a tone generator 301, a state variable filter 302 and an amplitude modulator 303 does not consume all the steps which are available. In fact, several such calculation sequences may be performed, enabling more than one note to be played at a time. Thus each left and right output 304, from each independent tone generating sequence may be summed to form an overall left and right sample pair. Summing of each of the left and right output totals is performed by repeated multiply accumulations.

Once a left and right output sample has been calculated, each is supplied, at a predetermined point in the four hundred and fifty three step cycle, to an output register 1012. This has a data width of twenty-four bits, although the mathematical precision of the subsequent digital-to-analogue conversion stages is only eighteen of the most significant bits. Once supplied to the parallel output register 1012, data is shifted sequentially in a serial format from a shift register 1013, under control of clocks derived from the digital-to-analogue converter. The circuit of Figure 10 is synchronised to a master sample clock running at forty-four point one thousand kilohertz, the audio sampling rate. Synchronisation is performed by resetting the counter which supplied addresses to the control store which generates the control lines CO to C39. This synchronisation is such that the final fifty nanosecond cycle in each four hundred and fiftythree step sequence is allowed to finish before the counter resets. Furthermore, because the relationship between the processing clock of twenty-mega hertz and the sample rate of forty-four point one kilohertz is not an integer ratio, some cycles will contain four hundred and fifty-four steps. Thus a dummy cycle, preventing data from being corrupted, must be present at the end of the four hundred and fifty-three steps which are always done. The serial data is decoded in accordance with known techniques for serial audio data decoding, and which are described in detail in data literature -aV. Iiiable on request from Analog Devices, One Technology Way, P.O. Box 9106, Norwood, MA 17 02062-9106, USA.

In the preferred embodiment, the circuitry of Figure 10 is integrated within a single silicon chip. It will be understood that this will only be economically feasible if large quantities of such a chip are to be sold. In an alternative embodiment for low volume manufacture, a DSP56004 digital signal processor may be used to perform the required mathematical operations. The DSP56004 is manufactured by Motorola, and literature is available on request from Motorola literature distribution, P.O. Box 20912, Phoenix, Arizona 85036, USA.

A circuit employing the DSP56004 as an alternative to a high volume manufactured custom silicon chip is shown in Figure 11. The digital signal processor 1101 receives control parameters from the host processor, in this case a Motorola 68331, via a serial host interface 1103. Parameters may be stored in memory on the digital signal processor chip, and additionally on a CY7C1 98 thirty two kilobyte static random access memory, manufactured by Cypress Semiconductor Corporation, 3901 North First Street, San Jose, California 95134.

An address bus 1105 supplies addresses to the memory 110, and an eight bit data bus 1106 reads and writes data from and to the memory 1104. The DSP56004 may treat memory as comprising twenty-fbur bit words.

Thus, each byte location in the memory 1104 is one third of a data word. The address bus 1105 and data bus 1106 are multiplexed within a memory access cycle, such that a full twenty-four bit word is written or read by the digital signal processor 110 1.

The digital signal processor contains arithmetic circuits having a minimum precision of twenty-four bits, thus making it suitable for a high quality implementation of the invention. Digital audio data is supplied from a serial audio interface on the digital signal processor 1101 over a serial audio bus 1107, conforming to the protocol known as Inter-integrated Circuit. Thus, the audio data may be supplied to a digital-to-analogue converter in accordance with a widely adopted protocol.

Instructions for the DSP56004 digital signal processor shown in Figure 11 for calculating the filter shown in Figure 7A are detailed in Figure 12. It should be understood that this is not a complete set of instructions for implementing a 18 synthesizer on the DSP56004. However, the presentation of instructions shown in Figure 12 should enable the experienced digital signal processing engineer to establish a working embodiment of the invention, and supply it with samples from a tone generator or other source of digitized musical tones.

An alternative to the improved state variable filter shown in Figure 5, suitable for implementation on either of the hardware embodiments which have been described, is shown in Figure 13A. Essentially the filter comprises four cascaded six decibel-per-octave low pass filter sections, 1303, 1304, 1306 and 1307. Each low pass filter section operates according to the improved arrangement shown in Figure 1313. In combination the result is a twenty- four decibel-per-octave frequency response. Negative feedback 1308 is supplied to an adder 1301 which also receives the input sample. The degree of negative feedback is controlled by a multiplier 1309, having a feedback control variable QC.

Without any negative feedback, the filter operates in accordance with a reasonably flat frequency response, without any particular range of frequencies being boosted beyond their original amplitude. As negative feedback is introduced, a small band of frequencies below the cutoff frequencies of the low pass filter sections is boosted. Thus ringing effects and oscillation similar, though not identical to those produced by the filter shown in Figure 5, are achieved. The relationship between QC and actual resonance is extremely non-linear, and is also linked to the cutoff frequency of the low pass filter sections 1303, 1304, 1306 and 1307. However, it is possible to calibrate such a system, which may be beneficial in providing an alternative filter characteristic. In particular, the different low pass filter sections may be supplied with different frequency constants, thus making the filter highly adaptable in a way that would not be possible using the state variable filter shown in Figure 5.

Each low pass filter section shown in Figure 13A is defined in accordance with Figure 1313. A multiplier 1321 adjusts the amplitude of the signal prior to filtering, as the gain of the filter is frequency dependent. An adder 1322 combines the adjusted input signal with a proportion of its output which hat been delayed by one sample in the delay stage 1323. A non-linear process 1325 provides a degree 19 of non-linearity, which is controlled according to the average amplitude of signals supplied to the filter. The degree of feedback is controlled by a multiplier 1324, having a gain related to that of the first. multiplier 132 1. This forms an improved version of the standard discrete- time infinite impulse response low pass filter 5 stage.

The arrangement for adjusting the degree of non-linearity in the filters shown in Figure 5, Figure 13A and Figure 1313, relies on modification of the range of amplitudes of samples supplied to the filter, in accordance with the arrangements shown in Figure 7A and Figure 7B. This arrangement is easily understood. However, an alternative arrangement, employs a modified non- linear process, which enables changes to the amount of overdrive to be achieved while retaining a substantially constant level of signal which passes through the filter. In summary, the original non-linear process is given by:

y=X_XA3 The modified non-linear process is given by:

y = x - (nx) A 3 20 where 0 ≤ n ≤ 1 is the level of overdrive. The relationship between n and overdrive is different from the overdrive factor, A shown in Figure 7A: overdrive n corresponds to overdrive A A 2.

A problem with the modified non-linear process is that amplitude limiting is not absolute: oscillations may build up to a level where digital clipping or overflow distortion will occur. Thus, in the preferred embodiment, an additional smooth limiting curve is superimposed on the existing non- linear process, such that, at low levels of non-oscillating signal amplitude, distortion is entirely defined by the modified non-linear process y = x - (nX) A 3. At high levels of-signal amplitude resulting from ringing or filter oscillation, smooth limiting is imposed.

Thus, the non-linear process contains two non-linear functions, and a state variable filter of the form shown in Figure 5 may be summarised:

LP f(LP) + F BP HP BP -Q + INPUT - LP BP=FHP+BP 5 where f(LP) is given by two processes:

y = x - (nx) A 3 and if y > threshold then y = x - 2 (x - threshold)A3 if y < -threshold then y x - 2 (x +threshold) A 3 else y = x where threshold 0.65 The final function is time consuming to implement mathematically, due to the conditional steps, and is implemented more efFiciently if a linearly interpolated pre-calculated look-up table is used.

The modified non-linear process given by y = x - (nx) A 3, may be further improved K for a range of values of n, the input amplitude of samples supplied to the filter is also modified. Thus, from the single overdrive parameter, two control parameters are derived:

overdrive -> n if overdrive < 0.2 pre-gain = overdrive 5 else pre-gain = 1 It should be understood that the method of description used here is merely a convenient form of shorthand, which will be implemented by the experienced digital signal processing engineer on the hardware embodiment which has been described.

21 When two filters are cascaded, R is advantageous to use different values of Q, such that the Q value in the second filter is equal to the first + 0.3. When two filters are cascaded, the pre-gain control parameter defines amplitudes of signals supplied from the tone generator to the first fitter, and the amplitude of signals supplied from the first fitter to the second filter.

22

Claims (20)

1. A digital filter for filtering digital samples representing an audio signal, comprising a plurality of processing elements and a feed-back path, wherein a non-linear element having a non-linear characteristic is included in said feedback path.

2. A filter according to claim 1, wherein said feed-back path introduces a degree of positive feedback to create a degree of filter ringing.

3. A filter according to claim 1 or claim 2, wherein a multiplication process and an accumulation process are performed with respect to each individual sample.

4. A filter according to any of claims 1 to 3, wherein said multiplication and accumulation processes effect a polynomial function upon said individual samples.

5. A filter according to claim 4, wherein said polynomial function raises the numerical value of each sample to an odd power.

6. A filter according to claim 5, wherein said numerical value is raised to the power 3.

7. A filter according to any of claims 1 to 6, including scaling means for controlling non-linearRy.

8. A filter according to claim 7, including fixed non-linear means for restricting numerical values.

9. A filter according to any of claims 1 to 8, including a plurality of non- 23 linear elements.

10. A filter according to any of claims 1 to 9, configured as a state variable filter having two stages of integration and two feedback paths including a low-pass feedback path, wherein said non-linear element is included in one of said feedback paths.

11. A filter according to claim 10, wherein said non-linear element is included in said low-pass feedback path.

12. A digital filter comprising a plurality of filter sections, wherein one of said sections is configured in accordance with any of claims 1 to 11.

13. A method of sampling digital samples representing an audio signal, comprising steps of.

supplying digital samples of an audio signal to a digital filtering means; filtering said samples via a plurality of processing elements including a feed-back path, wherein said feed-back path includes a non-linear element; and receiving sampled signals from an output of said filter.

14. A method according to claim 13, wherein said feed-back path introduces a degree of feedback to create a degree of filter ringing.

15. A method according to claim 13 or claim 14, wherein a multiplication process and an accumulation process are performed with respect to each individual sample.

16. A method according to any of claims 13 to 15, wherein said multiplication and accumulation processes effect a polynomial function upon individual samples, without referring to previously received samples.

17. A filter according to claim 16, wherein said polynomial function 24 raises the numerical value of each sample to an odd power.

18. A filter according to claim 17, wherein said polynomial function raises the numerical value of each sample to the power three. 5

19. A digital filter substantially as herein described with reference to Figures 5 to 13A.

20. A musical synthesizer including a tone generator and a digital filter according to any of claims 1 to 12.