GB2307573A - Digital arithmetic circuit - Google Patents

Digital arithmetic circuit

Info

Publication number
GB2307573A
GB2307573A GB9705249A GB9705249A GB2307573A GB 2307573 A GB2307573 A GB 2307573A GB 9705249 A GB9705249 A GB 9705249A GB 9705249 A GB9705249 A GB 9705249A GB 2307573 A GB2307573 A GB 2307573A
Authority
GB
United Kingdom
Prior art keywords
circuit
arithmetic circuit
digital arithmetic
comparison
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9705249A
Other versions
GB9705249D0 (en
Inventor
Richard Anthony Evans
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UK Secretary of State for Defence
Original Assignee
UK Secretary of State for Defence
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB9419072A external-priority patent/GB2293469A/en
Application filed by UK Secretary of State for Defence filed Critical UK Secretary of State for Defence
Priority to GB9705249A priority Critical patent/GB2307573A/en
Publication of GB9705249D0 publication Critical patent/GB9705249D0/en
Publication of GB2307573A publication Critical patent/GB2307573A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1497Details of time redundant execution on a single processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443Sum of products
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Detection And Correction Of Errors (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

A digital arithmetic circuit (10) includes an inverting circuit (28) connected to a digital circuit (48) in which errors are to be detected. An operand input to the circuit (10) produces an output result in a first operation which is stored in a comparison circuit (82). The operand is inverted by the inverting circuit (28) on a second cycle of operation of the circuit (10) and the output result is compared by the comparison circuit (82) with that from the first operation. A non-zero result from the comparison indicates the occurrence of an error or errors in the operation of the circuit (10).
GB9705249A 1994-09-22 1995-09-11 Digital arithmetic circuit Withdrawn GB2307573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9705249A GB2307573A (en) 1994-09-22 1995-09-11 Digital arithmetic circuit

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9419072A GB2293469A (en) 1994-09-22 1994-09-22 Error detection in arithmetic circuit.
PCT/GB1995/002139 WO1996009586A1 (en) 1994-09-22 1995-09-11 Digital arithmetic circuit
GB9705249A GB2307573A (en) 1994-09-22 1995-09-11 Digital arithmetic circuit

Publications (2)

Publication Number Publication Date
GB9705249D0 GB9705249D0 (en) 1997-04-30
GB2307573A true GB2307573A (en) 1997-05-28

Family

ID=26305665

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9705249A Withdrawn GB2307573A (en) 1994-09-22 1995-09-11 Digital arithmetic circuit

Country Status (1)

Country Link
GB (1) GB2307573A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3166737A (en) * 1960-12-23 1965-01-19 Ibm Asynchronous data processor
JPH01180043A (en) * 1988-01-08 1989-07-18 Fujitsu Ltd Adding and subtracting system
JPH04180134A (en) * 1990-11-15 1992-06-26 Nec Ibaraki Ltd Pseudo error generating system
JPH10180043A (en) * 1996-12-20 1998-07-07 Nippon Steel Corp Exhaust gas purifying device for automobile

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3166737A (en) * 1960-12-23 1965-01-19 Ibm Asynchronous data processor
JPH01180043A (en) * 1988-01-08 1989-07-18 Fujitsu Ltd Adding and subtracting system
JPH04180134A (en) * 1990-11-15 1992-06-26 Nec Ibaraki Ltd Pseudo error generating system
JPH10180043A (en) * 1996-12-20 1998-07-07 Nippon Steel Corp Exhaust gas purifying device for automobile

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
IEE Proc E. Computers & Digital Techniques, v135, n2, March 1988, pp 87-94 *
IEE Proc E. Computers & Digital Techniques, v139, n2, March 1992, pp 123-130 *
Patent Abstracts of Japan, v13, n460, (P-946), 18 Oct 1989, & JP 01180043 A, 18 July 1989 *
Patent Abstracts of Japan, v16, n500, (P-1437), 15 Oct 1992, & JP 04180134 A, 26 June 1992 *

Also Published As

Publication number Publication date
GB9705249D0 (en) 1997-04-30

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)