GB2305295B - Method for forming interlayer insulating film of semiconductor device - Google Patents
Method for forming interlayer insulating film of semiconductor deviceInfo
- Publication number
- GB2305295B GB2305295B GB9619116A GB9619116A GB2305295B GB 2305295 B GB2305295 B GB 2305295B GB 9619116 A GB9619116 A GB 9619116A GB 9619116 A GB9619116 A GB 9619116A GB 2305295 B GB2305295 B GB 2305295B
- Authority
- GB
- United Kingdom
- Prior art keywords
- semiconductor device
- insulating film
- interlayer insulating
- forming interlayer
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950030005A KR100197980B1 (en) | 1995-09-14 | 1995-09-14 | Method of manufacturing a semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9619116D0 GB9619116D0 (en) | 1996-10-23 |
GB2305295A GB2305295A (en) | 1997-04-02 |
GB2305295B true GB2305295B (en) | 2000-05-10 |
Family
ID=19426789
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9619116A Expired - Fee Related GB2305295B (en) | 1995-09-14 | 1996-09-12 | Method for forming interlayer insulating film of semiconductor device |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2937886B2 (en) |
KR (1) | KR100197980B1 (en) |
DE (1) | DE19637458A1 (en) |
GB (1) | GB2305295B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112635329A (en) * | 2020-12-14 | 2021-04-09 | 华虹半导体(无锡)有限公司 | Interlayer dielectric layer of DMOS device and manufacturing method thereof |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002313968A (en) * | 2001-02-08 | 2002-10-25 | Seiko Epson Corp | Semiconductor device and its manufacturing method |
JP5110783B2 (en) * | 2004-10-28 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
CN111725180A (en) * | 2020-07-23 | 2020-09-29 | 华虹半导体(无锡)有限公司 | Interlayer dielectric layer structure for power MOS device and manufacturing method thereof |
CN115745417B (en) * | 2022-11-08 | 2024-07-19 | 福建华佳彩有限公司 | Silicon oxynitride film forming method used on indium gallium zinc oxide |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0249173A1 (en) * | 1986-06-06 | 1987-12-16 | Rockwell International Corporation | A planarization process for double metal mos using spin-on glass as a sacrificial layer |
US5003062A (en) * | 1990-04-19 | 1991-03-26 | Taiwan Semiconductor Manufacturing Co. | Semiconductor planarization process for submicron devices |
-
1995
- 1995-09-14 KR KR1019950030005A patent/KR100197980B1/en not_active IP Right Cessation
-
1996
- 1996-09-12 GB GB9619116A patent/GB2305295B/en not_active Expired - Fee Related
- 1996-09-13 DE DE19637458A patent/DE19637458A1/en not_active Ceased
- 1996-09-17 JP JP8244968A patent/JP2937886B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0249173A1 (en) * | 1986-06-06 | 1987-12-16 | Rockwell International Corporation | A planarization process for double metal mos using spin-on glass as a sacrificial layer |
US5003062A (en) * | 1990-04-19 | 1991-03-26 | Taiwan Semiconductor Manufacturing Co. | Semiconductor planarization process for submicron devices |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112635329A (en) * | 2020-12-14 | 2021-04-09 | 华虹半导体(无锡)有限公司 | Interlayer dielectric layer of DMOS device and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
GB9619116D0 (en) | 1996-10-23 |
KR100197980B1 (en) | 1999-06-15 |
KR970018399A (en) | 1997-04-30 |
JP2937886B2 (en) | 1999-08-23 |
DE19637458A1 (en) | 1997-03-20 |
JPH09129625A (en) | 1997-05-16 |
GB2305295A (en) | 1997-04-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20100912 |