GB2296380A

GB2296380A - A method of making a capacitor in a semiconductor device

Info

Publication number: GB2296380A
Application number: GB9525651A
Authority: GB
Inventors: Gum Yong Eom
Original assignee: Hyundai Electronics Industries Co Ltd
Current assignee: SK Hynix Inc
Priority date: 1994-12-20
Filing date: 1995-12-15
Publication date: 1996-06-26
Also published as: GB9525651D0; CN1135655A; KR960026821A; JP2727434B2; JPH08255880A

Abstract

A method of making a charge storage element includes the steps of exposing an active region of a substrate through a contact hole, introducing an amorphous silicon layer (8, Figure 1) which includes oxygen into the contact hole, thermally treating the amorphous silicon layer such that the amorphous silicon layer is crystallized into porous polysilicon regions 9, whereby oxygenous by-products 10 are formed, and applying a wet-etching process to the oxygenous by-products to enable the porous polysilicon layers to be used as a charge storage element. <IMAGE>

Description

A METHOD OF MAKING A CAPACITOR IN A SIMICObIDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE CONTAINING A CAPACITOR The present invention relates to a method of making a capacitor in a semiconductor device, and to a semiconductor device having a memory, and in particular, although not exclusively, to a way of increasing the capacitance of a charge storage element in a Dynamic Random Access Memory (DRAM).

In order to increase the effective area of a charge storage electrode element in a semiconductor device, it has previously been proposed to form a Dynamic Random Access Memory (DRAM) using stacked capacitors, by forming a capacitor over the bit line.

However, in spite of a variety of developments in DRAMs, it is difficult to achieve a sufficiently effective area of a capacitor because the devices are highly integrated.

A feature of a method for making a capacitor having high capacitance to be described below, by way of example, is that the effective area of a charge storage element is increased.

A particular method to be described below, by way of example, for making a charge storage element, includes the steps of providing a substrate having an active region, exposing the active region through a contact hole, introducing an amorphous silicon layer, which includes oxygen, into the contact hole, thermally treating the amorphous silicon layer such that the amorphous silicon layer is crystallized into porous polysilicon layers, whereby oxygenous by-products are formed between the porous polysilicon layers, and treating the oxygenous by-products by a wet-etching process to enable the porous polysilicon layers to be used as a charge storage element.

An arrangement illustrative of the invention will now be described, by way of example, with reference to the accompanying drawings in which: Figs. 1A to 1C are cross-sectional views illustrating steps in a method for making a capacitor in a semiconductor device.

Referring first to Figs. 1A, the numeral 1 denotes a silicon substrate, 2 a filled oxide layer, 3 an active region, 4 a gate electrode, 5 an insulation layer, 6 a bit line, 7 an insulation layer, and 8 an amorphous silicon layer which contacts the active region 3.

A method of forming the structure shown in Fig. 1A is well-known to those having ordinary skill in the art concerned with making charge storage elements.

In the arrangement being described as an example, a charge storage element employs an amorphous silicon layer 8. This amorphous silicon layer 8 incorporates oxygen.

The amorphous silicon layer 8 is formed using the gases SiH(silane) and N20 at a comparatively low temperature between 5500C and 700 C.

The ratio of oxygen to the silicon atoms must be between 10% and 30%. The amorphous silicon layer is thermally treated for between 4 and 6 hours at a temperature of between 850 0C and 11500C in a N2 atmosphere. The amorphous silicon layer is then crystallized into polysilicon layers 9, and oxygenous byproducts 10, such as SiO2 or SiOx, are formed in the polysilicon layers 9, as shown in Fig. 1B.

Finally, as shown in Figs. 1C, a wet etching process is applied to the oxygen by-product using an HF etchant, and porous polysilicon layers are formed and provide a charge storage element in a DRAM.

As mentioned above, the arrangement described has the effect of increasing the effective area of a charge storage electrode in a highly integrated semiconductor device by forming a porous polysilicon layer.

Although a preferred embodiment of the invention has been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope of the invention as defined in the accompanying claims.

Claims

1. A method of making a charge storage element, including the steps of providing a substrate having an active region, exposing the active region through a contact hole, introducing an amorphous silicon layer, which includes oxygen, into the contact hole, thermally treating the amorphous silicon layer such that the amorphous silicon layer is crystallized into porous polysilicon layers, whereby oxygenous by-products are formed between the porous polysilicon layers, and treating the oxygenous by-products by a wet-etching process to enable the porous polysilicon layers to be used as a charge storage element.

2. A method as claimed in claim 1, wherein the amorphous silicon layer is made from SiH4 and N2O gases.

3. A method as claimed in either claim 1 or claim 2, wherein the amorphous silicon layer is introduced by deposition at a temperature of between 5500C and 7000C.

4. A method as claimed in any one of the preceding claims wherein the amorphous silicon layers is thermally treated for 4 to 6 hours.

5. A method according to any one of the preceding claims, wherein the thermal treatment step is carried out at a temperature of between 8500C and 1150"C.

6. A method as claimed in any one of the preceding claims wherein the amorphous silicon layer includes between 10% and 30% of oxygen.

7. A method as claimed in any one of the preceding claims including the step of treating the oxygenous byproducts by a wet-etching process which employs an HF etchant.

8. A method as claimed in claim 1 substantially as described herein with reference to the accompanying drawings.

9. A semiconductor device including a charge storage element made by a method as claimed in any one of the preceding claims.