GB2293505A - Detecting abnormal conditions in a semiconductor composite element - Google Patents
Detecting abnormal conditions in a semiconductor composite element Download PDFInfo
- Publication number
- GB2293505A GB2293505A GB9426168A GB9426168A GB2293505A GB 2293505 A GB2293505 A GB 2293505A GB 9426168 A GB9426168 A GB 9426168A GB 9426168 A GB9426168 A GB 9426168A GB 2293505 A GB2293505 A GB 2293505A
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- United Kingdom
- Prior art keywords
- abnormality
- negative
- composite element
- abnormality signal
- positive
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0828—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K2017/0806—Modifications for protecting switching circuit against overcurrent or overvoltage against excessive temperature
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
- Protection Of Static Devices (AREA)
- Power Conversion In General (AREA)
Description
Field of the Invention
This invention relates to a semiconductor composite element which is employed in equipment such as an inverter device, and in which abnormal conditions of overcurrent, control voltage reduction, and overheat are detected, and different abnormality signals are outputted according to the respective abnormal conditions thus detected, and to a method of detecting abnormal conditions in an inverter device having the semiconductor composite element.
Descriotion of the Backaround Art
FIG. 5 is a block diagram showing the internal arrangement of a conventional semiconductor composite element. In FIG. 5, reference symbol 20 designates the semiconductor composite element; 21a, a positive-side control power source terminal; 21b, a negative-side control power source terminal; 22a, a positive-side control common terminal; 22b, a negativeside control common terminal; 23a, a positive-side control signal input terminal; 23b, a negative-side control signal input terminal; 24a, a positive-side abnormality signal output terminal; 24b, a negative-side abnormality signal output terminal; 25a, a 2293505 SEMICONDUCTOR COMPOSITE ELEMENT, AND METHOD OF DETECTING ABNORMAL CONDITIONS IN AN INVERTER DEVICE HAVING THE ELEMENT BACKGROUND OF THE INVENTION :;k positive-side DC power input terminal; 25b, a negative-side DC power input terminal; 26, an AC power output terminal; 27a, a positive- side semiconductor switching element which is a transistor; and 27b, a negative-side semiconductor switching element which is also a transistor. Further in FIG. 5, reference symbol 28a denotes a positive-side diode; 28b, a negative-side diode; 29a, a positive-side transistor current detector; 29b, a negative-side transistor current detector; 30a, a positive-side transistor drive circuit; 30b, a negative-side transistor drive circuit; 31a, a positive-side transistor overcurrent protection circuit; 31b, a negative-side transistor overcurrent protection circuit; 32a, a positive-side control supply voltage reduction protecting circuit; 32b, a negative-side control supply voltage reduction protecting circuit; 33, a temperature detector for detecting a temperature of the semiconductor composite element 20; 34, an overheat protection circuit; 35, a first logical OR circuit which produces an output signal upon reception of any one of the output signals of the positive-side transistor overcurrent protection circuit 31a and of the positive-side control supply voltage protection circuit 32a; and 36, a second logical OR circuit which produces an output signal upon reception of any one of the output signals of the negativeside transistor overcurrent protection circuit 31b and of 3 the negative-side control supply voltage protection circuit 3 2b.
In the conventional semiconductor composite element 20 thus organized, control signals which do not turn on the positive-side transistor 27a and the negative-side transistor 27b at the same time are applied to the positive-side and negative-side control signal input terminals 23a and 23b, respectively, so that the transistors 27a and 27b are alternately turned on and off through the positive-side transistor drive circuit 30a and the negative-side transistor drive circuit 30b, to provide AC power at the AC power output terminal 26 whereby AC current flows in the transistors.
operation, the currents flowing in the transistor 27a and the negative side are detected by the positive-side current detector 29a and the negative-side current detector 29b, respectively. The positive-side overcurrent protection circuit 31a and the negative-side overcurrent protection circuit 31b determine whether or not the currents thus detected are abnormal, i.e. larger than a predetermined value. When detecting an overcurrent abnormality, the positive-side overcurrent protection circuit 31a (or negative-side overcurrent protection circuit 31b) supplies an abnormality signal to the positive-side transistor drive In this positive-side transistor 271 circuit 30a (or negative-side transistor drive circuit 30b) connected thereto. Upon reception of the abnormality signal, the positive-side transistor drive circuit 30a (or negative-side transistor drive circuit 30b) turns off the positive-side transistor 27a (or negative-side transistor 27b) to cut off the current irrespective of the control signal applied to the positive-side (or negative-side) control signal input terminal 23a (or 23b). At the same time, the positive-side overcurrent protection circuit 31a (or negative-side overcurrent protection circuit 31b) supplies the abnormality signal through the first logical OR element 35 (or second logical OR element 36) to the positive-side abnormality signal output terminal 24a (or negative-side abnormality signal output terminal 24b.
On the other hand, a control supply voltage applied between the positiveside control power source terminal 21a and the positive-side control common terminal 22a, and a control supply voltage applied between the negative-side control power source terminal 21b and the negative-side control common terminal 22b are read by the positive-side control supply voltage reduction protecting circuit 32a and the negative-side control supply voltage reduction protecting circuit 32b, respectively, so that it is determined whether or not the control supply voltages are abnormal being smaller than a predetermined value. When an 1) abnormality occurs involving a control supply voltage reduction, in a manner similar to the above-described overcurrent detection, the positive- side control supply voltage reduction protecting circuit 32a (or negative- side control supply voltage reduction protecting circuit 32b) supplies an abnormality signal to the positive-side transistor drive circuit 30a (or negative-side transistor drive circuit 30b). Upon reception of the abnormality signal, the positive-side transistor drive circuit 30a (or negative-side transistor drive circuit 30b) turns off the positive-side transistor 27a (or negative-side transistor 27b) to cut off the current irrespective of the control signal applied to the positive side (or negative side) control signal input terminal 23a (or 23b). At the same time, the positive-side control supply voltage reduction protecting circuit 32a (or negative-side control supply voltage reduction protecting circuit 32b) supplies the abnormality signal through the first logical OR element 35 (or second logical OR element 36) to the positive-side abnormality signal output terminal 24a (or negative-side abnormality signal output terminal 24b).
The temperature of the semiconductor composite element 20 is detected by the temperature detector 33. The overheat protection circuit 34 determines whether or not the temperature thus detected is abnormal being higher than (0 a predetermined value. When detecting an overheat abnormality, the overheat protection circuit 34 supplies an abnormality signal to the negative-side transistor drive circuit 30b. Upon reception of the abnormality signal, the negative-side transistor drive circuit 30b turns off the negative-side transistor 27b to cut off the current irrespective of the control signal applied to the negativeside control signal input terminal 23b. At the same time, the overheat protection circuit 34 supplies the abnormality signal through the second logical OR element 36 to the negative-side abnormality signal output terminal 24b.
As was described above, in the conventional semiconductor composite element, in order to detect three abnormal conditions of overcurrent, control supply voltage reduction and overheat, the detected current, voltage and temperature are compared with the predetermined values, respectively, to determine whether or not they are abnormal; and when it is determined that any one of the current, voltage and temperature is abnormal, the abnormality signal is outputted to eliminate the abnormal condition. However, the semiconductor composite element involves a problem in that the particular abnormal condition cannot be identified from the abnormality signal thus outputted.
7 SUMMARY OF THE INVENTION
The present invention has been made to eliminate the above-described problem accompanying the conventional semiconductor composite element. Accordingly, an object of the invention is to provide a semiconductor composite element in which three abnormal conditions of overcurrent, control supply voltage reduction and overheat are detected, and different abnormality signals are outputted according to the three respective abnormal conditions, to protect the apparatus concerned.
Another object of the invention is to provide a method of detecting abnormal conditions in an inverter device having such a semiconductor composite element.
The foregoing object of the invention has been achieved by the provision of a semiconductor composite element which comprises:
abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of any one or all of the plurality of semiconductor switching elements and for detecting overheat of the semiconductor composite element; and abnormality signal generating means for producing different abnormality signals according to the respective abnormal conditions detected by the abnormal condition detecting means.
9 The foregoing object of the invention has been achieved by the provision of is a semiconductor composite element which comprises:
a first abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of a first semiconductor switching element; a second abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of a second semiconductor switching element, and for detecting overheat of the semiconductor composite element; a first abnormality signal generating means for producing different abnormality signals according to the respective abnormal conditions detected by the first abnormal condition detecting means; and a second abnormality signal generating means for producing different abnormality. signals according to the respective abnormal conditions detected by the second abnormal condition detecting means.
The foregoing object is also achieved by using a method of detecting abnormal conditions in an inverter device in which when overcurrent of any one or all of the plurality of semiconductor switching elements in a semiconductor composite element forming the inverter device is detected, a first abnormality signal corresponding thereto is is 1, outputtedr when control supply voltage reduction of any one or all of the plurality of semiconductor switching elements is detected, a second abnormality signal corresponding thereto is outputted, and when overheat of the semiconductor composite element is detected, a third abnormality signal corresponding thereto is outputted.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing the internal arrangement of a semiconductor composite element, which constitutes one embodiment of the invention; FIG. 2 is a block diagram showing the arrangement of an inverter device having the semiconductor composite elements according to the invention; FIGS. 3(a)-3(c) are diagrams showing different abnormality signals produced at the abnormality signal output terminals of the semiconductor composite element when abnormal conditions occur therein; FIG. 4 is a flow chart for a description of the operation of an abnormality signal generating section, which is most characteristic of the invention; and
FIG. 5 is a block diagram showing the internal arrangement of a conventional semiconductor composite element.
PREFERRED EMBODIMENTS OF THE INVENTION First Embodiment FIG. 1 is a block diagram showing the internal arrangement of a semiconductor composite element, which constitutes a first embodiment of the invention. In FIG. 1, reference symbol 50 designates the semiconductor composite element; 51, a first abnormal condition detecting section comprising a positive-side overcurrent protection circuit 31a and a positive-side control supply voltage reduction protecting circuit 32a; 52, a second abnormal condition detecting section comprising a negative- side overcurrent protection circuit 31b, a negative-side control supply voltage reduction protecting circuit 32b, and an overheat protection circuit 34; 53, a first abnormality signal generating section which receives the output signals of the positive-side overcurrent protection circuit 31a and the positive-side control supply voltage reduction protecting circuit 32a to produce output signals as described later; and 54, a second abnormality signal generating section which is one of the specific features of the invention. The section 54 receives the output signals of the negative-side overcurrent protection circuit 31b, the negative-side control supply voltage reduction protecting circuit 32b, and the overheat protection circuit 34, to produce output signals as described later. The 11 other components are the same as those in the conventional semiconductor composite element shown in FIG. 5, and descriptions therefor are omitted.
In the first embodiment, the overheat protection circuit 34 is a part of the second abnormal condition detecting section 52. However, it may be a part of the first abnormal condition detecting section 51 rather than the detecting section 52, or it may be included in both of the first and second abnormal condition detecting sections 51 and 52.
FIG. 2 is a block diagram showing the arrangement of an inverter device having the semiconductor composite elements according to the invention. In FIG. 2, reference symbols 10a, 10b and 10c designate power input terminals of the inverter device; 11, a diode bridge serving as a converter section; 12, a smoothing capacitor; 50a, 50b and 50c, the semiconductor composite elements shown in FIG. 1 in detail; 26a, 26b and 26c, AC power output terminal of the inverter -device; 13, a microcomputer in the inverter device; 14a through 141, isolated amplifiers; and 15., an output section, for instance, electrical terminals or a display section such as a LED monitor, for outputting the abnormality signals from the inverter device.
In the inverter device shown in FIG. 2, AC power applied to the power input terminals 10a through 10c is 12 rectified by the diode bridge 11 and smoothed by the smoothing capacitor 12 into DC power. On the other hand, the microcomputer 13 supplies control signals through the isolated amplifiers 14a through 14f to the positive-side and negative-side control signal input terminals 23a and 23b of the three semiconductor composite elements 50a, 50b and 50c. As a result, in those semiconductor composite elements, six semiconductor switching elements (in this embodiment, transistors; not shown) are switched, so that the aforementioned DC power is converted into AC power having a desired frequency and a desired voltage. The AC power is outputted through the output terminals 26a, 26b and 26c.
In this operation, each of the semiconductor composite elements 50a, 50b and 50c operates as follows. The semiconductor composite elements 50a through 50c are each designed as shown in FIG. 1. Therefore, the positiveside and negative-side transistor drive circuits 30a and 30b switch the positive-side and negative-side transistors 27a and 27b according to the control signals applied to the positive-side and negative-side control signal input terminals 23a and 23b, respectively, as a result of which AC current is produced at the AC power output terminal 26.
The current flowing in the positive-side transistor 27a and the current flowing in the negative-side transistor is 13 27b are detected by the positive-side current detector 29a and the negative-side current detector 29b, respectively. And the positive-side overcurrent protection circuit 31a and the negative-side overcurrent protection circuit 31b judge whether or not the currents thus detected are abnormal, i.e., are larger than a predetermined value. When detecting an abnormality, the positive-side overcurrent protection circuit 31a (or negative-side overcurrent protection circuit 31b) supplies an abnormality signal to the positive-side transistor drive circuit 30a (or negative- side transistor drive circuit 30b). Upon reception of the abnormality signal, the positive-side transistor drive circuit 30a (or negative-side transistor drive circuit 30b) turns off the positive-side transistor 27a (or negative-side transistor 27b) to cut off the current irrespective of the control signal applied to the positive-side (or negative-side) control signal input terminal 23a (or 23b), to thereby effect protection from the overcurrent. At the same time, the positive-side overcurrent protection circuit 31a (or negative-side overcurrent protection circuit 31b) supplies the abnormality signal to the first abnormality signal generating section, namely, the positive-side abnormality signal generating circuit 53 (or second abnormality signal generating section, namely, the negative-side abnormality is signal generating circuit 54). At circuits 53 or 54, a pulse signal having a pulse (on) width of 1 ms as shown in FIG. 3(a) is produced as a signal indicating overcurrent abnormality. The pulse signal is supplied to the positiveside abnormality signal output terminal 24a (or negativeside abnormality signal output terminal 24b).
on the other hand, a control supply voltage applied between the positiveside control power source terminal 21a and the positive-side control common terminal 22a, and a control supply voltage applied between the negative-side control power source terminal 21b and the negative-side control common terminal 22b are read by the positive-side control supply voltage reduction protecting circuit 32a and the negative-side control supply voltage reduction protecting circuit 32b, respectively. As a result, it is determined whether or not the control supply voltages are abnormal, i.e., are smaller than a predetermined value. When the positive- side control supply voltage reduction protecting circuit 32a (or negative- side control supply voltage reduction protecting circuit 32b) judges that the control supply voltage is abnormal, similarly as in the case of the above-described overcurrent abnormality, the positive-side control supply voltage reduction protecting circuit 32a (or negative-side control supply voltage, reduction protecting circuit 32b) supplies an abnormality is d signal to the positive-side transistor drive circuit 30a (or negative- side transistor drive circuit 30b). Upon reception of the abnormality signal, the positive-side transistor drive circuit 30a (or negative-side transistor drive circuit 30b) turns off the positive-side transistor 27a (or negative-side transistor 27b) to cut off the current irrespective of the control signal applied to the positive-side (or negative-side) control signal input side 23a (or 23b), to thereby effect protection from the control supply voltage reduction.
At the same time, the positive-side control supply voltage reduction protecting circuit 32a (or negative-side control supply voltage reduction protecting circuit 32b) supplies the abnormality signal to the positiveside abnormality signal generating circuit 53 (or negative-side abnormality signal generating circuit 54). At circuit 53 or 54, a pulse signal having a pulse (on) width of 2 ms as shown in FIG. 3(b) is produced as a signal indicating control supply voltage reduction. The pulse signal is supplied to the positive-side abnormality signal output terminal 24a (or negative-side abnormality signal output terminal 24b).
The temperature of each semiconductor composite element 50 is detected by the temperature detector 33. The overheat protection circuit 34 determines whether or not 1(0 is the temperature thus detected is abnormal, i.e., is higher than a predetermined value. When it is determined that the temperature is abnormal, the overheat protection circuit 34 supplies an abnormality signal to the negative-side transistor drive circuit 30b. In response to the abnormality signal, the negative-side transistor drive circuit 30b turns off the negative-side transistor 27b to cut off the current irrespective of the control signal applied to the negative-side control signal input terminal 23b, to thereby effect protection from the overheat.
At the same time, the overheat protection circuit 34 supplies the abnormality signal to the negative-side abnormality signal generating circuit 54. The circuit outputs a pulse signal having a pulse (on) width of 3 ms, as shown in FIG. 3(c). This signal indicating an overheat abnormality, which is supplied to the negativeside abnormality signal output terminal 24b.
The positive-side and negative-side abnormality signal output terminals 24a and 24b of the semiconductor composite elements 50a, 50b and 50c are connected through the isolated amplifiers 14g through 141 to, the microcomputer 13 of the inverter device. Therefore, upon reception of the abnormality signal from the semiconductor composite elements 50a through 50c, the microcomputer 13 operates to protect the inverter device by suspending the outputting of is 17 the control signals which would otherwise be supplied through the isolated amplifiers 14a through 14f to the positive-side and negative- side control signal input terminals 23a and 23b of the three semiconductor composite elements 50a through 50c to switch the positive- side and negative-side transistors 27a and 27b.
At the same time, the microcomputer 3 identifies the abnormal condition from the abnormality signal. For instance, as seen in Fig. 3a, the overcurrent abnormality is identified from the pulse signal having a pulse (on) width of 1 ms. Also, as seen in Fig. 3b, the undercurrent abnormality is identif ied from the pulse (on) width of ZMS. The overhead condition already has been described for signal 3C. The content of the abnormality thus identified is transmitted to the output section 15, so that it is outputted from the inverter device by means of the output section 15 that is electrical terminals or a display section such as a LED monitor.
Referring to FIG. 4, the above operation is further described for the case of the abnormal condition detection by the second abnormality signal generating section, namely, the negative-side abnormality signal generating circuit 54. When the negative-side abnormality signal generating circuit 54 detects an abnormal condition (SI), the positiveside and negative-side transistors 27a and 27b 1 / in each of the semiconductor composite elements 50a, 50b and 50c are turned off (S2). Next, it is judged whether or not the abnormal condition detected is overcurrent (S3). When it is judged that the abnormal condition detected is overcurrent, the abnormality signal, which is the pulse signal having a pulse (on) width of 1 ms, is supplied to the abnormality signal output terminal 24b (N).
response to the abnormality signal outputted from abnormality signal output terminal 24b, the supply of In the the control signals to the positive-side and negative side control signal input terminals 23a and 23b from the microcomputer 13 is suspended, to thereby stop the operations of the positive-side and negative side transistors 27a and 27b, while the overcurrent abnormality is displayed on the display section (S5).
When the abnormal condition detected is not overcurrent, then it is judged whether or not it is control supply voltage reduction (S6). When it is judged that the abnormal condition is control supply voltage reduction, the abnormality signal, which is the pulse signal having a pulse (on) width of 2 ms, is applied to the abnormality signal output terminal 24b (S7). In response to the abnormality signal outputted from the abnormality signal output terminal 24b, the supply of the control signals to the positive-side and negative side control signal input is /1 terminals 23a and 23b from the microcomputer 13 is suspended, thereby to stop the operations of the positiveside and negative side transistors 27a and 27b, while the control supply voltage reduction abnormality is displayed on the display section (S8).
When the abnormal condition detected is not control supply voltage reduction, then it should be overheat. Therefore, the abnormality signal, which is the pulse signal having a pulse (on) width of 3 ms, is supplied to the negative-side abnormality signal output terminal 24b (Sq). In response to the abnormality signal outputted from the abnormality signal output terminal 24b, the supply of the control signals to the positiveside and negative side control signal input terminals 23a and 23b from the microcomputer 13 is suspended, to thereby stop the operations of the positive-side and negative side transistors 27a and 27b, while the overheat abnormality is displayed on the display section (S10). The negative-side abnormality signal generating circuit 54 operates in the above-described manner.
Second Embodiment In the above-described first embodiment, for the overcurrent abnormality, the pulse signal having a pulse (on) width of 1 ms is outputted as the abnormality signal; for the control supply voltage reduction abnormality, the is pulse signal having a pulse (on) width of 2 ms is outputted as the abnormality signal; and for the overheat abnormality, the pulse signal having a pulse (on) width of 3 ms is outputted as the abnormality signal. However, the invention is not limited thereto or thereby. That is, any signals which are distinguished from one another to indicate the respective abnormal conditions, as by different amplitudes, frequencies, phases or the like may be employed as the abnormality signals.
Furthermore, although in the above-described first embodiment, one abnormality signal output terminal is provided per transistor, the invention is not limited thereto or thereby. A plurality of abnormality signal output terminals may be provided so that the abnormality signals are distinguished from one another by a certain number of bits.
Moreover, although in the above-described first embodiment the semiconductor composite element has two transistors, the number of transistors is not limited thereto.
In summary, since the abnormality signal generating means produces different abnormality signals according to the respective abnormal conditions of overcurrent, control supply voltage reduction and overheat, the abnormal conditions in the semiconductor composite element can be
2-1 identified accurately therefrom, so that the abnormal conditions can be eliminated quickly.
Also, in the semiconductor composite element, the first and second abnormality signal generating means produce different abnormality signals according to the respective abnormal conditions of overcurrent, control supply voltage reduction and overheat, which makes it possible to identify and deal with the abnormal conditions more quickly.
In the method of detecting abnormal conditions in an inverter device according to the invention, claim 3, when the overcurrent of the abnormal conditions in the inverter device can be accurately identified and quickly dealt with, which prevents or minimizes the adverse effects thereof on the apparatus concerned.
is 2-2- 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 1 2 3 4 5
Claims (9)
1. A semiconductor composite element having a plurality of semiconductor switching elements for controlling an inverter, comprising:
abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of any one or all of said plurality of semiconductor switching elements and overheat of said semiconductor composite element; and abnormality signal generating means for producing different abnormality signals according to said respective abnormal conditions detected by said abnormal condition detecting means.
2. The composite element as set forth in claim 1 wherein said abnormality signal generating means produces a plurality of abnormality signals, each signal having a different time duration corresponding to a respective abnormal condition.
3. The composite element as set forth in claim 1 wherein said abnormality signal generating means produces plurality of abnormality signals, each signal comprising different digital value corresponding to a respective abnormal condition.
1 2 3
4 5 6 7 9 10 11 12 13 14 is 16 17 18 19 1 2 3 4 2-5 4. A semiconductor composite element having at least a first semiconductor switching element and a second semiconductor switching element, for controlling an inverter, comprising: a first abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of said first semiconductor switching element; a second abnormal condition detecting means for detecting overcurrent and control supply voltage reduction of said second semiconductor switching element, and overheat of said semiconductor composite element; a first abnormality signal generating means for producing different abnormality signals according to said respective abnormal conditions detected by said first abnormal condition detecting means; and a second abnormality signal generating means for produc ing different abnormality signals according to said respective abnormal conditions detected by said second abnormal condition detecting means.
5. The composite element as set forth in claim 4 wherein each of said abnormality signal generating means produces a plurality of abnormality signals, each signal having a different time duration corresponding to a respective abnormal condition.
21r 1 2 3 4 5 2 3 4
6 7 8 11 12 13 14 15 16 17 18 19 6. The composite element as set forth in claim 1 wherein each of said abnormality signal generating means produces a plurality of abnormality signals, each signal comprising a different digital value corresponding to a respective abnormal condition.
7. A method of detecting abnormal conditions in an inverter device which includes a semiconductor composite element having a plurality of semiconductor switching elements for controlling an apparatus concerned, in which overcurrent and control supply voltage reduction of any one or all of said plurality of semiconductor switching elements, and overheat of said semiconductor composite element are detected, CHARACTERIZED in that: when overcurrent of any one or all of said plurality of semiconductor switching elements is detected, a first abnormality signal corresponding thereto is outputted, when control supply voltage reduction of any one or all of said plurality of semiconductor switching elements is detected, a second abnormality signal corresponding thereto is outputted, and when overheat of said semiconductor composite element is detected, a third abnormality signal corresponding thereto is outputted, 2, 6' 21 22 wherein, each of said first, second and third abnormality signals is unique with respect to the other of said abnormality signals.
1
8. The detecting method as set forth in claim 7 wherein said first, second and third abnormality signals, each have a different time duration corresponding to a respective abnormal condition.
2 3 4 1 2 3 4
9. The detecting method as set f orth in claim 7 wherein said f irst, second and third abnormality signals each comprises a different digital value corresponding to a respective abnormal condition.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6224791A JPH0898505A (en) | 1994-09-20 | 1994-09-20 | Semiconductor compound element and method for detecting failure of inverter device with semiconductor compound element |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9426168D0 GB9426168D0 (en) | 1995-02-22 |
| GB2293505A true GB2293505A (en) | 1996-03-27 |
| GB2293505B GB2293505B (en) | 1998-11-11 |
Family
ID=16819262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9426168A Expired - Fee Related GB2293505B (en) | 1994-09-20 | 1994-12-23 | Inverter control system, and method of detecting abnormal conditions in an inverter device having a semiconductor composite element |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH0898505A (en) |
| KR (1) | KR100193949B1 (en) |
| CN (1) | CN1039269C (en) |
| DE (1) | DE19501373A1 (en) |
| GB (1) | GB2293505B (en) |
| HK (1) | HK1010003A1 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997039397A1 (en) * | 1996-04-16 | 1997-10-23 | General Electric Company | Thermal protection of traction inverters |
| US6469919B1 (en) | 1999-07-22 | 2002-10-22 | Eni Technology, Inc. | Power supplies having protection circuits |
| EP1056205A3 (en) * | 1999-05-27 | 2005-01-19 | Fuji Electric Co. Ltd. | Semiconductor apparatus |
| EP1630942A1 (en) * | 2003-05-30 | 2006-03-01 | Tabuchi Electric Co.,Ltd. | High-frequency heater inverter power source control circuit |
| US7180758B2 (en) | 1999-07-22 | 2007-02-20 | Mks Instruments, Inc. | Class E amplifier with inductive clamp |
| US8344801B2 (en) | 2010-04-02 | 2013-01-01 | Mks Instruments, Inc. | Variable class characteristic amplifier |
| WO2012118701A3 (en) * | 2011-02-28 | 2013-03-21 | General Electric Company | System and method for operating inverters |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19855370A1 (en) * | 1998-12-01 | 2000-06-15 | Bosch Gmbh Robert | Protection circuit for a power semiconductor |
| DE60025324D1 (en) * | 2000-03-17 | 2006-03-30 | St Microelectronics Srl | Self-deactivating and self-reacting arrangement for DC-DC converters |
| JP4701052B2 (en) * | 2005-09-21 | 2011-06-15 | 矢崎総業株式会社 | Overcurrent detection device |
| CN101382585B (en) * | 2007-09-07 | 2011-01-26 | 比亚迪股份有限公司 | Test method, apparatus and generator for inverter in generator |
| CN102751856B (en) * | 2012-07-19 | 2015-04-08 | 成都芯源***有限公司 | Multiphase switching converter with overcurrent protection function and control method thereof |
| CN109143109A (en) * | 2017-06-26 | 2019-01-04 | 蔚来汽车有限公司 | Electric vehicle inverter fault detection and processing method, device and storage medium |
| JP6824142B2 (en) | 2017-11-22 | 2021-02-03 | 三菱電機株式会社 | Power semiconductor modules and power converters |
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| EP0250932A1 (en) * | 1986-06-24 | 1988-01-07 | International Business Machines Corporation | Power supply system |
| GB2247118A (en) * | 1990-08-13 | 1992-02-19 | Brother Ind Ltd | Multi-function status and fault indicator for a recording device |
| GB2264204A (en) * | 1988-11-17 | 1993-08-18 | Honda Motor Co Ltd | Dc resistance welding apparatus having parallel inverters |
| GB2267190A (en) * | 1992-05-15 | 1993-11-24 | Ind Tech Res Inst | Circuit breaker with current range indicator |
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| US3646398A (en) * | 1970-07-16 | 1972-02-29 | Gen Electric | Static switch protective circuit activated by shorted commutation thyrister |
| US4052659A (en) * | 1976-11-15 | 1977-10-04 | Nasa | Overload protection system for power inverter |
| DD271404A1 (en) * | 1988-03-31 | 1989-08-30 | Numerik Karl Marx Karlmarx Sta | CIRCUIT ARRANGEMENT FOR THE COMPLETE OVERLOAD PROTECTION OF SHUT-OFF SEMICONDUCTOR COMPONENTS IN CONTROL UNITS FOR ELECTRICAL DRIVES |
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1994
- 1994-09-20 JP JP6224791A patent/JPH0898505A/en active Pending
- 1994-12-23 GB GB9426168A patent/GB2293505B/en not_active Expired - Fee Related
-
1995
- 1995-01-17 KR KR1019950000696A patent/KR100193949B1/en not_active IP Right Cessation
- 1995-01-18 DE DE19501373A patent/DE19501373A1/en not_active Withdrawn
- 1995-01-20 CN CN95100274A patent/CN1039269C/en not_active Expired - Fee Related
-
1998
- 1998-09-17 HK HK98110678A patent/HK1010003A1/en not_active IP Right Cessation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0250932A1 (en) * | 1986-06-24 | 1988-01-07 | International Business Machines Corporation | Power supply system |
| GB2264204A (en) * | 1988-11-17 | 1993-08-18 | Honda Motor Co Ltd | Dc resistance welding apparatus having parallel inverters |
| GB2247118A (en) * | 1990-08-13 | 1992-02-19 | Brother Ind Ltd | Multi-function status and fault indicator for a recording device |
| GB2267190A (en) * | 1992-05-15 | 1993-11-24 | Ind Tech Res Inst | Circuit breaker with current range indicator |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997039397A1 (en) * | 1996-04-16 | 1997-10-23 | General Electric Company | Thermal protection of traction inverters |
| EP1056205A3 (en) * | 1999-05-27 | 2005-01-19 | Fuji Electric Co. Ltd. | Semiconductor apparatus |
| US6469919B1 (en) | 1999-07-22 | 2002-10-22 | Eni Technology, Inc. | Power supplies having protection circuits |
| US6885567B2 (en) | 1999-07-22 | 2005-04-26 | Eni Technology, Inc. | Class E amplifier with inductive clamp |
| US7180758B2 (en) | 1999-07-22 | 2007-02-20 | Mks Instruments, Inc. | Class E amplifier with inductive clamp |
| US7397676B2 (en) | 1999-07-22 | 2008-07-08 | Mks Instruments, Inc. | Class E amplifier with inductive clamp |
| EP1630942A1 (en) * | 2003-05-30 | 2006-03-01 | Tabuchi Electric Co.,Ltd. | High-frequency heater inverter power source control circuit |
| EP1630942A4 (en) * | 2003-05-30 | 2010-03-31 | Tabuchi Denki Kk | High-frequency heater inverter power source control circuit |
| US8344801B2 (en) | 2010-04-02 | 2013-01-01 | Mks Instruments, Inc. | Variable class characteristic amplifier |
| WO2012118701A3 (en) * | 2011-02-28 | 2013-03-21 | General Electric Company | System and method for operating inverters |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0898505A (en) | 1996-04-12 |
| GB2293505B (en) | 1998-11-11 |
| KR100193949B1 (en) | 1999-06-15 |
| KR960012647A (en) | 1996-04-20 |
| CN1119359A (en) | 1996-03-27 |
| GB9426168D0 (en) | 1995-02-22 |
| CN1039269C (en) | 1998-07-22 |
| DE19501373A1 (en) | 1996-03-28 |
| HK1010003A1 (en) | 1999-06-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20001223 |