GB2286721A

GB2286721A - Method for fabricating semiconductor device

Info

Publication number: GB2286721A
Application number: GB9502863A
Authority: GB
Inventors: Hideaki Kawamoto; Hidenobu Miyamoto
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1994-02-15
Filing date: 1995-02-14
Publication date: 1995-08-23
Also published as: JPH07230993A; GB9502863D0; JP2861785B2

Abstract

A protecting film is (207) which includes Al, O, N, Si and Cl is removed from the side surface of a conductive pattern by gas-plasma etching using at least one of BCl3 (Boron trichloride) and BBr3 (Boron tribromide) without exposing the conductive pattern to the air. This process reduces the amount of chlorine in the structure. The chlorine concentration may be reduced further using a gas such as CH3OH (methanol). Thereby the corrosive effects of chlorine on the conductive pattern are reduced. <IMAGE>

Description

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE FIELD OF THE INVENTION The invention relates to a method for fabricating a semiconductor device, especially to an improved method for forming conductive line pattern in a multi-layer structure of semiconductor device.

BACKGROUND OF THE INVENTION As semiconductor integrated circuits become more highly integrated, tr conductive lines connecting each semiconductor device are required to be small in size and more layered. Generally, such conductive lines are made of aluminum or aluminum alloy. Such a small size of conductive line and multi-layering makes the surfaces of semiconductor devices rough, and thereby it is difficult to form a conductive pattern on such a rough surface.

Accordingly, a method for forming a conductive pattern has been proposed in a report, Jpn. J. Appl. Phys. Vol. 31 (1992) pp.

4376-4380, by which an aluminum layer is dry-etched using an oxide layer formed thereon as a mask.

In a conventional method for fabricating a semiconductor device, a conductive layer is etched using an oxide mask pattern as a mask to have a required conductive pattern on a semiconductor substrate. In such etching processes, some etched oxide mask pattern is put on the side surfaces of the conductive pattern, and are left thereon. The left mask pattern usually includes chlorine which may corrode the conductive pattern, and therefore, the life of the conductive pattern is shortened.

SUMMARY OF THE INVENTION Accordingly, an object of the preferred embodiment of this invention is to provide an improved method for fabricating a semiconductor device by which after-corrosion of a conductive pattern due to chlorine can be prevented, and thereby the semiconductor device itself can have a longer life.

In a method for fabricating a semiconductor device according to the invention, a protecting film is removed from the side surface of a conductive pattern by gas-plasma etching using at least one of BCl3 and BBr3 without exposing the conductive pattern to the air. Practically, the method may include the following steps: (1) providing a semiconductor substrate; (2) providing a conductive layer on the semiconductor substrate; (3) providing a mask pattern on the conductive layer; (4) etching the conductive layer by gas-plasma including chlorine using the mask pattern as a mask to form a conductive pattern, whereby protecting films are provided on side surfaces of the conductive pattern; and (5) removing the protecting film from the conductive pattern by gas-plasma etching using at least one of BC1 and BBr without exposing the conductive pattern to the air.

BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1A and 1B are cross-sectional views showing the structure of a semiconductor device fabricated by a conventional method.

Figs. 2A to 2C are cross-sectionàl views showing the structure of a semiconductor device fabricated by a method according to the invention.

Figs. 3 to 7 are graphs showing the effects of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS For better understanding of the present invention, conventional technology will be described first. Referring to Figs.

1A and IB, in a conventional method for fabricating a semiconductor device, a silicon oxide layer 202 is formed on a silicon substrate 201. Then, a TiN/Ti layer 203 composed of a 500 of Ti and a 1000 of TiN is provided on the silicon oxide layer 202 by sputtering. Next, an AlCu alloy layer 204 is provided on the TiN/Ti layer 203 to have a thickness of 5000A by sputtering. Subsequently, a TiN layer 205 is provided on the AlCu alloy layer 204 without being exposed to the air to have a thickness of 500A, and then a plasma oxide layer is provided on the TiN layer 205 to have a thickness of 2000A by plasma CVD technique. Next, a resist pattern (not shown) is provided on the plasma oxide layer by well known photolithography techniques.

Then, the plasma oxide layer is dry-etched by RIE (Reactive Ion Etching) with CF4/CHF3/Ar mixed gas plasma to form an oxide mask pattern 206, as shown in Fig. 1A.

Subsequently, the laminated layers of TiN 205, AlCu 204, TiN/Ti 203 are dry-etched by RIE using mixed gas plasma of Cl., and N2 while being masked by the oxide mask pattern 206 to form a conductive pattern, as shown in Fig. 1B. Some etched oxide mask pattern 206 is put on the side surfaces of the conductive pattern, so that protecting films 207 are formed. With the protecting films 207, side etching of the conductive pattern is prevented and whereby the conductive pattern has a well anisotropy shape.

Figs. 2A to 2C show the fabrication steps of one preferred embodiment according to the invention. In this embodiment, a silicon oxide layer 102 is formed on a silicon substrate 101.

Then, a TiN/Ti layer 103 composed of a 500A of Ti and a 1000A of TiN is provided on the silicon oxide layer 102 by sputtering.

Next, an AlCu alloy layer 104 is provided on the TiN/Ti layer 103 to have a thickness of 5000A by sputtering. Subsequently, a TiN layer 105 is provided on the AlCu alloy layer 104 without being exposed to the air to have a thickness of 500A, and then a plasma oxide layer is provided on the TiN layer 105 to have a thickness of 2000A by plasma CVD technique. Next, a resist pattern (not shown) is provided on the plasma oxide layer by well known photolithography technique. Then, the plasma oxide layer is dryetched by RIE (Reactive Ion Etching) with CF4/CHF3/Ar mixed gas plasma to form an oxide mask pattern 106, as shown in Fig. 2A.

Subsequently, the laminated layers of TiN 105, AlCu 104, TiN/Ti 103 are dry-etched by RIE using mixed gas plasma of Cl2 and N2 while being masked by the oxide mask pattern 106 to form a conductive pattern, as shown in Fig. 2B. The etching step is carried out with a preferred gas mixing ratio of Cl2 : N2 = 63 :13 (SSCM), a preferred pressure of 5mTorr and a preferred RF power of 500W. In the etching process, some oxide mask pattern 106 is etched and put cn the side surfaces of the conductive pattern, so that protecting films 107 are formed.

Fig. 3 shows the composition on the side surface of the conductive pattern (aluminum line pattern) 104, 103 and 105, which is the protecting film 107, according to a micro-Auger analysis (p-AES). The protecting film 107 includes Al, O, N, Si and Cl, and has a thickness of 400-500A by SiO2 conversion. As understood from the graph, Cl exists in the boundary between the AlCu alloy layer 104 and the protecting film 107. If the entire structure is put in the air with the protecting film 107, aluminum in the conductive pattern 104 may be corroded by Cl, whereby the conductive pattern 104 may be damaged in reliability.

Immediately after the dry etching process, the side wall (protecting film) is removed by RIE using gas plasma including By13, while keeping the entire structure within a vacuum chamber.

The structure after the removal of the protecting film is shown in Fig. 2C. The gas-plasma etching step is carried out with a flow rate of BCl3 of 5Osccm, a pressure of lOmTorr, and with an RF power of 200W for 30 seconds.

Fig. 4 shows the composition on the side surface of the conductive pattern (aluminum line pattern) 104, 103 and 105 after being plasma etched with BCl. In contrast with Fig. 3, the components other than Al are remarkably decreased and a Cl layer is shown on the surface of the structure.

After being plasma etched with By13, the entire structure is moved into another vacuum chamber by vacuum conveyance without being exposed to the air so that the structure is treated by down-flow plasma using gas including oxygen and hydrogen but excluding a halogen element, such as CH,OH, to completely remove Cl component existing on the side surface of the conductive layer. The etching step is preferably carried out with a flow rate of CH3OH of 100sccm, at a pressure of 1.2Torr, micro power of 1000W, a wafer stage temperature of 200"C for 120 seconds.

Figs. 5 to 7 show the numbers of corrosion points generated on the side surface of the conductive layer under each different condition. Etching condition which will not described below would be the same as that above mentioned.

Fig. 5 shows the numbers of corrosion points on the side surface of the conductive layer relative to treatment time of BC13 plasma etching, in which lines (a) and (b) indicate the results when the entire structure is left in the air for 24 hours and 48 hours, respectively. As understood from the graph, more than 30 seconds of BCl3 plasma etching is nera11y appropriate in either case to prevent corrosion completely.

Fig. 6 shows the total number of corrosion points existing after being exposed to the air for 24 hours, relative to flow rate of CQOH gas. Lines (c) and (d) indicate cases where BCl3 plasma etching is carried out for not less than 30 seconds before CHOH down-flow plasma treatment and is not carried out, respectively. As shown in the graph, BC13 plasma etching is effective to prevent corrosion, and is especially effective when the flow rate of CHH gas is more than 100sccm. The more hydrogen is contained in gas of down-flow plasma step, the more effectively generation of corrosion is prevented.

Fig. 7 shows the total numbers of corrosion point on the side surface of the conductive layer relative to temperature of the substrate, under condition in which BC13 plasma etching is carried out for 15 seconds and then CHOH down-flow plasma etching is carried out for 90 seconds. Lines (e) and (f) indicate two cases in which the substrate is left in the air for 24 hours and 48 hours, respectively. As can be understood from the graph, after-corrosion can be prevented to some extent at a temperature of substrate of 200 C, and corrosion is almost completely prevented at a temperature of higher than 240"C.

Further, if the substrate would be heated to higher than 240"C, processing time both for BC1, and down-flow plasma etching can be shortened.

In this embodiment, BBr3 can bye used instead of BC1 for the plasma etching step.

Although the invention has been described with respect to specific embodiments for complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modification and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.

Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.

The appended abstract as filed herewith is included in the specification by reference.

Claims

1. A method for fabricating a semiconductor device, comprising the steps of: providing a semiconductor substrate; providing a conductive layer on the semiconductor substrate; providing a mask pattern on the conductive layer; etching the conductive layer by gas-plasma including chlorine using the mask pattern as a mask to form a conductive pattern, whereby protecting films are provided on side surfaces of the conductive pattern; and removing the protecting film from the conductive pattern by gas-plasma etching using at least one of BCl and BBr without exposing the conductive pattern to the air.

2. The method according to claim 1, wherein: said step of etching the conductive layer is carried out for a time period of 30 seconds.

3. The method according to claim lor claim 2, further comprising the step of: exposing the conductive pattern to down-flow plasma including oxygen and hydrogen but excluding a halogen element, without exposing to the air after the step of removing the protecting film from the conductive pattern by gas-plasma etching, so as to remove chlorine from the side surface of the conductive pattern completely.

4. The method according to claim 3, wherein: the step of exposing the conductive pattern to down-flow plasma is carried out under condition where the semiconductor substrate is heated to 240 "C or higher.

5. The method according to claim 3 or 4, wherein: the step of exposing the conductive pattern to down-flow plasma is carried out using CH3OH.

6. The method according to any one of claims 3 to 5, wherein: the step of exposing the conductive pattern to down-flow plasma is carried out under the condition where the gas has a flowing rate of greater than lOOsccm.

7. A method for fabricating a semiconductor device, according to any one of claims 1 to 6: wherein the conductive layer is provided on the semiconductor by providing a metal layer of aluminum or aluminum alloy on the semiconductor substrate; wherein the mask pattern is provided on the conductive layer by providing an oxide layer on the metal layer; and anisotropy-etching the oxide layer to form an oxide layer pattern; wherein the etching is anisotropy-etched to form a metal line pattern; and wherein the protecting film is removed by exposing the metal line pattern to gas plasma without exposing the metal line pattern to the air.

8. A method as hereinbefore described.

9. A method as hereinbefore described with reference to the accompanying drawings.