GB2262830A

GB2262830A - Driving a ferroelectric liquid crystal display

Info

Publication number: GB2262830A
Application number: GB9225712A
Authority: GB
Inventors: Colin Teck Hooi Yeoh; Derek James Aulton; Nicholas Hugh Withers
Original assignee: GEC Marconi Ltd; Marconi Co Ltd
Current assignee: BAE Systems Electronics Ltd
Priority date: 1991-12-09
Filing date: 1992-12-09
Publication date: 1993-06-30
Also published as: EP0570567A1; WO1993012516A1; GB9225712D0; GB9126127D0

Abstract

In a method of driving a ferroelectric liquid crystal device comprising ferroelectric liquid crystal material having associated row and column conductors which define a matrix of liquid crystal elements, pulses (3, 5; 11, 13, 15, 17; 29, 31; 57, 59, 61) of only one polarity are applied to the row and column conductors, the amplitude and the timing of the pulses being such that the resulting drive voltages (33; 45; 63; 73) are dc-compensated. The elements may all be initially set in a common predetermined optical state by application of blanking pulses (86, 89) to all of the row and column conductors, the drive voltages subsequently switching selected ones of the elements to the other optical state.

Description

Display Devices This invention relates to display devices and particularly ferroelectric liquid crystal (FLC) displays and devices and to a method of driving the liquid crystal elements of such displays and devices.

A typical FLC dot matrix display comprises a layer of ferroelectric liquid crystal material between a set of column electrode strips and a set of row electrode strips, the two sets being disposed orthogonally relative to each other. The pixels of the display are defined by the areas of overlap of the row and column electrode strips.

Time division multiplexed addressing of such displays involves parallel application of data pulses to the column electrodes simultaneously with serial application of strobe pulses to the row electrodes, i.e. the pixels are addressed one line at a time. Each pixel in a row is switched to one of its two states (i.e.

the '0' or '1' state) by the electrical field resulting from the combination of the signals applied to the row and column electrodes.

Any such FLC one-line-at-a-time addressing schemne comprises four elementary waveforms, as follows: (1) Select row waveform (SRW) (2) Non-select row waveform (NRW) (3b Data waveform for '0' state (DWO) (4) Data waveform for '1' state (DW1) At any given instant, only one row of pixels is selected, i.e. the select row waveform is applied to the conductor of that row, while the non-select row waveform is applied to all of the other row conductors. At the same instant, data waveforms are applied in parallel to the columns. The combination of the select row waveform and the data waveforms, comprising data waveforms for the '0' state and data waveforms for the '1' state as required, writes the image into the selected row.The row addressing time is therefore given by the duration of the select row waveform (which is, of necessity, equal to the duration of the non-select row waveform).

It is an object of the present invention to provide an improved drive scheme for a ferroelectric liquid crystal display or other device comprising a matrix of ferroelectric liquid crystal elements.

According to the invention there is provided a method of driving a ferroelectric liquid crystal device which comprises a quantity of ferroelectric liquid crystal material and row and column conductors associated with said material and defining a matrix of elements of said material, the driving method comprising applying to the row and column conductors pulses of only one polarity, the amplitude and timing of the pulses being such that the resultant drive voltages are dc-compensated.

Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which Figure 1 illustrates, schematically, elementary row and data waveforms occurring in a first drive scheme in accordance with the invention, Figure 2 illustrates, schematically, line-at-a-time addressing using the row waveforms of Figure 1, Figure 3 illustrates, schematically, elementary row and data waveforms occurring in a second drive scheme in accordance with the invention, Figure 4 illustrates, schematically, line-at-a-time addressing using the row waveforms of Figure 3, Figure 5 illustrates, schematically, elementary row and data waveforms occurring in a third drive scheme in accordance with the invention, Figure 6 illustrates, schematically, the result of combining row and data waveforms in a fourth drive scheme in accordance with the invention, Figure 7 illustrates, schematically, the result of combining row and data waveforms in a fifth drive scheme in accordance with the invention, and Figure 8 illustrates, schematically, the result of combining row and data waveforms in a sixth drive scheme in accordance with the invention.

The switching of ferroelectric liquid crystal elements is dependent upon the polarity, the amplitude and the pulse width of the pulses applied to the drive conductors. Above a certain threshold value of the voltage x time product of the applied waveform (i.e. the area of the pulse) a positive voltage pulse will switch the element to one of the states3 whereas a negative voltage pulse will switch it to the other state.

Referring to Figure 1(a) of the drawings, a select row waveform 1 comprises two positive pulses 3,5 of voltage V3 and of duration t5, separated by a period 7 of zero voltage of duration t + t3. A non-select row waveform 9 (Figure 1(b)) comprises a positive pulse 11 of amplitude V2, two positive pulses 13,15 of amplitude V1, and a positive pulse 17 of amplitude V2, the pulses all being of duration t and being separated by periods 19,21,23 of zero voltage of duration t2. After the pulse 17 there is a period 25 of zero voltage of duration t3 before the next pulse train begins. The voltages V1, V2 and V3 are related such that V3=3V1 and 2 2V1 so that V3-V2 = V2-V1 = V1.It will be apparent that neither the waveform 1 nor the waveform 9 is dc-compensated, because the pulses in each waveform are all of the same polarity.

Figure 1(c) shows a data waveform 27 for the '0' state.

This comprises two pulses 29, 31 of amplitude V3 and duration ts, spaced apart by a period of zero voltage of duration 2ts + 2t2 + t1 + t3. This waveform is repeated in Figure 1(d) for combination with the waveform 9 of Figure 1(b) as described below.

Figure 1(e) shows the combination (by subtr-action) of the select row waveform 1 of Figure 1(a) and the data '0' waveform 27 of Figure 1(c). The combined pulse train 33 comprises a negative pulse 35 of amplitude -V3, a period 37 of zero voltage of duration t2, two positive pulses 39,41 of amplitude +V3, and a negative pulse 43 of amplitude -V3. The pulses 35,39,41 and 43 are all of the same duration tSss so these pulses of the combined waveform are dc-compensated, whereas the row waveform 1 and the data waveform 27 taken separately are not dc-compensated.

Figure 1(f) shows the combination (by subtraction) of the non-select row waveform 9 of Figure 1(b) and the data '0' waveform 27. The combined pulse train 45 comprises a negative pulse 47 of amplitude V2-V3 = -V1, two positive pulses 49,51 of amplitude + V1 and a negative pulse 53 of amplitude -V1, all of duration ts.

These pulses are therefore dc-compensated, even though the pulses of the individual waveforms 9 and 27 are not dc-compensated. The pulses are not of sufficient amplitude to switch the unselected rows.

Figures 1(g) and 1(h) show the data waveform 55 for the '1' state. This comprises a positive pulse 57 of amplitude +V3, a positive pulse 59 of amplitude V2 spaced from the pulse 57 by a zero voltage period of t2+tS+tl+t3 duration and a positive pulse 61 of amplitude +V1 spaced from the pulse 59 by a zero voltage period of duration t2, the pulses being all of t5 duration.

The combination of the row select and data '1' waveforms 1 and 55 is illustrated in Figure 1(i). The combined waveform 63 comprises a negative pulse 65 of amplitude -V3, a positive pulse 67 of amplitude +V3, a positive pulse 69 of amplitude +V1, and a negative pulse 71 of amplitude -V1, all of duration ts. This composite waveform 63 is therefore dc-compensated, even though the waveforms 1 and 55, taken individually, are not dc-compensated.

The combination of waveforms 9 and 55 is illustrated in Figure 1(j). The composite waveform 73 comprises equal-amplitude (V1) pulses 75,77,79 and 81 of alternately negative and positive polarity, all of the pulses being of duration ts. The composite waveform 73 is therefore dc-compensated, even though the constituent waveforms 9 and 55 are not dc-compensated. These pulses are not of sufficient amplitude to switch the elements in the non-selected rows.

It will therefore be apparent that although the row and column waveforms are in themselves not dc-compensated, the resultant combinations of these waveforms are dc-compensated, since each resultant voltage is always preceded or followed by a pulse of equal amplitude and opposite polarity. Each pair of compensating pulses is separated by a voltage gap of duration t2. Each of the pair of these dc-compensated pulses is also preceded and followed by zero voltage periods of duration t1 and t3, respectively. The zero voltage periods between pulses are useful in non-volatile applications of ferroelectric liquid crystal displays because they reduce crosstalk by preventing a selected switching pulse being immediately followed by a pulse of the opposite polarity.In addition, the short circuiting of the pixel allows rapid relaxation of the liquid crystal directors to their bistable states, which again reduces crosstalk.

In the case of a selected row, as shown in Figures 1(e) and 1(i), the combination of the waveforms 1 and 27 for data state 'O' or waveforms 1 and 55 for data state '1' (i.e. regardless of the data) blanks the row to the '1' state. Each pixel in the row will then be written to the '0' state or will be left unswitched (i.e. in the '1' state) depending on whether the data waveform is waveform 27 or waveform 55.

In the case of the non-selected rows, the non-select row waveform 9 combines with the date '0' waveform 27 or the data '1' waveform 55 to give dc-compensated non-switching pulses, all of amplitude V1.

Figure 2 illustrates how the select row waveform 1 and the non-select row waveform 9 of Fiures 1(a) and (b) are used to effect line-at-a-time addressing. Figure 2(a) shows selection of the row i in a first line addressing period tL, Figure 2(b) shows selection of the row i+1 in a second line addressing period tL, and the row i+2 in a third line addressing period tL. The period tL can be easily derived from Figure 1(e) and is equal to 2(t1+t2+t3+2t5). The corresponding frame time is obtained from the product of the line addressing time tL and the number of rows (N) in a frame.

An alternative scheme is illustrated in Figures 3 and 4.

The entire display is firstly set in the '1' state by applying to all row and column conductors blanking waveforms 82 and 85, respectively, as shown in Figures 3(a) and 3(b). The row blanking waveform 82 comprises a single positive pulse 86 of amplitude +V3.

The column blanking waveform 85 also comprises a single positive pulse 89 of amplitude +V3.

Figure 3(c) shows the select row waveform 83, which comprises a positive pulse 87 of amplitude +V3. Figure 3(d) illustrates the non-select row waveform 91, which comprises a positive pulse 93 of amplitude +V1, followed by a positive pulse 95 of amplitude +V2.

The data '0' waveform 97 (Figures 3(e) and 3(f)) comprises a positive pulse 99 of amplitude +V3. Figure 3(g) illustrates the combination of the waveforms 83 and 97. The composite waveform 101 comprises a positive pulse 103 of amplitude +V3 followed by a negative pulse 105 of amplitude -V3, which is sufficiently large to switch the selected row element from its existing '1' state to the '0' state. Figure 3(h) shows the combination of the waveforms 91 and 97. The composite waveform 107 comprises a positive pulse 109 of amplitude +V1, and a negative pulse 111 of amplitude -V1. These latter pulses are too small to cause switching of the liquid crystal, so it remains in the '1' state.

The data '1' waveform is shown in Figure 3(i) and 3(j).

The waveform 113 comprises a positive pulse 115 of amplitude V2 followed by a positive pulse of amplitude V1.

Combination of the select row waveform 83 and the data '1' waveform 113 is shown in Figure 3(k). The composite waveform 119 comprises a positive pulse 121 of amplitude +V1 and a negative pulse 123 of amplitude -V1. Similarly, combination of the waveforms 91 and 113 produces a composite waveform 125 comprising a negative pulse 127 of amplitude -V1 and a positive pulse 129 of amplitude +V1. Neither of the waveforms 119 and 125 will switch the liquid crystal, so it remains in the '1' state, irrespective of whether or not a row is selected. As shown in Figure 3(k), the length of the line address time is tl+t2+t3+2ts, which is one half of the line time tL of the Figure 1 embodiment. The frame time is given by (N+1) (t1+t2+t3+2ts).

Figure 4 illustrates how the waveforms 82,83 and 91 are used to select successive rows of the display. Figure 4(a) shows the row waveform 131 for row i. It comprises the row blanking waveform 82, followed by a select row waveform 83 and successive non-select row waveforms 91. In Figure 4(b) the row waveform 132 for row i+1 comprises the row blanking waveform 82, a non-select row waveform 91, a row select waveform 83 and successive non-select row waveforms 91. Figure 4(c) shows the row waveform 133 for row i+2, comprising the row blanking waveform 82, two non-select row waveforms 91, a row select waveform 83, and successive non-select row waveforms 91.

Figure 5 illustrates another embodiment of the invention.

The row and line blanking waveforms 82,85 of Figure 3 are used to set the whole display to the '1' state. The select row waveform 135 (Figure 5(a)) comprises a positive pulse 137 of amplitude +V3 followed by another positive pulse 139 of amplitude +V3. The non-select row waveform 141 (Figure 5(b)) comprises a positive pulse 143 of amplitude +V1, two positive pulses 145,147 of amplitude +V2 and a positive pulse 149 of amplitude +V1.

Figures 5(c) and 5(d) show the data '0' waveform 151, which comprises a positive pulse 153 of amplitude +V3, a positive pulse 155 of amplitude +V1, and a positive pulse 157 of amplitude +V2. The pulse 157 is aligned with the row pulse 139 or the row pulse 149. The pulses 153 and 155 are aligned with the row pulses 145 and 147, respectively, in the non-select case.

Figure 5(e) shows the combination of the select row waveform 135 and the data '0' waveform 151. The composite waveform 159 comprises a positive pulse 161 of amplitude +V3, a negative pulse 163 of amplitude -V3, a negative pulse 165 of amplitude -V1, and a positive pulse 167 of amplitude +V1. As these pulses are all of the same duration ts, the waveform 159 is dc-compensated. The pulse 163 switches the associated liquid crystal elements to the '0' state.

Figure 5(f) shows the combination of the non-select row waveform 141 and the data '0' waveform 151. The composite waveform 169 comprises alternate positive and negative pulses 171,173, 175,177, of amplitudes +V1 and -V1, all of duration t5. The waveform 169 is therefore dc-compensated, but the pulses are too small to change the liquid crystal from its '1' state.

Figures 5(g) and 5(h) shows the data '1' waveform 179 which comprises positive pulses 181 and 183 each of amplitude +V3.

The pulses are aligned with the non-select row pulses 145 and 147, respectively, in the non-select case. Figure 5(i) shows the combination of the select row waveform 135 and the data '1' waveform 179. The composite waveform 185 comprises a positive pulse 187, a negative pulse 189, a negative pulse 191 and a positive pulse 193, of amplitude +V3 or -V3, as the case may be, and all of duration ts.

The waveform 185 is therefore dc-compensated. The pulse 189 will switch the liquid crystal to the '0' state and it will remain in that state until the positive pulse 193 switches it back to the '1' state, which is the final writing state. Figure 5(j) shows the combination of the non-select row waveform 141 and the data '1' waveform 179. The composite waveform 195 comprises a positive pulse 197, a negative pulse 199, a negative pulse 201 and a positive pulse 203, of amplitudes +V1 or -V1, as the case may be, and all of duration ts. The waveform 195 is therefore dc-compensated. The pulses are too small to cause the liquid crystal to switch from its initial '1' state.

A further embodiment of the invention is illustrated in Figure 6. Figure 6(a) shows the select row waveform 205, which comprises positive pulses 207 and 209, both of amplitude +V3 and of duration t5. The non-select row waveform 211 comprises a positive pulse 213 of amplitude +V2 immediately followed by a positive pulse 215 of amplitude +V1 so that the waveform exhibits a step 217, i.e. the zero-voltage period of duration t2 between the pulses in the previous embodiments is omitted. The waveform also comprises a positive pulse 219 of amplitude +V1 immediately followed by a positive pulse 221 of amplitude +V2, so that the waveform exhibits a second step 223, there being no zero-voltage period between those pulses. The data '0' waveform 225 (Figures 6(c) and 6(d)) comprises two positive pulses 227 and 229 of amplitude +V3.

The combination of the select row waveform 205 and the data '0' waveform 225 is shown in Figure 6(e). The composite waveform 231 comprises a negative pulse 233 of amplitude -V3 immediately followed by a positive pulse 235 of amplitude +V3. A second positive pulse 237 of amplitude +V3 is immediately followed by a negative pulse 239 of amplitude -V3. The pulses are all of duration ts, so the waveform 231 is dc-compensated. The pulse 233 switches the liquid crystal to the '0' state. The pulse 235 switches it to the '1' state, but the pulse 239 finally switches it to the '0' state. The combination of the non-select row waveform 225 and the data '0' waveform 225 is shown in Figure 6(f). The composite waveform 241 comprises a negative pulse 243 of amplitude -V1 immediately followed by a positive pulse 245 of amplitude +V1.A second positive pulse 247 of amplitude +V1 is immediately followed by a negative pulse 249 of amplitude -V1. The pulses are all of duration ts, so the waveform 241 is dc-compensated. The pulses are not large enough to switch the liquid crystal from its initial '1' state. The whole display may first be blanked to the '1' state by applying blanking pulses to all of the row and column conductors as described with reference to Figure 3, the pulses in this case being in adjacent time slots (similarly to the pulses 227 and 207).

The data '1' waveform 251 is shown in Figures 6(9) and 6(h). It comprises a positive pulse 253 of amplitude +V3 and a positive pulse of amplitude +V2 immediately followed by a positive pulse 257 of amplitude +V1 so that the waveform exhibits a step 259.

The combination of the select row waveform 205 and the data '1' waveform 251 is shown in Figure 6(i). The composite waveform 261 comprises a negative pulse 263 of amplitude -V3 positive pulse 267 of amplitude +V1 immediately followed by a negative pulse 269 of amplitude -V1. The pulses are all of duration ts, so the waveform 261 is dc-compensated. The pulse 263 will switch the liquid crystal material to the '0' state, but the pulse 265 will switch it back to the '1' state. The pulses 267 and 269 are too small to switch the liquid crystal. The combination of the non-select waveform 211 and the data '1' waveform 251 is shown in Figure 6(j). The composite waveform 271 comprises a positive pulse 273 of amplitude +V1 immediately followed by a negative pulse 275 of amplitude -V1.A second positive pulse 277 of amplitude +V1 is immediately followed by a negative pulse 279 of amplitude -V1. The pulses are all of duration ts, so the waveform 271 is dc-compensated. The pulses are too small to cause switching of the liquid crystal, so it remains in its initial '1' state.

A further embodiment of the invention is illustrated in Figure 7. The row and data waveforms are similar to those of Figure 1, but in Figure 7 V1 = V2 = it3. In Figure 7, therefore, waveforms 281,283,285,287,289,291 and 293 are similar to waveforms 1,9,27,33,45,55 and 63, respectively, of Figure 1, apart from the pulse amplitudes. However, waveform 295 of Figure 7 is different from the waveform 73 of Figure 1, because the third and fourth pulses of waveform 73 become zero in waveform 295 because the relevant pulses of waveforms 283 and 291 are of equal amplitudes (V1) and cancel out when combined by subtraction. As before, the waveforms 287,289,293 and 295 are dc-compensated.

In a further embodiment of the invention illustrated in Figure 8, the waveforms 281,285,287,291 and 293 are the same as in Figure 7, but the non-select row waveform 297 is different. The latter waveform comprises two positive pulses 299,301 which are amplitude V3 and which are aligned with pulses 303,305 of the waveform 285. When the waveforms 297 and 285 are combined by subtraction the result is a zero voltage 307 (Figure 8(f)). Also, when the non-select row waveform 297 is combined with the data '1' waveform 291, the composite waveform 309 (Figure 8(j)) comprises two pulses 311,313 of amplitude -V1 and V1, respectively which are aligned with the last two pulses of the data '1' waveform 291. The waveforms 287,307,293 and 309 are dc-compensated.

In an alternative addressing scheme (not shown) either of the two non-select row waveforms 283,297 may be applied to any non-select row at any time.

Other drive schemes may be used in which t1 or t3 is equal to zero, but schemes in which t1, t2 and t3 are all zero are less acceptable because crosstalk is increased. Although in the above-described embodiments the voltages are in the relationship V3=3V1, and V2=2V1, or, alternatively, V1=V2=iV3, pulses having other voltage relationships may be used, provided that in the resultant composite waveforms the pulses are dc-compensated in the manner described.

By use of the drive schemes of the present invention, all of the applied row and data waveforms require the provision of pulses of only one polarity. This is very advantageous in that it reduces the voltage swing required from the drive circuits.

Furthermore, non-volatility of the ferroelectric liquid crystal devices may be achieved.

Claims

1. A method of driving a ferroelectric liquid crystal device which comprises a quantity of ferroelectric liquid crystal material and row and column conductors associated with said material and defining a matrix of elements of said material, the driving method comprising applying to the row and column conductors pulses of only one polarity, the amplitude and timing of the pulses being such that the resultant drive voltages are dc-compensated.

2. A method as claimed in Claim 1, wherein each pulse in the resulting drive voltage is preceded or followed by a pulse of equal amplitude and duration and opposite polarity.

3. A method as claimed in Claim 1 or Claim 2, wherein each pulse applied to a row or a column conductor is separated from its adjacent pulse by a period of zero voltage.

4. A method as claimed in Claim 1 or Claim 2, wherein the pulses applied to the row or column conductors include a pair of contiguous pulses of the same polarity and of different amplitudes.

5. A method as claimed in any preceding claim, wherein pulses are initially applied to the row and column conductors to set the elements initially in a first state common to all of the elements; and wherein the drive voltages are subsequently effective, as required, to switch selected elements to a second state.

6. A method of driving a ferroelectric liquid crystal device substantially as hereinbefore described with reference to the accompanying drawings.