GB2251081A - Testing electronic circuits - Google Patents

Testing electronic circuits Download PDF

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Publication number
GB2251081A
GB2251081A GB9027349A GB9027349A GB2251081A GB 2251081 A GB2251081 A GB 2251081A GB 9027349 A GB9027349 A GB 9027349A GB 9027349 A GB9027349 A GB 9027349A GB 2251081 A GB2251081 A GB 2251081A
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GB
United Kingdom
Prior art keywords
circuitry
equipment
analysis
input
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9027349A
Other versions
GB9027349D0 (en
GB2251081B (en
Inventor
Hugh Brogan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to GB9027349A priority Critical patent/GB2251081B/en
Publication of GB9027349D0 publication Critical patent/GB9027349D0/en
Publication of GB2251081A publication Critical patent/GB2251081A/en
Application granted granted Critical
Publication of GB2251081B publication Critical patent/GB2251081B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2822Testing of electronic circuits specially adapted for particular applications not provided for elsewhere of microwave or radiofrequency circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

Apparatus for testing electronic circuits (27) comprises a test jig (21) having probes (29) for contacting predefined positions on the circuitry, input and output lines (22, 23, 25, 26) for feeding signals to and from the probes and means for providing selective connection with the predefined positions via the probes. The jig has control means and a bus (24) for control of the selective connection and the apparatus comprises a signal generator (20) for inputting signals to the test jig and means (20) for measuring signals from the test jig in predefined analysis routines. The probes may be electrically controlled to move to make and break contacts, as in Fig 3 not shown. Alternatively they may be fixed but energised or not energised by appropriate switch circuitry (Fig 4 not shown). <IMAGE>

Description

Automatic Analysis Apparatus Background of the Invention This invention relates to the testing and analysis of electronic circuitry. For example it provides apparatus for the analysis of RF circuit boards.
Summarv of the Prior Art Testing equipment is made by Hewlett Packard (trade mark), designated as equipment HP 3062, which is described in general in Figure 1. The equipment comprises a jig 10 on which a circuit is mounted, a number of items of electronic test equipment 11, 12, a personal computer 13 and some switching circuitry 14. There is a large loom of connections 15 connecting the jig 10 to the switching circuitry 14 and to the test equipment 11 and 12. Under control of the computer 13, the switching circuitry 14 enables the test equipment 11 and 12 to perform passive test operations on the circuit board mounted on the jig 10. By this, it is meant that resistances and capacitances can be measured between different predetermined points on the circuitry mounted on the jig 10.The PC 13 causes the circuitry 14 to switch certain selected points on the jig 10 to the appropriate item of measuring equipment, a resistance or capacitance is measured between two points and the measured value is fed to the computer 13, where it is compared with a table of expected values. An incorrect value indicates a fault. The aforesaid equipment is very bulky and is limited in its application in that it only performs passive tests, for example it can only indicate the existence of a fault by measuring passive parameters. It cannot perform tests to establish the cause of the fault and it cannot test the operation of the circuitry mounted on the jig 10.
Communications analysers are manufactured as items of standard test equipment, such as the Schlumberger Stabilock 4031 communication analyser, which incorporates a signal generator and an oscilloscope for injecting RF signals into circuitry to be tested and displays resultant signals on the oscilloscope.
Summary of the Invention According the present invent ion, apparatus is provided for the analysis of electrical circuitry, comprising: a test jig for supporting the electrical circuitry, the test jig comprising contact means for contacting predefined positions on the electrical circuitry, input and output lines for feeding signals to and from said contact means, switching means for providing selective connection between the input and the output lines and selected ones of set predetermined positions via said contact means and a control bus for input of commands to the switching means for control of said selective connection; analysis equipment, comprising a signal generator for inputting signals to the test jig input line and measuring means for measuring resultant signals from the test jig output line; and control means for issuing commands to the control bus of the test jig to set up predefined connections to the circuitry and for initiating the analysis equipment to execute predefined analysis routines corresponding to said predefined positions.
Preferably there is one RF input line, one RF output line, one audio input line and one audio output line between the test jig and the analysis equipment.
The contact means may comprise a number of fixed contacts and switching means for selectively switching between the input and output lines and the fixed contacts.
As an alternative or in addition, the contact means may comprise a number of movable contacts permanently connected to predetermined ones of the input and output lines. The test jig may be in the nature of a universal jig or "bed of nails" capable of making accurate connections to almost any point on the circuitry.
It is preferred that the analysis equipment comprises aR.F. and A.F. signal generators for generating a variable frequency signal and feeding said signal to an input line of the test jig and means for monitoring an output signal from the test jig resulting from said input signal. In combination with this feature, the control means is adapted to execute an analysis routine in which it controls the analysis equipment to vary said signal and compare parameters of the resultant signal with predetermined expected results.
Preferably the control means comprises means for entering a further analysis routine in response to failure of a first analysis routine to meet predetermined expected parameters. The further analysis routine may be arranged to cause the control means to issue a command to cause a reconfiguration of the switching means to provide connections between the input and output lines and different selected ones of said predefined positions.
In this manner, analysis can be performed to home in on areas of the circuitry which are thought to be faulty and fully test the operation of the faulty components or functions.
It is preferred that the control means provides means for issuing commands through the selected connections to points on the circuit board where those commands can be interpreted by the circuitry itself to vary the operation of the circuitry. In this way, the operation of microprocessors and other active elements of the circuitry can be controlled by the control means in combination with test routines to test the operation of those active components or functions.
In a further aspect, an RF connector between the test jig and the analysis equipment can be used for measuring received audio parameters.
There is preferably a duplex RF connector between the analysis equipment and the test jig for simultaneous transmit and receive measurements.
Brief Description of the Drawings Figure 1 shows test equipment in accordance with the prior art; Figure 2 shows analysis equipment in accordance with the present invention; Figure 3 shows a movable connector in accordance with one aspect of the present invention; and Figure 4 shows a switching arrangement in accordance with a second aspect of the present invention.
Figure 5 is a flow diagram of a test and analysis routine in accordance with the preferred embodiment of the invention.
Detailed Description of the Drawinas Referring to Figure 2, the preferred embodiment of the invention is shown to comprise analysis equipment, such as a Stabilock 4031 (trade mark), a test jig 21, a duplex RF connector 22, an RF track connector 23, an RS 232 bus 24, an audio input line 25 and an audio output 26. The test jig 21 has a circuit board 27 mounted thereon for testing.
Underneath the circuit board is a board 28 of predetermined connectors. These connectors are shown as movable probes 29.
In Figure 3, one such movable probe 29 is shown in more detail. It comprises a contact 30, a housing 31, solenoid 32, a spring 33, a connection 34 to the probe and connections 35 to the solenoid.
The operation of the equipment is as follows. The analysis equipment 20 issues a command on the bus 24 to cause a predetermined set of connectors 29 to make connection with predetermined points on the circuitry 27. Once the connections for a particular test have been set up, the test can be carried out as follows. A RF signal is generated by the equipment 20 and output either on the RF track line 23 or the duplex RF connector 22. This signal is fed to a predetermined connector 29,'where it enters the circuitry 27.
The circuitry 27 is powered up by means of two pre-selected connectors 29, via power lines on the bus 24 or other means.
At a further predetermined point on the circuitry 27, a RF signal is measured. This is output on RF connector 22 and displayed on an oscilloscope of the analysis equipment 20.
At the same time, predetermined parameters of that signal are measured, for example peak frequency, amplitude, phase, distortion etc. A look-up operation is performed by the analysis equipment 20 to look-up the expected values or range of permissible values for the measured parameter. These measured and expected values are compared and if the measured value falls within the expected range, the routine is passed and a further routine is executed. If, on the other hand, the measured value does not fall within the expected range, a further routine is selected aimed at further identification of the cause of the failed test. When the further routine is entered, this may cause different signals to be output on the RF track line or the duplex RF connector, or it may cause a different command to be output on the bus 24.Similarly, audio signals can be output on audio line 25 and resultant signals can be measured on the audio input line 26 and compared with predetermined expected parameters.
As a more specific example, a RF track routine can be formed to track the frequency response of a filter. For example, in the case of a RF receiver, to measure sensitivity, a 900 NHz signal can be injected through a receive duplex filter on the circuitry 27 and through further circuitry to an audio stage on the circuitry 27. The resulting audio signal is then fed on to the audio output line 26 which is connected to the analysis equipment 20 whereby the sensitivity of the receiver can be measured. The measured sensitivity is compared with the specification for the particular circuitry which is stored in a look-up table and a pass or fail indication is logged. This can be printed on an output printer.
Referring to Figure 4, an alternative arrangement within the test jig 21 is shown. On the left hand side is RS 232 bus 24. This is fed to a RS 232 decoder 40 and demultiplexer circuitry 41. The circuitry 41 is connected to four multi-way switches 42, 43, 44 and 45. The multi-way switches connect the RF input, RF output, audio input and audio output lines respectively to a number of different connections on the circuit board 27. The connections to the circuit board are fixed, for example by spring mounted probes. Further connections may be provided (not shown) for connecting power lines from the RS 232 bus directly to selected ones of the outputs of the multi-way switches, or further disconnectable power lines or permanent power lines may be connected to the circuit board.
Referring to Figure 5, a flow-chart for a set of tests is shown. In step 100, the user connects a board to the test jig 21 and selects a particular test from a menu displayed on the analysis equipment 20. The test is carried out, and if it emerges that the unit is not faulty, a report is printed in step 102 indicating the value of the parameter measured in the test and no further action is taken. If, on the other hand, the test proves that the unit is faulty, the system enters analysis mode (step 104) and in this mode tests are performed to try to identify where the fault is likely to lie. The analysis equipment performs a look-up operation in memory and pulls out a fingerprint for the board in question.
The fingerprint provides a list of parameter ranges which are to be expected at different nodes on the board when different signals are injected or tests are performed. In step 106, a signal is injected to the unit and a further signal received therefrom. The test jig or "bed of nails" is activated to take predetermined measurements at predetermined nodes and compare the measurements with the fingerprint. When a node is identified which gives an incorrect response, a fail test indication is given in step 107. In step 108, a look-up operation is made to identify which are the components that affect the signal at the failed node. In step 109, a printout is made of the possible problems which can give rise to the identified failure. This list is derived from memory, referenced by the node in question, and the particular failure identified.The list is provided in sorted order of probability of cause (or remedy). The probability is derived from a historical up-dating of the list due to past experiences of failures on similar boards. Thus, if a particular fault or component is regularly identified as the possible problem, this is raised in priority on the list. A manual step is carried out in step 110, in which the user visually or passively measure the suspect area. If the user successfully identifies the fault, he keys in (step 111) an identification code identifying the defect area or the faulty component. This input is used by the analysis equipment 20 to up-date its look-up files to raise the probability factor associated with that failed component. On a future print out, that component will have a greater likelihood of appearing higher on the list of probable causes/remedies.
The equipment assigns a weighting to each component and this weighting is based upon a historical accumulation of occurrences of failure of that component.
The equipment is preferably networked to further similar items of equipment, each item being mounted on separate production line of a factory. In this way, a fault detected in one production line can be used to up-date the files of other units so that that fault can be prevented or cured in another production line. This has the advantage that, on a real-time basis, one production line may be prevented from inserting a faulty component where another production line has identified that component as faulty. This represents a significant saving of cost where the construction of faulty boards can be avoided. It is much more expensive to remedy faulty boards than to temporarily halt the production line while the identified error is corrected. Without the networking of units together, it depends upon the operators to inform each other of the particular problems they are experiencing on their production lines. The production lines may not even be located in the same building. A prerequisite for the utilisation of this feature is means for controlling the construction of the boards and means for correlating a component in the construction process with a component in the fault detection process.

Claims (10)

1. Apparatus for the analysis of electrical circuitry comprising: a test jig for supporting the electrical circuitry, the test jig comprising: contact means for contacting predefined positions on the electrical circuitry; input and output lines for feeding signals to and from said contact means; switching means for providing selective connection between the input and output lines and selected ones of said predefined positions via said contact means and a control bus for input of commands to the switching means for control of said selective connection; analysis equipment comprising a signal generator for inputting signals to the test jig input line and measuring means for measuring resultant signals from the test jig output line; and control means for issuing commands to the control bus of the test jig to set up predefined connections to the circuitry and for initiating the analysis equipment to execute a predefined analysis routine corresponding to said predefined positions.
2. Apparatus according to claim 1, further comprising lookup means for storing parameters, and means for comparing a parameter of the measured resultant signals with the stored parameter.
3. Apparatus according to claim 2, further comprising decision means responsive to the comparison means for initiating the analysis equipment to perform a different predefined analysis routine when the measured parameter does not comply with the stored parameter.
4. Apparatus according to any one of the preceding claims wherein the switching means comprise a plurality of semipermanent connections to the circuitry and means for selectively connecting and isolating different ones of said connections.
5. Apparatus according to any one of claims 1 to 4 wherein the switching means comprises moveable connections and drive means for moving said connections to and from said circuitry.
6. Apparatus according to any one of the preceding claims, wherein the input and output means comprise radio frequency and audio frequency input and output lines.
7. Apparatus according to any one of the preceding claims, wherein the analysis equipment comprises a variable frequency generator and means for measuring a parameter of the amplitude response of circuitry in response to a varying frequency signal from the generator.
8. Apparatus according to any one of the preceding claims, further comprising means for issuing commands to the circuitry to control active components thereon.
9. Apparatus according to any one of the preceding claims, further comprising look-up means for correlating components of the electrical circuitry with weighting coefficients indicating the probability of a component being faulty, input means for inputting the identity of a component of the electrical circuitry identified as faulty, and means for adjusting the weighting coefficient of a component in response to the input means.
10. Production equipment comprising first and second production lines, each comprising analysis apparatus according to any one of the preceding claims arranged to analyse electrical circuits on the production line, and assembly equipment for assembling circuits on the line, the equipment further comprising communication means connecting the analysis apparatus of the two lines to the assembly equipment of each line, arranged such that a fault detected in one line is reported to the assembly equipment of both lines to prevent the continued assembly of circuits on a line when the assembly equipment of the line reaches an operation requiring the assembly of a component identified as faulty on one or other line.
GB9027349A 1990-12-18 1990-12-18 Automatic analysis apparatus Expired - Fee Related GB2251081B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9027349A GB2251081B (en) 1990-12-18 1990-12-18 Automatic analysis apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9027349A GB2251081B (en) 1990-12-18 1990-12-18 Automatic analysis apparatus

Publications (3)

Publication Number Publication Date
GB9027349D0 GB9027349D0 (en) 1991-02-06
GB2251081A true GB2251081A (en) 1992-06-24
GB2251081B GB2251081B (en) 1995-08-23

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2274716A (en) * 1992-09-22 1994-08-03 Mistrock Microsystems Limited Circuit tester
WO2017156780A1 (en) * 2016-03-18 2017-09-21 深圳市艾励美特科技有限公司 Radio-frequency detection apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111823167A (en) * 2020-08-10 2020-10-27 天津七一二通信广播股份有限公司 New generation CIR automatic test fixture and implementation method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2019011A (en) * 1978-04-13 1979-10-24 Ncr Co Testing apparatus for testing printed circuit board
GB2020439A (en) * 1978-05-05 1979-11-14 Zehntel Inc Circuit digital tester
US4354268A (en) * 1980-04-03 1982-10-12 Santek, Inc. Intelligent test head for automatic test system
GB2105050A (en) * 1978-08-25 1983-03-16 Racal Automation Ltd Improvements in and relating to circuit testing apparatus
GB2149129A (en) * 1983-11-04 1985-06-05 Membrain Ltd Automatic test equipment
GB2211951A (en) * 1987-10-30 1989-07-12 Teradyne Inc Testing input pin leakage currents
GB2214319A (en) * 1987-01-16 1989-08-31 Teradyne Inc Testing electronic circuits

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2019011A (en) * 1978-04-13 1979-10-24 Ncr Co Testing apparatus for testing printed circuit board
GB2020439A (en) * 1978-05-05 1979-11-14 Zehntel Inc Circuit digital tester
GB2105050A (en) * 1978-08-25 1983-03-16 Racal Automation Ltd Improvements in and relating to circuit testing apparatus
US4354268A (en) * 1980-04-03 1982-10-12 Santek, Inc. Intelligent test head for automatic test system
GB2149129A (en) * 1983-11-04 1985-06-05 Membrain Ltd Automatic test equipment
GB2214319A (en) * 1987-01-16 1989-08-31 Teradyne Inc Testing electronic circuits
GB2211951A (en) * 1987-10-30 1989-07-12 Teradyne Inc Testing input pin leakage currents

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2274716A (en) * 1992-09-22 1994-08-03 Mistrock Microsystems Limited Circuit tester
WO2017156780A1 (en) * 2016-03-18 2017-09-21 深圳市艾励美特科技有限公司 Radio-frequency detection apparatus

Also Published As

Publication number Publication date
GB9027349D0 (en) 1991-02-06
GB2251081B (en) 1995-08-23

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19971218