GB2244374A - Radiation beam bonding of semiconductor device contacts - Google Patents

Radiation beam bonding of semiconductor device contacts Download PDF

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Publication number
GB2244374A
GB2244374A GB9011399A GB9011399A GB2244374A GB 2244374 A GB2244374 A GB 2244374A GB 9011399 A GB9011399 A GB 9011399A GB 9011399 A GB9011399 A GB 9011399A GB 2244374 A GB2244374 A GB 2244374A
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United Kingdom
Prior art keywords
infra
wafer
red
laser
source
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Granted
Application number
GB9011399A
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GB2244374B (en
GB9011399D0 (en
Inventor
Paul John Rosser
Stephen Robert Jennings
Kevin Bryan Affolter
Kenneth George Snowdon
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STC PLC
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STC PLC
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Priority to GB9011399A priority Critical patent/GB2244374B/en
Publication of GB9011399D0 publication Critical patent/GB9011399D0/en
Publication of GB2244374A publication Critical patent/GB2244374A/en
Application granted granted Critical
Publication of GB2244374B publication Critical patent/GB2244374B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Soldered joints 19 in a circuit assembly comprising a semiconductor substrate 13 supporting a plurality of flip chips 21 are fused by directing laser radiation through the substrate wafer on to selected joints. The technique may be employed for the repair of defective solder connections. A carbon divider laser is suitable for use with silicon substrates which are transparent to radiation above 1 micron. <IMAGE>

Description

IMPROVEMENTS IN HYBRID CIRCUITS This invention relates to hybrid circuits, and in particular to hybrid circuit constructions of integrated circuit chips supported on a semiconductor wafer substrate. The invention further relates to a method of fabricating such constructions and to an apparatus for performing the method.
With the increasing miniaturisation of integrated circuit components there is now a facility to provide considerable processing power in a relatively small volume. A particularly promising development in this field has been provided by coupling a number of integrated circuits together to provide a single circuit unit constituting e.g. a computer function. One approach to this objective is to provide all the circuits in a common semiconductor wafer, the so-called wafer scale integrated circuit. Whilst this can, in principle, provide a compact and cost-effective arrangement, the introduction of the technique has been severely restricted by yield problems. This has been somewhat mitigated by the use of built-in redundancy techniques, but the wafer scale process is not yet commercially viable.
An alternative approach has been the introduction of the silicon hybrid circuit. In this arrangement a number of silicon integrated circuit chips are disposed on a silicon substrate wafer carrying an interconnection pattern and, in some applications, further components. As the chips are tested prior to mounting on the wafer substrate, the aforementioned yield problem is overcome and there is no necessity to provide any redundancy. However, problems have been experienced in providing a reliable electrical connection between the chip and the interconnection pattern on the wafer. A preferred construction providing this interconnection is an arrangement in which the integrated circuit chips are mounted each face downwards on an array of solder bumps provided on the substrate.The solder bumps, which are disposed in register with the integrated circuit contact pads, are fused to effect the connection by heating the entire assembly to an appropriate temperature. The technique is commonly referred to as a 'flip-chip' process. Whilst the technique is well suited to mass-production methods, it suffers from the disadvantage that some of the solder connections may be imperfect resulting in a high contact resistance. As the solder joints are hidden beneath the flip-chips it is not possible, using conventional techniques, to remake a single bad joint and the only solution is to reheat the entire assembly to reuse all the solder joints. This however tends to degrade the previously good joints, thus impairing the performance of the assembly.
An object of the invention is to miimise or to overcome this disadvantage.
A further object of the invention is to provide an apparatus and method of selectively reforming soldered joints in a flip-chip hybrid assembly.
According to one aspect of the invention there is provided a method of providing a soldered connection between a semiconductor wafer substrate and an integrated circuit mounted thereon, the method including directing focussed infra-red radiation through the wafer substrate on to the soldered connection whereby to effect fusion of that connection, the infra-red radiation having a frequency at which the substrate is transparent.
According to another aspect of the invention there is provided an apparatus for selective fusion of soldered connections between a semiconductor wafer substrate and an integrated circuit mounted thereon, the apparatus including an infra-red source operable at a frequency at which the wafer is transparent, optical means associated with the source for focussing the source output, and means for mounting an positioning said wafer with a soldered connection disposed at the focus of the infra-red source whereby the connection may be forced by radiation diverted through the wafer.
As the semiconductor wafer is transparent at the frequency of the radiation there is substantially no heating of the wafer and thus only the desired solder joint is fused. Preferably the infra-red radiation is derived from a laser, e.g. a carbon dioxide laser.
Typically the semiconductor material comprises silicon.
An embodiment of the invention will now be described with reference to the accompanying drawing in which: Fig. 1 is a schematic view of selective soldering apparatus; and Fig. 2 illustrates the infra-red absorption spectrum of silicon.
Referring to Fig. 1, the apparatus includes an annular mount 11 for receiving a substrate wafer 13 and for positioning the wafer relative to an infra-red source, e.g. laser 15, and its associated focussing optics 17. The mount 11 has lateral adjustment means (not shown) whereby the wafer 13 may be positioned such that a solder bump 19 on the upper wafer surface is disposed at the focal point of the laser beam. The solder bump 19 provides a means both of contacting and retaining a flip-chip 21 mounted on the wafer 13.
It will be appreciated that, when determining the focal length of the laser 15 and its associated optics 17, the refractive index of the wafer material will need to be taken into account.
The solder bond between the wafer 11 and the flip-chip 21 is formed by positioning the wafer 13 with the solder bump in register with the laser and switching the laser on for a sufficient period of time to effect fusion of the solder. The laser is then switched off and the solder is allowed to cool and solidify to complete the joint. As the heating is localised, only the selected joint is fused, the remaining solder joint of the assembly being unaffected. It is preferred to employ a tin/gold solder as no flux is required with this material.
The technique is particularly adapted to the repair or remaking of defective solder joints in a flip-chip hybrid assembly. Bad joints may be identified by electrical testing of the assembly or by examination of the assembly with an acoustic microscope . This device directs sound waves at the wafer and determines the quality of soldered joints between the wafer and the flip-chip carried thereon by analysing echoes received from the wafer.
It will be appreciated that the technique is not limited to repair applications but may also be used for device fabrication.
The optical properties of the wafer 13 determine the laser frequency range that may be employed. Specifically, the laser must have an output frequency at which the wafer is transparent. Fig. 2 illustrates the reflectivity and absorption coefficient of single crystal silicon in the infra-red region of the spectrum. As can be seen from Fig. 2, at wavelength above 1 micron the material has a low substantially constant reflectivity (R) and a low absorption coefficient (a). Consequently the material has a long absorption depth in this region of the spectrum.
Typically we employ wavelengths in the region 1 to 11 micron. In particular we have found that a carbon dioxide laser operating at 10.6 microns is suitable for providing soldered joints by the technique described herein.
The following Example illustrates the invention: Silicon wafer substrates were prepared by providing metallisation patterns comprising either 300 A Ti/3000 A Pt/l micron Au, or 300 A Cr/3000 A W/1 micron Au. The metallisation patterns included contact pads having dimensions in the range 25 to 50 microns square.
Integrated circuit chips were prepared by providing a contact pad metallisation comprising 300 A Ti/3000 A Pt/l micron Su/Au flash.
The chips were mounted on the pads on the wafer and each connection was then exposed to focussed radiation from a carbon dioxide laser to fuse the tin/gold interface so as to form a soldered joint.
Soldering was carried out in an atmosphere of forming gas (90% N2 and 10% H2) by alloying of the tin/gold interfaces between said chip and the substrate.
The carbon dioxide laser employed to effect soldering was operated in a pulsed mode under the following conditions: Wavelength 10.6 microns Pulse power 1--50 watts Pulse length 50-500 msec.
Spot diameter 50 microns.
Subsequent electrical testing of the soldered assemblies showed that effective soldered joints has been formed.
The Example demonstrates the feasibility of the invention.

Claims (13)

1. A method of providing a soldered connection between a semiconductor wafer substrate and an integrated circuit mounted thereon, the method including directing focussed infra-red radiation through the wafer substrate on to the soldered connection whereby to effect fusion of that connection, the infra-red radiation having a frequency at which the substrate is transparent.
2. A method as claimed in claim 1 wherein the infra-red source comprises a laser.
3. A method as claimed in claim 2, wherein the source comprises a carbon dioxide laser.
4. A method as claimed in claim 3, wherein the laser is operated in a pulsed mode and has a pulse power of 10 to 50 watts.
5. A method as claimed in any one of claims 1, to 4, wherein the semiconductor comprises silicon.
6. A method as claimed in any one of claims 1 to 5, wherein the solder comprises a tin/gold alloy.
7. A method as claimed in claim 6, wherein soldering is performed in an atmosphere of forming gas.
8. A method of selective soldering substantially as described herein with reference to and as shown in the accompanying drawings.
9. An apparatus for selective fusion of soldered connections between a semiconductor wafer substrate and an integrated circuit mounted thereon, the apparatus including an infra-red source operable at a frequency at which the wafer is transparent, optical means associated with the source for focussing the source output, and means for mounting an positioning said wafer with a soldered connection disposed at the focus of the infra-red source whereby the connection may be forced by radiation directed through the wafer.
10. An apparatus as claimed in claim 9, and incorporating an acoustic microscope whereby a defective soldered connection may be identified.
11. An apparatus as claimed in claim 9 or 10, wherein said infra-red source comprises a carbon dioxide laser.
12. A selective soldering apparatus substantially as described herein with reference to and as shown in Fig. 1 of the accompanying drawings.
13. A circuit assembly manufactured or treated by a method as claims in any one of claims 1 to 8.
GB9011399A 1990-05-22 1990-05-22 Improvements in hybrid circuits Expired - Fee Related GB2244374B (en)

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Application Number Priority Date Filing Date Title
GB9011399A GB2244374B (en) 1990-05-22 1990-05-22 Improvements in hybrid circuits

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GB9011399A GB2244374B (en) 1990-05-22 1990-05-22 Improvements in hybrid circuits

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GB9011399D0 GB9011399D0 (en) 1990-07-11
GB2244374A true GB2244374A (en) 1991-11-27
GB2244374B GB2244374B (en) 1994-10-05

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Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4312642A1 (en) * 1992-04-23 1993-10-28 Mitsubishi Electric Corp Method and device for contacting
FR2708143A1 (en) * 1993-07-19 1995-01-27 Mitsubishi Electric Corp Device and method for fixing a chip of a semiconductor element
EP0758145A2 (en) * 1995-08-08 1997-02-12 Taiyo Yuden Co., Ltd. Method of manufacturing circuit module
WO1999005719A1 (en) * 1997-07-23 1999-02-04 Infineon Technologies Ag Device and method for producing a chip-substrate connection
DE19751487A1 (en) * 1997-11-20 1999-06-02 Pac Tech Gmbh Method and device for the thermal connection of pads of two substrates
US6284998B1 (en) 1998-06-12 2001-09-04 Visteon Global Technologies, Inc. Method for laser soldering a three dimensional component
WO2001097278A1 (en) * 2000-06-12 2001-12-20 Advanced Micro Devices, Inc. Solder bump and wire bonding by infrared heating
US6459070B1 (en) * 2000-09-06 2002-10-01 Hannastar Display Corp. Process for repairing defect applied in liquid crystal display
WO2003030246A2 (en) * 2001-09-27 2003-04-10 Infineon Technologies Ag Device for soldering contacts on semiconductor chips
WO2003032377A1 (en) * 2001-10-05 2003-04-17 Robert Bosch Gmbh Method for joining a silicon plate to another plate
EP1369912A2 (en) * 2002-06-03 2003-12-10 Robert Bosch Gmbh Method of mounting a Flip chip using a laser beam
EP1569263A2 (en) * 2004-02-27 2005-08-31 Osram Opto Semiconductors GmbH Method for joining two wafers and wafer assembly
US8444044B2 (en) 2008-03-10 2013-05-21 Micron Technology, Inc. Apparatus and methods for forming wire bonds
EP2469596A3 (en) * 2010-12-23 2014-02-05 Automotive Lighting Reutlingen GmbH Light module for a lighting device of a motor vehicle with semiconductor light sources arranged on a silicon substrate
WO2018141568A1 (en) * 2017-02-02 2018-08-09 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V. Method for joining components on a support structure using electromagnetic radiation
CN114120847A (en) * 2020-08-26 2022-03-01 东捷科技股份有限公司 Self-luminous pixel device

Citations (5)

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Publication number Priority date Publication date Assignee Title
GB991267A (en) * 1962-04-10 1965-05-05 United Aircraft Corp Hermetically sealed semiconductor devices
GB1162184A (en) * 1966-03-09 1969-08-20 Ibm Improvements in and relating to Connections to Solid State Devices
GB1238335A (en) * 1967-08-31 1971-07-07
GB1385112A (en) * 1971-08-09 1975-02-26 Licentia Gmbh Method and apparatus for electrically connecting components of solar cell generators
EP0019186A1 (en) * 1979-05-17 1980-11-26 Siemens Aktiengesellschaft Joining the connection wires of semiconductor systems to the carrier elements

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB991267A (en) * 1962-04-10 1965-05-05 United Aircraft Corp Hermetically sealed semiconductor devices
GB1162184A (en) * 1966-03-09 1969-08-20 Ibm Improvements in and relating to Connections to Solid State Devices
GB1238335A (en) * 1967-08-31 1971-07-07
GB1385112A (en) * 1971-08-09 1975-02-26 Licentia Gmbh Method and apparatus for electrically connecting components of solar cell generators
EP0019186A1 (en) * 1979-05-17 1980-11-26 Siemens Aktiengesellschaft Joining the connection wires of semiconductor systems to the carrier elements

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4312642A1 (en) * 1992-04-23 1993-10-28 Mitsubishi Electric Corp Method and device for contacting
DE4312642B4 (en) * 1992-04-23 2004-07-08 Mitsubishi Denki K.K. Method and device for contacting
FR2708143A1 (en) * 1993-07-19 1995-01-27 Mitsubishi Electric Corp Device and method for fixing a chip of a semiconductor element
US5481082A (en) * 1993-07-19 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Apparatus and method for die bonding semiconductor element
EP0758145A2 (en) * 1995-08-08 1997-02-12 Taiyo Yuden Co., Ltd. Method of manufacturing circuit module
EP0758145A3 (en) * 1995-08-08 1997-11-19 Taiyo Yuden Co., Ltd. Method of manufacturing circuit module
US6353202B1 (en) 1997-07-23 2002-03-05 Infineon Technologies Ag Apparatus and method for producing a chip-substrate connection
WO1999005719A1 (en) * 1997-07-23 1999-02-04 Infineon Technologies Ag Device and method for producing a chip-substrate connection
DE19751487A1 (en) * 1997-11-20 1999-06-02 Pac Tech Gmbh Method and device for the thermal connection of pads of two substrates
US6394158B1 (en) 1997-11-20 2002-05-28 Pac Tech Packaging Technologies Gmbh Method and device for thermally bonding connecting surfaces of two substrates
US6284998B1 (en) 1998-06-12 2001-09-04 Visteon Global Technologies, Inc. Method for laser soldering a three dimensional component
WO2001097278A1 (en) * 2000-06-12 2001-12-20 Advanced Micro Devices, Inc. Solder bump and wire bonding by infrared heating
US6384366B1 (en) 2000-06-12 2002-05-07 Advanced Micro Devices, Inc. Top infrared heating for bonding operations
US6459070B1 (en) * 2000-09-06 2002-10-01 Hannastar Display Corp. Process for repairing defect applied in liquid crystal display
DE10147789A1 (en) * 2001-09-27 2003-04-10 Infineon Technologies Ag Device for soldering contacts on semiconductor chips
US7389903B2 (en) 2001-09-27 2008-06-24 Infineon Technologies Ag Device and method for soldering contacts on semiconductor chips
WO2003030246A3 (en) * 2001-09-27 2003-09-18 Infineon Technologies Ag Device for soldering contacts on semiconductor chips
WO2003030246A2 (en) * 2001-09-27 2003-04-10 Infineon Technologies Ag Device for soldering contacts on semiconductor chips
DE10147789B4 (en) * 2001-09-27 2004-04-15 Infineon Technologies Ag Device for soldering contacts on semiconductor chips
US6955975B2 (en) 2001-10-05 2005-10-18 Robert Bosch Gmbh Method for joining a silicon plate to a second plate
WO2003032377A1 (en) * 2001-10-05 2003-04-17 Robert Bosch Gmbh Method for joining a silicon plate to another plate
EP1369912A3 (en) * 2002-06-03 2004-01-14 Robert Bosch Gmbh Method of mounting a Flip chip using a laser beam
EP1369912A2 (en) * 2002-06-03 2003-12-10 Robert Bosch Gmbh Method of mounting a Flip chip using a laser beam
EP1569263A2 (en) * 2004-02-27 2005-08-31 Osram Opto Semiconductors GmbH Method for joining two wafers and wafer assembly
EP1569263A3 (en) * 2004-02-27 2009-05-06 OSRAM Opto Semiconductors GmbH Method for joining two wafers and wafer assembly
US7872210B2 (en) 2004-02-27 2011-01-18 Osram Opto Semiconductors Gmbh Method for the connection of two wafers, and a wafer arrangement
US8471385B2 (en) 2004-02-27 2013-06-25 Osram Opto Semiconductors Gmbh Method for the connection of two wafers, and a wafer arrangement
US8444044B2 (en) 2008-03-10 2013-05-21 Micron Technology, Inc. Apparatus and methods for forming wire bonds
EP2469596A3 (en) * 2010-12-23 2014-02-05 Automotive Lighting Reutlingen GmbH Light module for a lighting device of a motor vehicle with semiconductor light sources arranged on a silicon substrate
WO2018141568A1 (en) * 2017-02-02 2018-08-09 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V. Method for joining components on a support structure using electromagnetic radiation
CN114120847A (en) * 2020-08-26 2022-03-01 东捷科技股份有限公司 Self-luminous pixel device

Also Published As

Publication number Publication date
GB2244374B (en) 1994-10-05
GB9011399D0 (en) 1990-07-11

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