GB2243964A

GB2243964A - Receiver circuit with a temperature compensated demodulating stage

Info

Publication number: GB2243964A
Application number: GB9107206A
Authority: GB
Inventors: Charles Rydel
Original assignee: Valeo Securite Habitacle SAS
Current assignee: Valeo Comfort and Driving Assistance SAS
Priority date: 1990-04-06
Filing date: 1991-04-05
Publication date: 1991-11-13
Anticipated expiration: 2011-04-05
Also published as: FR2660780A1; FR2660780B1; GB9107206D0; DE4111097A1; GB2243964B

Abstract

The receiving circuit for a pulsed amplitude modulated carrier, eg bi-phase NRZ signal, comprises, in succession: a bop antenna (L0) tuned to the carrier frequency by a capacitor (C3); a demodulating stage (T1, R1, R4, R3, R5) connected directly to the antenna and having a bi-polar transistor (T1), and a semiconductor temperature compensating means T3 thermally insulated from the bi-polar transistor, a voltage amplifying stage (T6, R36, R34, R10, R9); and a re-shaping stage (S1) for the output signals from the amplifying stage. The non-linearity of the base-emitter junction of the demodulating transistor (T1) generates by distortion a signal at the frequency of the modulating signal, and its limited pass band eliminates the carrier frequency. The receiving circuit may be contained in a battery operated self-contained device, for example a motor vehicle driver's personal module, in the form of a credit card for remote operation of the doors or other components of a vehicle. The circuit has low power consumption. <IMAGE>

Description

1 A RECEIVER CIRCUIT FOR RADIO FREQUENCY SIGNALS FOR A SELFCONTAINED

ELECTRONIC DEVICE

This invention relates generally to devices for remote interrogation and response using electromagnetic radiation, especially with a view to identifying persons or objects, for example in the field of interactive remote control systems for motor vehicles or the like. More particularly, it is concerned with a receiving circuit for a portable element which is responsive to signals dedicated to the device itself, to which it then responds, for example, by transmitting an identification signal.

In interactive remote control systems which are adapted to enable the driver of a vehic.le to tie recognised at a distance as he approaches the vehicle, an electronic module on board the vehicle, and incorporated in it, transmits an interrogation signal to an electronic device which is generally in the form of a badge or a small flat card and which is carried by the driver, for example in his pocket. The card receives the interrogation signal, analyses it by means of a microprocessor incorporated in the card, and processes or commits to memory a coded identification signal which is unique to the card. This identification system is transmitted back to the onboard module by the card. This exchange of signals then causes a number of events to take place; for example it may cause the doors to be unlocked, or may be used for automatically adjusting certain items of equipment on the vehicle. Among the latter are, for example, the rear view mirr cirs and the seats, which may thus be adjusted to suit the height, posture and general driving requirements of the holder of the card.

One of the main difficulties "which are met with when using n such a remote control system is that the card carried by the driver should be small in size and weight, being typically of the size and weight of a credit card, whereas at the same time it should be highly self-contained and self-sufficient, for example over a period of about a year, so that the power consumption of its circuits is something that is determined during its design.

From United States patent No. 3 SSS _511, a demodulator circuit is known which includes a bi-polar transistor, with which a similar transistor is associated for temperature compensation purposes. A fraction of the collector-emitter voltage is taken from the latter transistor as a base polarising voltage. Such a circuit only operates if both transistors are coupled together thermally, for example in an integrated circuit. In addition, it is neither described nor suggested in the above mentioned United States patent that such a demodulator circuit may be directly connected to the receiving antenna, that is to say demodulation takes place before any amplification of the signals.

An object of the present invention is to provide, under these circumstances, a receiving circuit which has an extremely low power consumption, but which is at the same time capable of performing reliable demodulation and of producing high-amplitude output signals. More precisely, the invention aims to provide, using discrete components, a circuit of this kind which is able to be connected directly to an antenna in the form of a receiving loop, with temperature compensation being obtained without any thermal connection between the transistors.

According to the invention, in a receiving circuit for a self-contained, battery-driven, electronic device, the i.

A 3 1 circuit being adapted to receive a radio frequency signal defined by the pulsed amplitude modulation of a carrier wave by a modulating signal lying in a predetermined low frequency waveband, the circuit comprises, in succession:

- a loop antenna tuned to the carrier frequency by a capacitance; - a demodulating stage, fed directly by the antenna and including a bi- polar transistor having its emitter connected in the usual way, a polarisation branch from the base of the said transistor comprising two polarising. resistors in series, and a semi-conductor temperature compensating means which is thermally insulated from the bi-polar transistor, so that the non-linearity of the baseemitter junction of the latter produces by distortion a signal at the same frequency as the modulating signal, and so that its limited pass band eliminates the carrier frequency; - a voltage amplifying stage; and a stage for reshaping signals delivered by the amplifying stage.

Further features, objects and advantages of the present invention will become more evident from a reading of the following detailed description of a preferred embodiment of the invention, given by way of non-limiting example only and with reference to the accompanying drawings, in which:-

Figure 1 is a schematic diagram of a receiving circuit in accordance with the invention; Figure 2 is a detailed circuit diagram; and Figure 3 shows the wave forms of signals at various points 4 in the circuit shown in Figure 2.

It should first be mentioned that, as between one Figure of the drawings and another, the same reference numerals are used to designate identical or similar elements or parts of the circuit.

Referring first to Figure 1, a receiving antenna comprises a current loop LO, which is tuned to the frequency of carrier wave of the signal to be received, by means of a capacitor C3. Two diodes D1 and D2, connected in opposition to each other, are mounted in parallel with the antenna, which feeds a receiving circuit R. The latter is capable of producing square wave output signals representing the information received.

Referring now to Figure 2, the signal received through the antenna is passed via a decoupling capacitor C2 to the base of a first bi-polar n-pn transistor T1, which is polarised by resistors Ri and R4. The resistor R4 is mounted in series with a transistor T3, the base and collector of which are connected together, while its emitter is earthed. The transistor Tl is connected via an emitter resistor RS, an emitter capacitor Cl and a collector resistor R3. Its collector is connected directly to the base of an n-p-n transistor T4, which has a collector resistor R7, the emitter of the transistor T4 being earthed.

The collector of the transistor T4 is connected to the base of an n-p-n transistor T6 via a decoupling capacitor C17. The base of the transistor T6 is also connected to both the collector and base of the transistor T3, via a resistor R34. A resistor R36 is mounted, in addition, between the base of the transistor T6 and the positive power supply line. The transistor T6 has a collector resistor R10, an IL emitter resistor R9 and an emitter capacitor C6.

The collector of the transistor T6 is connected directly to the base of a further transistor T8, which has an emitter resistor R12 and a collector resistor R11. The collector of the transistor T8 is also connected to the two inputs of a NO-AND gate S1 having a known hysteresis characteristic.

The circuit is supplied from two batteries B1 and B41 connected in series, such as to deliver a d.c. voltage of the order of, for example, 5.5 volt. A diode D4 and a capacitor C4 are associated with the batteries. The diode D4 protects the circuits against any possible inversion of polarity, while the capacitor C4 is a power supply decoupling capacitor.

The antenna system LO, C3 is designed in the- present example so as to detect radio waves having a carrier wave frequency of the order of 120 kHz. In order to limit the size of the loop Lo, and to facilitate its mounting on a card of the credit card or similar type, it comprises for example a rectangular winding of 100 turns, in a wire of 0.1 mm diameter. The thickness of the winding thus obtained is of the order of 3 to 3.5 mm, which is compatible with the thickness that is required in the card. The capacitance of the capacitor C3 is chosen according to the frequency to be received and according to the value of the inductance of the loop LO.

The two diodes D1 and D2 enable the voltage induced at the terminals of the tuned antenna LO, C3 to be limited, so as to avoid saturation of the parts of the circuit situated downstream of it if the card is brought, for one reason or another, into very close proximity with the transmitting antenna.

6 In the present example, the coding of the digital signals to be transmitted to the card is of the bi-phase NRZ type, that is to say a carrier wave (which in the present example is a sinusoidal signal of 120 kHz) is amplitude modulated in pulses by a modulating signal in the form of a square wave. The frequency of the modulating signal may take either one of two discrete values, for example either 500 Hz or 1 kHz, according to the logic level that is to be transmitted. One advantage of this choice lies in the fact that such a coding has neither direction nor a continuous component.

The transistor T1 is the central element of the demodulating stage of the circuit. More precisely, the non-linearity of the emitter-base junction of such a bipolar transistor is used for introducing a distortion of the signal from the carrier wave, and thus to cause a signal to appear at the frequency of the modulating signal. Selective filtration, appropriate to the design of the demodulating stage, enables this signal to be recovered by eliminating the carrier frequency.

The purpose of the transistor T3 is to effect temperature compensation for variations in the base-emitter voltage of the transistor T1. The polarisation point of the transistor T1, and thus the stage gain, is thus prevented from fluctuating in response to variations of temperature. The arrangement described enables this compensation to be obtained without having to couple the transistors T1 and T3 together thermally.

Having regard to requirements in the matter of electrical energy consumption, transistors are chosen that have a high current gain f3 (preferably 100 or more) at low current levels of the order of microamperes.

7 The values of the resistances of the polarising resistors R1 and R4 are chosen to be as high as possible so as to minimise the bridge current. In addition, the resistor RS has a resistance determined by calculation, and the resistance of the resistor R3 is then chosen so as to be quite high, so that its dynamic is limited without being detrimental, while at the same time giving a high gain in voltage. The values of the resistances of the resistors are also chosen in such a way that the stage which is centred on the transistor T1 constitutes a filter, the outoff frequency of which will for example be equal to a few kHz, such that this value is compatible with the modulating signals, at SOO Hz and 1 kHz, of the received signal.

The gain of the amplifying stage which is arranged upstream of the transistor T1 is selected in accordance firstly with the amplitude of the signals delivered by the transistor TI, and secondly with the voltage variation necessary at its output S1 in order to cause the vehicle door to open. A gain of the order of several hundreds is particularly suitable.

The stage which is centred on the transistor T4, the collector of which is connected in the usual way, is a blocking stage which is necessary in order to take account of the very high ouput impendence of the demodulator stage, and in particular to avoid any attentuation between the two stages. The resistor R7 is selected to be of such a value that the collector current is of several fractions of a microampere.

It should be noted that no temperature compensation is provided for this intermediate blocking stage, given that the gain of this stage is unitary and the stage is hardly sensitive to variations in the polarisation point. The 8 additional space thus made available can be significant.

The amplifying stage itself is centred around the transistor T6, with the transistor T3 having a temperature compensation function common to both the amplifying and demodulating stages. In a modification, however, it is possible to provide two separate temperature compensating transistors for the demodulating and amplifying stages.

The values of resistance of the resistors R_336 and R34 are for example the same as those of the resistors R1 and R4. The resistor R9 is chosen so that the collector current is of the order of one or a few microamperes. The resistor R10 is so chosen as to give a high gain while guaranteeing a sufficiently large dynamic.

The stage which is centred on the transistor TS is an interface stage between the output of the transistor T6 and the NO-AND gate S1, with the transistor T8 being arranged as a switch. The values of the resistors R11 and R1-2 are so chosen that when the transistor T8 is saturated, the output voltage will be lower than the lower threshold voltage of the gate, for example one volt. The NO-AND gate S1 is adapted to synthesise the signals emitted from the amplifier. Preferably, a gate of the CMOS type is chosen so as to give a limited current consumption. Its hysteresis gives the circuit improved immunity to noise.

Figure 3 shows the waveforms of the signals at, reading respectively from the top, the input of the circuit (tension V1), the output of the demodulating stage (voltage V2), and the output of the gate S1 (voltage V3).

An essential advantage of the present invention is that a reliable and effective demodulating function is obtained with low current consumption. In particular, one essential 1 A.

9 feature of the invention, whereby demodulation and filtering of the signals is carried out before any substantial voltage amplification, enables a mean current consumption to be obtained which is very much reduced. More precisely, experimental work has led to the achievement of a receiving circuit in accordance with this invention in which current consumption is of the order of 4 pA with a supply voltage of the order of S.S volts. By suitably dimensioning the battery or batteries, it is thus possible to leave the receiving circuit permanently switched on, which enables an initial part of the messages received to be used as signals for energising a circuit situated downstream.

The receiving circuit of the present invention may be used in any appropriate decoding device, inc.orporated for example in a microprocessor.

The invention is of course in no way limited to the embodiment described above and shown in the drawings: any variant or modification within the spirit of the invention may be applied to it.

Claims

1. A receiving circuit for a selfcontained, batterydriven, electronic device, the circuit being adapted to receive a radio frequency signal defined by the pulsed amplitude modulation of a carrier wave by a modulating signal lying in a predetermined low frequency waveband, wherein the circuit comprises, in succession:

- a loop antenna tuned to the carrier frequency by a capacitance; --a demodulating stage, fed directly by the antenna and including a bi- polar transistor having its emitter connected in the usual way, a polarisation branch from the base of the said transistor comprising two polarising resistors in series. and a semi-conductor temperature compensating means which is thermally insulated from the bi-polar transistor, so that the non-linearity of the baseemitter junction of the latter produces by distortion a signal at the same frequency as the modulating signal, and so that its limited pass band eliminates the carrier frequency; - a voltage amplifying stage; and - a stage for reshaping signals delivered by the amplifying stage.

2. A receiving circuit according to Claim 1, wherein the demodulating stage further includes a collector resistor and an emitter resistor, with the polarising resistors of the base, collector and emitter having high resistance values whereby to obtain a low cut-off frequency in the said stage while limiting current consumption.

1 f.

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3. A circuit according to Claim 1 or Claim 2, wherein the temperature compensating means is common to the demodulating and amplifying stages.

4. A circuit according to any one of Claims 1 to 3, further including, between the demodulating and amplifying stages, a further stage comprising a further bi-polar transistor, having its collector connected in the usual way so as to act as an impedance-adapting or blocking stage.

5. A circuit according to any one of Claims 1 to 4, further comprising, between the amplifying and re-shaping stages, an interface stage comprising a switching transistor.

6. A circuit according to any one of Claims 1 to 5, wherein the reshaping stage comprises a NO-AND gate having its two inputs connected together.

7. A circuit according to any one of Claims 1 to 6, further including two voltage limiting diodes mounted opposition to each other between the input cif the demodulating stage and earth.

8. A receiving circuit substantially as described in the foregoing description with reference to the accompanying drawings.

Published 1991 at The Patent Office. Concept House, Cardiff Road, Newport. Gwent NP9 1 RH. Further copies may be obtained from Sales Branch, Unit 6, Nine Mile Point, Cwnifelinfach. Cross Keys, Newport, NP1 7HZ. printed by Multiplex techniques lid. St Mary Cray, Kent.