GB2233486A - Alarm apparatus - Google Patents

Abstract

The apparatus comprises an alarm loop and an anti-tamper loop. The alarm loop has first and second terminals 16a, 16b and at least one alarm detector 18, 20, 24, and is selectively operable between on and off states. The anti-tamper loop has third and fourth terminals 26a, 26b and at least one alarm detector 28, 30, and is arranged to be in the on state. The second and third terminals are coupled together and a source of a constant potential difference is applied to the first and fourth terminals by way of a resistive means 44. Means, such as an analog to digital converter, responsive to the potential difference across said first and fourth terminals, is provided to indicate the operational state of the detectors in the loops. <IMAGE>

Description

ALARM SYSTEMS This invention relates to alarm apparatus such as burglar and/or fire alarm apparatus.

Generally, security alarm apparatus or systems comprise two detection loops, namely an anti-tamper loop which is operational all of the time and an alarm loop which can be set selectively between operational on and off as required. The selection can be manual, for example in the case of simple household burglar alarms or under the control of other equipment, for example as part of a computer-controlled system in the case of more sophisticated alarms.

Detectors in the loops can be normally-closed or normally-open switches or both, and in the case of a burglar alarm, would be positioned to be activated by the presence of an unauthorised person in the premises to be protected.

The alarn loop is usually naintained at a different potential from that of the anti-tamper loop.

The usual way to monitor the loops is to provide a voltage-sensing means for each loop, i.e. two sensing means for a single zone comprising an alarm loop and an anti-tamper loop. In a tpical system there will be a plurality of such zones each requiring two measuring means. It is important, particularly in computer-controlled systems, to keep the number of signal output lines fron each zone to a minimum because of the restricted number of corresponding input terminals available in the computer, or at least the signal detection portion thereof. Put another way, for a given computer system if the number of alarm-zone output lines can be reduced, the number of zones which can be coupled to the computer can be increased accordingly.

According to the invention there is provided alarm apparatus comprising an alarm loop having first and second terminals and at least one alarm detector, the alarm loop being selectively operable between on and off states, an anti-tamper loop having third and fourth terminals and at least one alarm detector, the anti-tamper loop being arranged in operation of the apparatus, to be in the on state, means coupling together the second and third terminals, means for applying a source of a constant potential difference to the first and fourth terminals by way of a resistive means and means responsive to the potential difference across said first and fourth terminals to indicate the operational state of the detectors in said loops.

In general, there will be a plurality of detectors and they can be normally-closed serially-coupled devices or normally-open parallel-coupled devices or a combination thereof.

The potential difference responsive device may be an analog to digital converter.

The potential difference responsive device may be a voltage-to-time duration converter, such as a converter in which the time duration can be determined by counting the number of pulses generated by a constant frequency pulse generator in the said time duration.

The invention will now be described by way of example with reference to the accompanying drawings, in which: Fig.1 is a circuit diagram of a known alarm apparatus comprising an anti-tamper loop and an alarm loop, and Fig.2 is a circuit diagram of one embodiment of an alarm apparatus according to the invention, comprising an anti-tamper loop and an alarm loop.

Referring to Fig. 1 of the drawings, there is shown an alarm apparatus 10 comprising an alarm loop 12 and an anti-tamper loop 14. The loops 12 and 14 constitute an alarm zone.

The alarm loop 12 comprises first and second terminals 16a, 16b, two normally-closed detectors 18, 20 serially coupled with a resistor 22 between the terminals 16a, 15b and a normally-open detector 24 coupled in parallel with the terminals 16a, 16b.

The anti-tamper loop 14 comprises third and fourth terminals 26a, 26b and two normally-closed detectors 28, 30 coupled in series therewith.

The terminals 16b, 26b are coupled to a source of a reference d.c. voltage level 27 and terminals 16a and 26a are coupled as input signals to a voltage-level responsive device (not shown) in a control unit 32.

In use of the apparatus 10, the anti-tamper loop 14 is arranged to be operational at all times whereas the alarn loop 12 can be selectively switched between "on" and "off" states according to the requirements of the user.

The two loops 12, 14 are usually maintained at different potential levels and in the present apparatus 10, this potential difference is generated by the current passing the resistor 22 together with the voltage difference between the two references 27.

Thus, in operation of the apparatus 10, the voltage levels at terminals 16a, 26a will be dependent upon the state of the detectors. For example, the apparatus 10 may be a, or part of a, burglar alarm in which the normally closed detectors are door/door frame contacts and the normally-open detector a pressure mat such that if an unauthorised intruder were to open a door fitted with a detector or to stand on the pressure mat, the change in state of the associated loop would be detected by the voltage-level responsive device coupled to terminal 16a or 26a or both.

Thus, there has been described a simple alarm detector apparatus; in practice there would be a plurality of such zones, the detectors could comprise not only normally-open and normally-closed detectors but also a variety of other detector devices such as smoke, fire, temperature, ultra-sonic and infra-red detectors.

The voltage responsive devices could be used simply to control an indicator such as a visual or audible indicator.

The alarm zones could be part of a more sophisticated system which might include a computer controlled system.

In such electronic devices, embodying integrated circuits and the like it is often important to keep to a minimum the number of input and output leads. In the apparatus 10 as described with reference to Fig. 1, it will be seen that a one-zone, two loop apparatus has four terminals to be accommodated.

It is an object of the invention to provide an alarm apparatus wherein the number of signal terminals is less than that of the known apparatus as described.

Referring now to Fig. 2, there is shown an alarm apparatus 40 comprising an alarm loop 12 and an anti-tamper loop 14 substantially as described with reference to Fig.1.

The terminals 16a, 16b are coupled together by way of a resistor 44 and terminals 16b and 26a are coupled directly.

A constant voltage d.c. supply 46 is coupled to the terminal 16a by way of a resistor 48, and a resistor 50 and capacitor 52 are coupled in series across the terminals 16a, 26b.

The junction 51 of the components 50, 52 is connected as a single input Sla to the electronic monitoring circuits (not shown). A switch 54 is coupled across the capacitor 52 whereby the charge and voltage across the capacitor can be reduced to zero.

In operation of the apparatus 40, the various detector devices 18, 20, 24, 28 and 30 are in their normal operational state as shown.

If switch 51 is activated from closed to open and the voltage across capacitor 52 increases in an exponential manner towards an aiming voltage across the R.C. circuit and at a rate dependent upon the time constant (T.C. = R.C. where R is the equivalent resistance in series with capacitor C).

It will be seen that the aiming voltage and the resistance R can vary dependent upon the operational state of the detectors.

For example if the switch 54 is opened and:1. If both loops are in the normal, quiescent mode, the aiming voltage is that across terminals 16a, 26b and it would have a magnitude dependent upon the supply voltage 46 across a potential divider comprising resistor 48 and resistors 44 and 22 in parallel. The time constant T.C.

would be the product of the values of resistance 50 and capacitor 52.

2. If either of the detectors 28, 30 in the anti-tamper loop is rendered open circuit the aiming voltage is the supply voltage 46 across the serial circuit of resistors 48, 50 and capacitor 52 and T.C. = (R48 + Rso) Cos2* 3. If either of the detectors 18, 20 in the alarm loop is rendered open circuit, the aiming voltage is that across terminals 16a, 26b, and it would have a magnitude dependent upon the supply voltage 46 across a potential divider comprising resistors 48 and 44, and T.C. = R50 C52.

4. If the detector 24 in the alarm loop 12 is rendered closed constant circuit then the voltage across the terminals 16a, 26b and hence the aiming voltage is reduced to zero.

5. If at'leastone of the detectors 18, 20 and at least one of the detectors 28, 30 are rendered open circuit, the aiming voltage is the supply voltage and T.C. = (R + Rso) C52 (see example 2 above).

6. If detector 24 is rendered closed circuit and detector 28 or 30 rendered open circuit, the aiming voltage and time constant are the same as Examples 2 and 5 above.

Thus, it will be seen that the rate of change of voltage across the capacitor is dependent upon the operational state of the detectors, and this voltage appears at terminal 51a.

In use of the apparatus the switch would be closed to reset the voltage across capacitor 52 to zero and opened periodically so that the capacitor starts to charge towards it aiming voltage, and it is necessary to interrogate the signal to determine the operational state of the detectors.

One preferred method of achieving this is to measure the time period it takes the voltage across capacitor 52 to attain a predetermined value and this can be done by counting the number of pulses generated by a clock pulse generator (not shown) in the said period. Thus the circuit shown within the control unit 42 together with the clock pulse generator and counter (not shown) can be regarded as an analog to digital converter specifically an analog to time duration converter. The resulting count is thus an indication of the operational state of the detectors in both the anti-tamper loop and the alarm loop.

The signal at terminal 51a could be interrogated in other ways and could be converted to a logic signal having 'high' and 'low' states.

Although shown diagrammatically as a mechanical device, switch 54 can be a transistor or other semiconductor switch.

Thus there has been described a two-loop single zone alarm apparatus requiring only one input to the interrogating/control apparatus.

In the usual apparatus, there will be more than one zone but each zone of the kind described will require only one input.

A separate switch 54 can be provided for each zone or it could be common to a plurality of such zones.

The apparatus has been described in which the time duration is measured during the charging of the capacitor, but the invention is also applicable to the exponential discharge of a charged capacitor.

Claims (7)

1. Alarm apparatus comprising an alarm loop having first and second terminals and at least one alarm detector1 the alarm loop being selectively operable between on and off states, an anti-tamper loop having third and fourth terminals and at least one alarm detector, the anti-tamper loop being arranged in operation of the apparatus, to be in the on state1 means coupling together the second and third terminals, means for applying a source of a constant potential difference to the first and fourth terminals by way of a resistive means and means responsive to the potential difference across said first and fourth terminals to indicate the operational state of the detectors in said loops.

2. Apparatus according to claim 1, wherein one or both loops comprise a plurality of detectors.

3. Apparatus according to claim 1 or 2, wherein said detectors are normally-closed serially-coupled devices or normally-open parallel-coupled devices or a combination thereof.

4. Apparatus according to claim 1, 2 or 3, wherein the potential difference responsive device is an analog to digital converter.

5. Apparatus according to claim 1, 2, 3 or 4 wherein the potential difference responsive device is a voltage-to-time duration converter.

6. Apparatus according to claim 5, wherein the time duration is determined by counting the number of pulses generated by a constant frequency pulse generator in the said time duration.

7. Alarm apparatus substantially as hereinbefore described with reference to and as illustrated in Fig.

of the accompanying drawing.