GB2187909B - An interface circuit - Google Patents

An interface circuit

Info

Publication number
GB2187909B
GB2187909B GB8705635A GB8705635A GB2187909B GB 2187909 B GB2187909 B GB 2187909B GB 8705635 A GB8705635 A GB 8705635A GB 8705635 A GB8705635 A GB 8705635A GB 2187909 B GB2187909 B GB 2187909B
Authority
GB
United Kingdom
Prior art keywords
microprocessor
power
enabled
reset
interface circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB8705635A
Other versions
GB8705635D0 (en
GB2187909A (en
Inventor
Michael O'connor
John Mary Walters
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lake Electronic Technologies Ltd
Original Assignee
Lake Electronic Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from IE861292A external-priority patent/IE861292L/en
Application filed by Lake Electronic Technologies Ltd filed Critical Lake Electronic Technologies Ltd
Publication of GB8705635D0 publication Critical patent/GB8705635D0/en
Publication of GB2187909A publication Critical patent/GB2187909A/en
Application granted granted Critical
Publication of GB2187909B publication Critical patent/GB2187909B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)
  • Power Sources (AREA)

Abstract

A power on reset and watchdog circuit for a microprocessor (IC1) inhibits operation of the microprocessor for a predetermined period of time on initial application of power and thereafter enables the microprocessor as long as it receives an appropriate signal (pin 2 of IC1) from the microprocessor indicating normal operation. If this signal fails, the microprocessor is reset. Two circuits can be used with additional logic gates with a pair of microprocessors such that only one is enabled when power is first applied, and if this should fail to operate subsequently the second is enabled and the first inhibited. <IMAGE>
GB8705635A 1986-03-13 1987-03-10 An interface circuit Expired - Fee Related GB2187909B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
IE65986 1986-03-13
IE861292A IE861292L (en) 1986-05-15 1986-05-15 Reset circuit for microprocessor
IE205186 1986-07-31

Publications (3)

Publication Number Publication Date
GB8705635D0 GB8705635D0 (en) 1987-04-15
GB2187909A GB2187909A (en) 1987-09-16
GB2187909B true GB2187909B (en) 1990-09-12

Family

ID=27270317

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8705635A Expired - Fee Related GB2187909B (en) 1986-03-13 1987-03-10 An interface circuit

Country Status (2)

Country Link
GB (1) GB2187909B (en)
NL (1) NL8700584A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2635885B1 (en) * 1988-08-26 1993-01-15 Beris METHOD FOR PROTECTING A PROGRAMMED SYSTEM AT THE CENTRAL UNIT AGAINST PARASITES AND DEVICE FOR CARRYING OUT SAID METHOD
AT398645B (en) * 1991-11-04 1995-01-25 Alcatel Austria Ag COMPUTER SYSTEM
GB2306815A (en) * 1995-11-04 1997-05-07 Thomson Multimedia Sa Delay circuit for consumer electronic goods eg TV sets, VCRs

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2006488A (en) * 1977-10-20 1979-05-02 Euteco Spa Computer system for controlling the operation of an industrial plant
US4367422A (en) * 1980-10-01 1983-01-04 General Electric Company Power on restart circuit
GB2105877A (en) * 1981-09-14 1983-03-30 United Technologies Corp Watch-dog timer circuit
US4429236A (en) * 1980-09-24 1984-01-31 Robert Bosch Gmbh Apparatus for generating pulses upon decreases in supply voltage

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2006488A (en) * 1977-10-20 1979-05-02 Euteco Spa Computer system for controlling the operation of an industrial plant
US4429236A (en) * 1980-09-24 1984-01-31 Robert Bosch Gmbh Apparatus for generating pulses upon decreases in supply voltage
US4367422A (en) * 1980-10-01 1983-01-04 General Electric Company Power on restart circuit
GB2105877A (en) * 1981-09-14 1983-03-30 United Technologies Corp Watch-dog timer circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
WO 82/01269 *
WO 83/00155 *
WO 86/03312 *

Also Published As

Publication number Publication date
NL8700584A (en) 1987-10-01
GB8705635D0 (en) 1987-04-15
GB2187909A (en) 1987-09-16

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19930310