GB2166555A - Impedance measuring method and apparatus - Google Patents

Abstract

Ratiometric impedance measurements are made by comparing (22) the output of a voltage converter (18) with the voltage at a tap between an unknown impedance (14) and a known impedance (16). A common input voltage Vr is supplied both to the series circuit including the known and unknown impedances, and to the converter (18) which accomplishes attenuation of the input voltage in response to a digital value. The digital value is generated by a successive approximation register (SAR) which supplies a digital output (21) representative of the unknown impedance. <IMAGE>

Description

SPECIFICATION Impedance measuring method and apparatus Background of the Invention Instruments for measuring impedance values desirably have the ability of making the required measurements when the device under test is powered down, i.e. with the measuring instrument providing whatever power is necessary for the measurement. However, devices which may be tested represent a wide range of voltage requirements and limitations. For instance, if pn junctions are included in a circuit under test, any applied voltage must be sufficiently low to prevent damage or undesirable turn on of the pn junctions. Because of the variable value of the excitation voltage required and because of a desire to avoid, if possible, switching of meter ranges, it is advantageous to measure the impedance ratiometrically, i. e. in terms of a standard impedance rather than in terms of the applied voltage.

Apparatus has been available heretofore for making ratiometric impedance measurements, but such apparatus has usually required fairly complicated and expensive circuitry in order to provide a digital output reading. Thus, a conventional bridge circuit or an electronic analog thereof can measure an impedance in terms of a second or standard impedance. Also, computer circuits are available which measure the voltage drop across an unknown impedance and a standard impedance and which then perform a calculation for the ratio between the two. This approach has a speed governed by the speed and complexity of the computer.

The desirable elimination of switching between different measurement ranges has also heretofore required some scheme to compress the measurement scale. In the past, a logarithmic amplifier has been employed, but unfortunately such an amplifier tends to be unstable, inaccurate, expensive, and occupies considerable printed circuit board area.

Summary of the Invention In accordance with the present invention in a particular embodiment thereof, a predetermined voltage source, which may be adjusted in accordance with the requirements of the device under test, is coupled to the series combination of an unknown impedance and a standard impedance.

The same input voltage is also adjustably attenuated in accordance with a digital value derived through successive approximation. The attenuated voltage is compared with a voltage drop associated with the standard impedance, and as a result of this comparison, a digital value is finally determined to supply a measure of the unknown impedance in terms of its ratio to the standard impedance.

In particular, the successively approximated digital value is supplied by means of a register wherein binary digits successively determine the degree of attenuation of the predetermined voltage before comparison thereof with the voltage across the unknown impedance. For example, binary digits are progressively generated, starting with the highest order digit, and each brings about attenuation of the aforementioned voltage in inverse proportion to the value of the binary digit. Successive comparisons are made and a binary number is accumulated which represents the ratiometric value of the unknown impedance in terms of the standard impedance.

The process is very faint, requiring a number of clock cycles equal only to the number of output digits (the resolution) provided by the successive approximation register. The technique is economical in terms of component parts and relatively uncomplex as compared with prior art devices. Also, desirable scale compression is accomplished, with considerable accuracy, avoiding the employment of logarithmic amplifiers and the like.

It is accordingly an object of the present invention to provide an improved method and apparatus for determining the value of an impedance.

It is further object of the present invention to provide an improved method and apparatus for measuring an unknown impedance and rapidly providing an output reading as a digital value.

It is another object of the present invention to provide an improved impedance measuring method and apparatus which is substantially independent of the test voltage applied to the unknown impedance.

It is a further object of the present invention to provide an improved and accurate impedance measuring method and apparatus which is uncomplex and low cost in execution.

It is a further object of the present invention to provide an improved impedance measuring method and apparatus which avoids range switching and supplies scale compression while maintaining accuracy.

The subject matter of the present invention is particularly pointed out and distinctly claimed in the concluding portion of this specification. However, both the organization and method of operation, together with further advantages and objects thereof, may best be understood by reference to the following description taken in connection with accompanying drawings wherein like reference characters refer to like elements.

Drawings Figure 1 is a block diagram of an impedance measuring apparatus in accordance with the present invention, Figure 2 is a more detailed block and schematic diagram of the present invention, and Figure 3 is a curve plotting percentage error of measurement according to the present method and apparatus as a function of measured impedance.

Detailed Description Referring to the drawings and particularly to Fig. 1, illustrating the present invention in block diagram form, an excitation voltage Vr is provided at node 10 of the circuit from amplifier 12 and this excitation voltage is applied to a series circuit comprising unknown impedance 14 having a value Zx and a standard or known impedance 16 having a value Zr, disposed between node 10 and ground. The same excitation voltage is applied as the reference input of a multiplying D/A converter or programmable attenuator 18 wherein the value, Vr, is attenuated to provide a value on lead 20 in accordance with digital attenuation inputs 21. In particular, the multiplying D/A comprises an R/2R circuit as hereinafter more fully described receiving a plurality of bindary, attenuation determining inputs which are supplied from successive approximation register 24.Register 24, which is also hereinafter more fully described, supplies successive binary digits in predetermined order, e. g. descending order, each digit bringing about a proportional degree of conversion in D/A converter 18.

The attenuated output from D/A converter 18 on lead 20 is compared in comparator 22 with the voltage on lead 25 connected to tap 26 between unknown impedance 14 and known impedance 16. Successive approximation register 24 provides output digits in predetermined order, e.g. starting with the most significant bit, and comparator 22 indicates whether the output voltage on lead 20 is greater than the voltage on lead 25. The first (most significant) bit in the output of register 24 is cleared if the voltage on lead 20 is higher. If, on the other hand, the voltage on lead 25 is higher, the most significant bit is retained as an input to D/A converter 18. In either case register 24 then supplies a next most significant bit output to D/A converter 18 and the sequence is repeated.The digital output 21 from successive approximation register 24 will finally select attenuation in D/A converter 18 causing the attenuated output 20 to correspond substantially to the voltage at tap 26. The digital output of register 24 becomes an accurate representation of the fraction of the excitation voltage which is present at tap 26, and hence an accurate measure of the unknown impedance.

Assuming the impedances are resistances, the conversion result, N, is expressed as follows: Vx/Vr=N/2' [1] or N=VX2n/Vr where n equals the resolution of D/A converter 18 expressed as an integer. The conversion result, N, is an integer value over the following range: O=Nt2n and by the nature of the network, Vx < Vr.

It will be seen from Fig. 1 that: Vx=VrRr/(Rx+ Rr) [2] By substituting equation 2 into equation [1], Rx=Rr((2"/N)- 1) 3 It will be noted the last expression for the value of Rx is independent of the reference voltage Vr. The only consideration for the reference voltage is that it should be large enough so as to reduce noise, offset and other non-ideal real world effects. At the same time, Vr should be small enough to avoid undesired conduction through pn junctions and the like connected to the resistance under test. In the particular embodiment, Vr is supplied from amplifier 12 and can vary between 40 mv and 10 v without effect on the system accuracy. The unknown value in equation [3] is in terms of N, which is the integer output of successive approximation register 24, and the value of the standard resistance Rr.

The result is obtained very rapidly, the successive approximation register 24 cycling through the number of clock cycles corresponding to its resolution which was 12 in the present example. The final resistance value is ratiometrically determined, i.e. in terms of the standard resistance rather than in terms of a voltage value and is quite accurate. Moreover, the circuit is economical and uncomplicated. Furthermore, the effect of scale compression is also achieved.

Observing the transfer function, equation [3], in considering the range of N, an asymptotic relationship is noted which has two boundary values. The first boundary value for N is 2"-1 and the second is 0. At the boundary regions there is an ascending range of component values compressed into a narrowing range of counts. By differentiating equation [3], we can provide an expression of the scaling as a function of N and the reference component: (d/dN) (Rx) = (d/dN) (Rr((2"/N)- 1) =-Rr(2) (N-2).

The percentage error as a function of the measured component and using a 12-bit implementation is plotted in Fig. 3 wherein Rx is an unknown resistance, Rr is a standard resistance, and the error of Rx is plotted logarithmically. The curve provides the single bit error as a function of the resistance at which it is taken. It is observed that for wide ranges of unknown resistances the error is less than one percent.

Referring further to Fig. 2, the circuit according to the present invention is illustrated in greater detail in particular regard to the successive approximation register 24 and D/A converter 18. A particular example of a successive approximation register is manufactured by Motorola and comprises a pair of such registers including a type MC 14559B register indicated at 32 and a type MC 145498 indicated at 34 in the drawing. The comparator 22 output is connected to the data inputs of each register, while the end-of-convert output of register 32 is connected to the start-convert input of register 34. The end-of-convert output of register 34 (not shown) is utilized in a well understood manner to indicate the successive approximation has been completed. The two registers are utilized together to provide a 12 bit output for successively operating switches 36 in D/A converter 18.

D/A converter 18 is suitably a type AD 7541 device manufactured by Analog Devices. It comprises a conventional R/2R network, as shown, wherein the series connection 38 of R values is coupled between node 10 and ground via a final 2R leg 40, while the 2R resistance legs 42 are respectively connected to the input of output amplifier 44 of the device by way of the respective switches 36. The switches 36 actually comprise CMOS switching circuits, included in the converter, which are respectively electronically closed by the binary digital outputs from successive approximation register 24. In the inactive state, the switches 36 are suitably connected to ground.

Reviewing the operation of the circuit, registers 32 and 34 operate to provide successive output starting on the highest order bit output on lead 46. Such an output closes switch 50 to connect resistor 42 to the input of amplifier 44, and if comparator 22 supplies a data input, D, indicating the voltage at tap 26 is higher than the voltage provided by amplifier 44, then the output bit on lead 46 is retained and the top switch 50 of switches 36 will remain closed. If, on the other hand, the reverse is true, then the output on lead 46 is dropped and switch 50 is opened. Next, the next most significant bit is asserted on lead 48 to close switch 52 whereby resistor 54 (supplying substantially half the current as would be supplied from resistor 50) now also supplies an input to amplifier 44.Again, if the voltage at tap 26 is higher than the output of amplifier 44, the output 48 remains on and switch 52 remains closed. Otherwise, the output on lead 48 is dropped and switch 52 is opened. The process proceeds in binary progression, through 12 binary output bits provided by successive approximation register 24 whereby the final digital outputs at 21 will represent the aforementioned value N from which the value of unknown resistance 14 is readily derived.

Measurement of capacitors can also use the above technique to produce highly accurate and fast results. In this case, measurement relies on charge distribution across a network consisting of an unknown capacitance Cx and a reference capacitance Cr. After both capacitors are discharged, both are charged until Vr reaches a predetermined value, and the charging process is stopped. Since both are charged with the same current for the same period of time, the voltage Vx at tap 26 in Fig. 1 will be: Vx=Vr( 1 /Cr)/( 1/Cr) + (1 /Cx)) By substituting equation [4] into equation [1], Cx=CrN/(2n-N). [5] Again, the value of the voltage or current by which the network is charged does not have any effect on the capacitance measurement.In addition, this technique eliminates the parasitic effects of line and switch impedances since no currents flow while measurement is in progress.

Measurement of inductors can be accomplished in a ratiometric fashion as well. A reference component of a known value Lr is placed in the position of Zr in the series network. By applying a voltage Vr to the series network, and taking a reading after some settling time, a ratio of the two components Lx and Lr can be derived.

Since V=L(di/dt) [6] Vr=(Lx+Lr) (di/dt) [7] and Vx=Lr(di/dt) 8 Substituting [7] and [8] into [1], N=(Lr) (di/dt) (2n) (1/(Lr+Lx) (di/dt))=(Lr) (2n) (1/(Lr+Lx)) or, Lx = Lr((2/N) -1) [9] The excitation voltage Vr is assumed to have no current limit for equation [9] to hold. That is, as long as the driving circuit can sustain sufficient di/dt, equation [9] will hold. In practice, however, the current limit of the voltage driver should be accounted for. Consider the following example for inductance measurement. Let the excitation voltage Vr=0.25v at a current limit of 15mA. Let L= lOmh (composite inductor Lx+Lr). Substituting these values into the equation [6] we obtain: di/dt=25 amp. per second.

With the above current limit considered: 25A/sec.=15mA/0.6ms. This means that a measurement should be performed within 0.6ms after application of the excitation voltage to the network.

While a preferred embodiment of the present invention has been shown and described, it will be apparent to those skilled in the art that many changes and modifications may be made without departing from the invention in its broader aspects. The appended claims are therefore intended to cover all such changes and modifications as fall within the true spirit and scope of the invention.

Claims (15)

1. The method of measuring the value of an impedance comprising: providing a first voltage, providing the product of said first voltage and a selected number, varying the value of said number by a series of steps, comparing a voltage corresponding to the drop across said impedance with said product and indicating when the last mentioned voltage and said product are in predetermined relation, and utilizing said number when said predetermined relation is achieved to indicate said impedance.

2. The method according to claim 1 including applying said first voltage to a circuit including said impedance in series with a further standard impedance for carrying a common current, said number being proportional to the ratio between the first mentioned impedance and said further standard impedance.

3. The method of measuring the value of an impedance, comprising: providing a first voltage, coupling said first voltage to said impedance, providing the product of said first voltage and a selected number, generating portions of said selected number by successive steps which progress value-wise from a first value to a last value, comparing the produce of said first voltage and said selected number at successive steps with said first voltage, and in response to predetermined comparison including portions of said number as an indication of said impedance.

4. The method according to claim 3 wherein said portions of said number comprise individual digits thereof.

5. The method for determining the value of a first impedance in proportion to the value of a standard impedance, comprising: applying a first voltage in circuit to said first impedance and standard impedance in series, variably attenuating said first voltage in accordance with a digital input value, generating said digital input value through successive approximation by providing digits of said digital input value in predetermined order, each digit representing a successive degree of attenuation, and comparing the variably attenuated first voltage with the voltage drop across said first impedance, and in response thereto causing the digital input value generation to include succes sive digits as fall within predetermined bounds of bringing the attenuated first voltage into equivalence with said voltage drop, said digital value representing said first impedance in proportion to said standard impedance.

6. The method of measuring the value of an impedance comprising: converting the digital output of a successive approximation register into an analog value, comparing said analog value with a voltage produced with respect to said impedance, changing the digital output of said successive approximation register until said analog value has a predetermined compared relation with said voltage produced with respect to said impedance, and employing said digital output as a measure of said impedance.

7. The method according to claim 6 including applying the same voltage source to provide a reference input to said successive approximation register and to provide a current through said impedance.

8. The method according to claim 7 including coupling a standard impedance in series with the first mentioned impedance to receive said current, said voltage produced with respect to said first mentioned impedance being derived at the interconnection between said impedances, said digital output being indicative of the value of said first mentioned impedance in proportion to the value of said standard impedance.

9. Apparatus for measuring the value of a first impedance, said apparatus comprising: means for providing a first voltage, means for coupling said first voltage in circuit with said first impedance, means for providing a product of said first voltage and a selected value, means for generating said selected value by successive digital steps, and comparing means for responding to the voltage across said first impedance in comparison with the product of said first voltage and said selected value at each step for determining whether a predetermined comparison is achieved for thereby including the digit for said step in a final digital value indicative of said first impedance.

10. An impedance measuring apparatus for determining the value of a first impedance in proportion to the value of a standard impedance, comprising: means providing a voltage reference, means coupling said first impedance and said standard impedance in series with said voltage reference, programmable attenuating means receiving said voltage reference as an input for attenuation, said programmable attenuating means having a plurality of attenuation determining inputs ranked in predetermined digital order, a successive approximation register adapted to provide a succession of digital outputs having successive values wherein said digital outputs are coupled to provide the attentuation determining inputs for said programmable attenuation means, and means for comparing the output of said programmable attenuating means with the voltage at the tap between said first impedance and said second impedance to supply a conversion determining input to said successive approximation register for bringing said voltage reference as attenuated into fixed relation with the voltage at said tap, the final digital output of said successive approximation register being indicative of the value of said first impedance in proportion to the value of said standard impedance.

11. The apparatus according to claim 1 wherein said programmable attenuating means comprises an R/2R network.

12. The apparatus according to claim 1 wherein the value of said first impedance, Zx, is related to said final digital output of said successive approximation register, N, and the value of said standard impedance, Zr, by the expression Zx=Zr((2/N)- 1).

13. A method or apparatus for measuring the value of an impedance, in which the impedance forms one arm of a bridge and the value of at least one other arm of the bridge is varied digitally until the bridge is substantially balanced, the digital value for such balance being used in determining the value of the impedance.

14. A method of measuring a impedence substantially as described in the description with reference to the drawings.

15. An apparatus for measuring an impedance substantially as described in the description with reference to the drawings.