GB2161281A - Communication indicator - Google Patents

Abstract

A light emitting diode D1 is configured, along with a microprocessor (U4) output port (DATA), to signal the existence of an outgoing message from the microprocessor. The light emitting diode is connected to the output port of the microprocessor in such a way that it will flicker, or blink, in synchronization with the data bits of a baseband data message. Visual observation will then indicate the presence of such a message and, also the actual baseband data message could be received by a photosensitive device and decoded without actual involvement with the power line system (32) on which the carrier signal is intended to travel. <IMAGE>

Description

SPECIFICATION Communication indicator The present invention relates generally to signal transmission devices and, more particularly, to a communications indicator that is used with an apparatus which transmits and receives a data signal on electrical power transmission lines.

Various known systems have been developed that enable electric utilities to communicate between a central location and a remote site at which electrical energy is being consumed. In a typical situation, an electric utility would transmit and/or receive signals between a central location and the locations of consumers' residences where electrical energy is being used. For example, individual residences can be provided with load management terminals that are able to control the use of electrical power within the residence. This type of system is useful in load shedding situations when, during peak periods of electrical demand, the electric utility can communicate signals to the individual residence load management terminals in order to interrupt the use of electricity for certain non-critical loads.These non-critical loads would typically be water heaters, air conditioners and other non-essential appliances that can be temporarily deprived of electricity without undue hardship to the consumer. This type of load management can be accomplished with one way devices located in each of the residences that are capable of only receiving signals. An example of a load management terminal is disclosed in U.S. Patent No. 4,402,059 which issued on August 30, 1983 and a particular demodulator which can be used in a load management terminal is disclosed in U.S. Patent No. 4,379,284 which issued on April 5, 1983 (corresponding EPC Publication 26624).

A further adaptation of this type of automated distribution system would incorporate devices within the consumer residences that are not only able to receive signals from a central location, but are also able to transmit signals back to a central communications unit. Two-way load management terminals significantly expand their capability by allowing the electrical meters, located in the residences, to be read automatically. Therefore, a two-way load management terminal could not only respond to commands that would indicate specific appliances to be shed during peak loading periods, but could also transmit information to the electric utility that would include electrical power usage, fault signals or other useful data.

One particular type of automated distribution system which is known to those skilled in the art uses a high frequency carrier signal to transmit information along electrical power lines. An automated distribution network communication system is disclosed in U.S. Patent No. 4,250,489, which issued on February 10, 1981, and a distribution network powerline communication system is disclosed in U.S. Patent No.

4,065,763, which issued on December 27, 1977. In one particular type of application, a high frequency carrier of approximately 12.5 kilohertz is modulated with a lower frequency base band data signal in order to encode and transmit digital information. Although various types of modulation techniques can be used, a typical method would be to utilize phase shift keyed (PSK) signals in which a phase shift would indicate a change from a binary one to a binary zero and vice versa. With this type of system, the resultant modulated message is then injected onto and transmitted along the electrical power lines. A demodulator that is particularly suited for application in coherent phase shift keyed (CPSK) communication systems is disclosed in the above-referenced U.S. Patent No. 4,379,284, (EPC Publication 26624).When received by a remote receiver, the modulated message is first demodulated and then translated by a microprocessor based system. A message that originates from a central utility location would typically contain commands that would instruct the remote load management terminals to either shed specific loads or report back with requested information. Conversely, messages that originate from two-way load management terminals could either transmit information related to electrical consumption or respond in some other way, based on a previously received command.

Each individual two-way load management terminal would typically include a microprocessor-based system that is capable of modulating and demodulating phase shift keyed messages. At the time of initial installation, and also when a problem is suspected it is useful to be able to determine whether or not messages are being received by a specific load management terminal or being transmitted by it.

Most load management terminals are provided with means to indicate various operating conditions.

For example, when it is initially installed, the microprocessor of a load management terminal is generally designed to perform a self-test procedure. Following this self test, a light emitting diode (LED) can be energized for a predetermined period of time to indicate that all of its systems are functioning properly.

Another possible indication would be the lighting or blinking of an LED to indicate the receipt of a valid message on the power line.

The chief object of the present invention is to provide a method for sensing digital data and a signal indicator apparatus which provides an indication of a baseband signal being sent to insure system integrity.

With this object in view, the invention resides in a method for sensing a digital signal passing through a conductor, comprising: electrically connecting a transistor input terminal to said conductor; grounding another terminal of said transistor; connecting a light emitting diode to a remaining terminal of said transistor, with said light emitting diode being energized from a source of power.

The invention further resides in a signal indicator apparatus, operating according to the above method, comprising a signal indicator apparatus, operating according to the method of claim 1, comprising: means for switching in response to a data signal; a light emitting diode operatively connected to said switching means and a power source in order to switch the power supplied to said light emitting diode.

The invention will become more readily apparent from the following exemplary description taken in connection with the accompanying drawings, wherein: Figure 1 is a schematic diagram of the present invention used in conjunction with a microprocessor and a transmitter; Figure 2 is a more detailed schematic diagram of the circuit of Figure 1; Figure 3 illustrates waveforms of typical carrier signals, baseband data signals and phase shift keyed signals that result from a baseband data signal being modulated with a carrier wave; and Figure 4 illustrates a schematic representation of the various communication software modules of a typical microprocessor- based two-way load management terminal.

The present disclosure is directed to a light emitting diode (LED) which is connected to the collector of a transistor. The base of the transistor is electrically connected to the output port of a microprocessor through which baseband data is sent. A power supply, such as 5 volts direct current source, is connected to the other terminal of the light emitting diode through a current limitting resistor and a baseband data output on the data line of the microprocessor would therefore cause the light emitting diode to blink, or flicker, as the alternating logic level ones and zeros are transmitted from the data output port of the microprocessor to the modulator. By visually observing the light emitting diode, the presence of this baseband data message can easily be determined.Since the existence of a light emitting diode generally has other functions in a load management terminal device, little or no additional hardware is required. Furthermore, since the light emitting diode will be blinking, or fluttering, in synchronization with the series of zeros and ones of the baseband data message, it could even be possible to actually read both the received and transmitted messages by placing a photodiode in photosignai communication with the light emitting diode and recording the baseband data message.

The present arrangement requires little or no additional hardware and provides a positive indication of the presence of a baseband data message being sent from or received by the microprocessor to the modulator of a load management terminal. Of course, it should be understood that, if the baseband data frequency is above the critical flicker fusion (CFF) rate for human visual perception, the blinking of the light emitting diode could usually appear only as a blur to the operator. However, it has been empirically determined that data rates in excess of 76 baud are well within the range for human perception of the intermittently blinking light emitting diode.The presence of this baseband data message, as described above, would not only indicate the occurrence of an attempted transmission by the microprocessor, but would also indicate the presence of a received message from a central station, or FCT, because most incoming messages of this kind include demands for a response from the load management terminal which would be indicated by the presence of an attempted transmission.

This apparatus can be applied in electrical communication with any data line which carries baseband data information. This baseband data information causes the light emitting diode (LED) of the present invention to flicker in synchronization with each of the data bits of the message which are equivalent to a logical one. The blinking of the light emitting diode is not only indicative of the presence of a digital message, but also permits the message to be received and decoded by another device which is connected in photosignal communication with the light emitting diode. This photosignal communication can be accomplished by using either a photo diode or a phototransistor disposed at such a location that it receives the light emanating from the light emitting diode.

Due to the operational procedure that is common in most automated distribution systems, a load management terminal would normally only transmit in response to a command that is received from a central station or from a field test device that is capable of injecting commands into the terminal. Therefore, the ability to indicate a transmitted message from a load management terminal could also serve to indicate the receipt of a modulated message from a central station. The light emitting diode could alternatively be operated by the microprocessor in such a way that it blinks in synchronization with the baseband data of all received messages as well as in synchronization with the baseband data of transmitted messages.An alternative embodiment could be therefore used to provide a means for other devices to simultaneously receive a message that is received by a primary load management terminal. This could be accomplished by connecting the other devices, in photosignal communication, with the light emitting diode of the primary load management terminal that is receiving the messages from the power line. When utilized in this way, the microprocessor-based system within the load management terminal would be programmed in such a way that, following the demodulation of the incoming signal, the baseband data would simultaneously be output to the system's modulator as the baseband data is being decoded by the microprocessor. Since the load management terminal would be in the received state at this time, no actual transmission of the modulated data would occur.

As the microprocessor demodulates the incoming message, it stores the baseband data for later decoding. After the baseband data message is decoded, the microprocessor determines if a response to the message is formulated and, if required, necessary information would be included within the formulated response data. The response message is then serialized and, after setting the load management terminal into a transmit mode, the response message is output to the modulator for injection onto the power line.

As the message is being demodulated, prior to the load management terminal being set into a transmit mode, the demodulated baseband data can simultaneously be output to the modulator as the microprocessor is decoding the incoming message and determining the response message.

In the short period of time between the reception of a modulated signal by the demodulator and the actual transmission of a response message to the modulator, the incoming signal is sent to the modulator as it is demodulated. Therefore, the light emitting diode would respond to this incoming message as if it was an outgoing message being sent by the load management terminal. Although not formulated or serialized by the transmission software of the microprocessor, the baseband data of the received signal would pass to the modulator as if it was actually a transmitted message. In accordance with this alternative arrangement, the light emitting diode would blink in synchronization with either received or transmitted messages.Therefore, a diagnostic means for indicating a transmission from a load management terminal would also be beneficial in diagnosing the proper functioning of the terminal's receiver. An observer, such as an installer or technician, standing adjacent to a load management terminal, could thus visually observe the transmission indicator during initial installation or when a potential problem is suspected. If a reception problem is believed to exist, a message could be transmitted from the central station or a field configuration terminal (FCT) to the address of the particular load management terminal in question and the transmitted message could be one that demands a response.By observing the LED indicator of the load management terminal, an operator, upon seeing the transmission indication, could visually observe that the message was received by the load management terminal because a message is being transmitted in response to it. On the other hand, if there is reason to suspect that the load management terminal is not properly transmitting messages, the operator could cause a message to be transmitted to the terminal and, subsequently, watch for a transmission indication.

It should be understood that, when a load management terminal is not effectively injecting a carrier signal into a transmission line, various failures could be the cause of this malfunction. For example, the microprocessor of the load management terminal could be faulty. Alternatively, the receiver portion of the load management terminal could have a fault that prevents the microprocessor from properly receiving commands from the central station. These types of faults would essentially be the reason for an absence of any signal being sent from the microprocessor. On the other hand, even if the microprocessor is operating properly and receiving signals from the central station, various portions of its transmitter circuit could result in the inability to provide sufficient transmission power to inject the modulated signal onto the power line.Of course, a precise determination of the problem could require a series of sequential diagnostic steps by an operator.

Regardless of the actual cause of a failure to transmit properly, it would be very benefitial if the operator had a means for quickly and simply determining whether or not the load management terminal is attempting to transmit a message. The present communications indicator that is extremely helpful in this determination. It permits an operator to visually observe the load management terminal and quickly determine if the microprocessor of the load management terminal is receiving or attempting to transmit a message. Furthermore, this communications indicator is extremely simple in its construction and requires little or no additional hardware beyond that which is normally provided with load management terminal systems.Also, since this communications indicator reacts directly to the existence of a baseband data message, little or no additional software is required to provide the visual indication of the microprocessor's attempt to transmit a message.

In operation, a load management terminal transmits a message by having its microprocessor output a series of baseband data bits that are eventually modulated with a carrier signal which, in a typical application, would consist of 12.5 kilohertz square wave. If an indication could be provided that the baseband signal has been sent from the microprocessor, all of the components of the load management terminal which functionally precede this baseband data output could then be determined to be operating properly.

If a proper transmission is not accomplished, but a baseband signal is being transmitted from the microprocessor, the problem could be isolated to those components which are involved functionally beyond the baseband data output. This situation would typically indicate a problem during modulation with the carrier signal or the transmitter itself.

Figure 1 illustrates a simplified schematic of the transmission portion of the load management termi nal The load management terminal incorporates a microprocessor U4. In a preferred embodiment of the present invention, microprocessor U4 is type MC6801U4 which is available from the Motorola Corporation. This particular type of micro-computer is an 8-bit single-chip microcomputer unit which enhances the capabilities of the MC6801 microprocessor and significantly enhances the capabilities of the MC6800 family of components. It includes an MC6801 microprocessor unit with direct object-code compatibility and upward object- code compatibility with the MC6800. Execution times of key instructions have been improved over the MC6800 and the new instructions found on the MC6801 are included.It can function as a monolithic microcomputer or can be expanded to 64K byte address base. It is TTL compatible and requires a single five volt power supply. On the chip of this microcomputer, 4096 bytes of ROM, 192 of RAM, a serial communications interface, parallel I/O and a 16 bit 6-function programmable timer are provided. Two of the ports of the microprocessor U4 are illustrated in Figure 1 as the DATA port and the Rx/ Tx port. During a typical transmission of a message from the microprocessor U4, a baseband data signal would be output from the DATA port of the microprocessor, along line 12, to the modulator 14. The other input of the modulator 14 would be connected, by line 16, to a carrier generator 18. The carrier generator 18 provides a carrier signal, on line 16, which is a high frequency square wave, such as 12.5 kilohertz.

The modulator 14, which is functionally an exclusive-OR (EOR) gate, would modulate the carrier signal of 12,5 kilohertz with the baseband data signal of 76 band, for example and the resultant modulated signal would be output from the modulator 14 on line 20.

Referring temporarily to Figure 3, the various signals used by a load management terminal transmission system are indicated as waveforms A, B and C. Comparing Figures 1 and 3 together, the carrier signal 22 which is illustrated as waveform A, would be output by the carrier generator 18, on line 16, and received as one of the two inputs of the modulator 14. The baseband data signal 24, which is illustrated as waveform B in Figure 3, would be transmitted from the DATA port of the microprocessor U4, on line 12, to the other input of the modulator 14. These two signals are combined by the EOR gate of the modulator 14 and its resultant signal 26, which would appear on the output'line 20 of the modulator 14, is illustrated as waveform C in Figure 3.

As can be seen in Figure 3, changes of the status of the baseband data signal 24 are reflected as changes in phase in the resultant signal 26. Since waveforms A and B are combined by an EOR gate, the resultant signal 26 is a Boolean result of the EOR operation by the modulator 14. As can be seen by viewing waveforms A, B and C togetrher, when waveforms A and B are combined by an exclusive-OR operation, the resulting waveform C appears as a carrier wave, but with consecutive pulses of identical logic levels indicating changes in the logic level of the baseband carrier signal (waveform B). More specifically, when the logic level of waveform B changes from a zero to a one, two consecutive logic level zeros can be observed in the modulated combination, or waveform C.Also, when the logic level of the baseband data message (waveform B) changes from a one to a zero, two consecutive logic level ones can be observed in the modulated signal (waveform C). It should be understood that, in Figure 3, waveforms A, B, and C are drawn for illustrative purposes only. Since the carrier frequency of waveform A is significantly higher than the frequency of baseband data message (waveform B) shown in Figure 3 and since these two frequencies are not necessarily an integral multiple of one another, changes in state of waveform B may not exactly coincide with changes in state of the carrier frequency of waveform A. However, this characteristic does not present probiems and does not directly relate to the present invention.

Referring again to Figure 1, it can be seen that, on line 16, a constant frequency carrier signal 22 is sent from the carrier generator 18 and received as one of two inputs of the modulator 14. Also, it can be seen that the baseband data signal 24 is output from the DATA port of the microprocessor U4, on line 12, to the other of the two inputs of the modulator 14. The combination of these two signals, by an EOR process, results in a phase shift keyed (PSK) modulated signal appearing on line 20 as the output of the modulator 14.

The Rx/Tx output port of the microprocessor U4 is capable of sending a signal, on line 28, to an AND gate 30. As shown in Figure 1, the function of this signal on line 28 is to, essentially, "turn on" or "turn off" the message output process from the microprocessor U4 to the transmitter 32. Since the preferred embodiment of the present invention utilizes a logic low signal for Tx, the input signal of line 28 is inverted at the input of the AND gate 30 as shown in Figure 1. When this occurs, a logical high signal is transmitted from the AND gate 30, on line 34, to the transmitter 32. Therefore, as long as the signal, on line 28, from the Rx/Tx output port of the microprocessor U4 is high, no message will be output to the transmitter 32.Conversely, if the signal on line 28 is low, signal pulses will be output from the AND gate 30 each time a logic level high pulse is output from the modulator 14 on line 20. Of course, it should be understood that the transmitter 32 would be operatively connected to a transmission line in order to inject the resultant signal, received from the microprocessor U4, as a phase shift keyed carrier signal that would be received by a central station or a repeater device.

The transmission indicator of the present invention is also shown in Figure 1. It comprises a light emitting diode (LED) D1 that is operatively connected to the output line 12 which is connected to the DATA output port of the microprocessor U4. In order to provide sufficient power to energize the LED D1, a transistor T1 is connected between the LED D1 and ground potential. The collector of the transistor T1 is connected to the cathode of the light emitting diode D1 and the emitter of the transistor T1 is connected to ground potential.The anode of the light emitting diode D1 is electrically connected to one terminal of a current limitting resistor R2 with the other terminal of the resistor R2 being connected to a voltage source. The base of the transistor Ti is electrically connected to output line 12 with a resistor R1 electrically connected therebetween.

As can be seen from the schematic diagram of Figure 1, logical high signals from the microprocessor U4, on line 12, will cause a current to flow through the light emitting diode D1. Therefore, an intermittent signal on line 12 will cause a corresponding intermittent blinking, or flashing, of the light emitting diode D1. As the baseband data (waveform B of Figure 3) is transmitted from the DATA port of the microprocessor U4, corresponding blinks of the light emitting diode D1 will indicate the existence of this attempted transmission. A preferred embodiment of the present invention would utilize a light emitting diode D1 such as one of the type described by part No. HLMP-3300 solid state lamps manufactured by the Hewlett Packard Company. These lamps are Gallium Arsenide Phosphide on gallium phosphide diodes which emit a red light This type of light emitting diode exhibits a peak wavelength of approxi mately 635 nm with a dominant wavelength of approximately 626 nm. More significantly, a light emitting diode of this type has a speed of response of approximately 90 nanoseconds. The speed of response of this type of light emitting diode permits it to easily indicate changes in the logic level of the baseband data message. Since this response time is so small compared to the period of a baseband data bit, changes in logic level between consecutive high and low baseband data bits will be clearly distinguishable from one another.The presence of this baseband data signal, that is indicated by the flashing light emitting diode D1, would therefore visually indicate to an operator that the components, which functionally precede the modulator 14, are operating properly. If an overall transmission problem does actually exist, the operator would then be able to confidently pursue the problem by examining the components of the load management terminal which occur functionally after the light emitting diode D1.

An alternative way of utilizing the present invention would comprise the pacing of a photodiode, or other light sensitive device, proximate the light emitting diode D1. Since the flickering, or blinking, of the light emitting diode D1 would correspond exactly with the logical bits of the baseband data message (waveform B of Figure 3), the photodiode could actually receive and, with appropriate associated equipment, store and decode the transmitted message in order to check the proper operation of the load management terminal. Another alternative embodiment of the present invention would incorporate the minor software change that would send the demodulated incoming messages to the data output port of the microprocessor U4. As will be described in greater detail below, this alternative embodiment would be operatively associated with the demodulator.As the incoming message is demodulated, the resulting baseband data bits would be instantaneously sent from the data port of the microprocessor U4, on line 12, to the modulator 14. This operation would occur simultaneously with the decoding and interpretation of the incoming message by the microprocessor U4. Since this operation would occur while the load management terminal is in the receiving mode, no signals would be output by the AND gate 30 since the Rx/Tx signal, on line 28 would be set to the receive mode. However, even though the modulated message would be prevented from being sent, on line 34, to the transmitter 32, the baseband data signals would pass on line 12 and would, therefore, cause the light emitting diode D1 to flicker in response to the data bits of the baseband message.Therefore, with the same configuration illustrated in Figure 1, the baseband data signals of an incoming message can be indicated by the present invention. Therefore, as a message is received by the microprocessor, the light emitting diode would blink in synchronization with the bits of the incoming digital signal. This blinking of the light emitting diode would not only indicate the presence of an incoming message, but would also permit an associated device to receive and store the incoming message. This could easily be accomplished by providing the associated device with a photosensitive component, such as a photodiode or phototransistor, that would be disposed in photosignal communication with the associated device.By providing a transistor T1 and light emitting diode D1 in signal communication with a data output line of the microprocessor, the blinking light emitting diode could either be visually observed or used to communicate the actual baseband data of the incoming signal to another piece of equipment.

Referring again to Figure 3, it should be understood that the waveforms A, B and C, are not drawn with identical scaling. For purposes of clarity, waveform B has been drawn so that the time of its period P2 has been considerably shortened. In order to more fully describe the relative frequencies and periods of the waveforms of Figure 3, it should be understood that period P1 of waveform A would be approximately 80 microseconds when the carrier signal 22 has a frequency of 12.5 kilohertz. A typical baseband data signal, as illustrated by waveform B, would comprise a plurality of bits which have a duration of approximately 13.120 milliseconds. Therefore, if waveforms A and B were drawn to the same scale in Figure 3, the period of time P2 would be approximately 164 times as large as the period P1 of waveform A.

Although the relative scaling of the waveforms of Figure 3, as discussed above, have been changed for purposes of illustration, it should be understood that the particularly frequencies and periods of these waveforms could be different values for alternative embodiments of the present invention. The preferred embodiment discussed herein utilizes the combination of a carrier signal of 12.5 kilohertz with a baseband data signal of 76.2195 baud.

It should also be understood that waveform B of Figure 3 represents a series of zeros and ones that would represent a typical baseband data signal message. The particular pattern illustrated in Figure 3 shows the waveform B as comprising a segment of a baseband data signal that would represent an exemplary portion of such a signal. The particular portion illustrated as waveform B in Figure 3 would contain the series of bits that would be decoded as: 010110101. Based on the particular coding scheme used and the specific message being transmitted, it should be understood that the patterns of zeros and ones could vary significantly over time. Virtually any combination of zeros and ones is foreseeable under most message coding schemes.Occasionally, message portions would contain alternating single zeros and ones, but this type of uniform pattern over a prolonged prolonged period of time would naturally be very unlikely in a transmitted message. More commonly, consecutive zeros and ones of varying durations would appear throughout the message pattern. It should be apparent that, for a human eye to adequately respond to the changes in light status of the light emitting diode, the frequency of change must be below a certain threshold value. A worse case situation would be a baseband signal that comprised an alternating series of individual zeros and ones (e.g. 01010101010101 etc.) However, it has been empirically deter mined that typical baseband data signals contain patterns of zeros and ones that, when associated with the light emitting diode of the present invention, are easily detected visually.Therefore, if a message is being transmitted by the microprocessor (reference numeral U4 in Figure 1) to the demodulator (reference numeral 14 in Figure 1), it is readily discernible by an operator's vtsual observation of the light emitting diode (reference numeral D1 in Figure 1). It should further be understood that, since the flickering or blinking of the light emitting diode is in synchronization with the series of zeros and ones of the baseband data message, a photodiode, or similar photosensitive device, could be placed proximate the light emitting diode and, using appropriate apparatus, the baseband data message could be stored and decoded.

Referring to Figure 2, the schematic illustrates a more detailed diagram of the present invention as it would appear in a preferred embodiment. Common components that are illustrated in both Figures 1 and 2 have been labelled with identical reference numerals.

The microprocessor U4 is capable of outputting, on line 12, to a centralized communication station that is located remotely with respect to the transmitter apparatus illustrated in Figure 2. The microprocessor U4 is also capable of sending a signal, on line 28, that represents a transmit signal.

Two non-volatile random access memory devices or NOVRAMs, U2 and U3, are associated with the microprocessor U4 in order to provide non-volatile storage capability. The semiconductor chip U7 comprises four NAND gates as shown in Figure 2. One of its functions is to combine the 1 MHz signal, on line 50, with the IOS output from the microprocessor U4 to form a chip select signal CS that is received by the non-volatile memory (NOVRAM), U2 and U3. When the chip select signal CS is enabled, the memory responds to signals from readlwrite R/W and the address that is decoded on line AO-A7. Data is then read from or written into the non- volatile memories, U2 and U3. PWFA senses a power fail condition.

This logical low signal warns the microprocessor, via the IRQ interrupt signal to immediately stop normal operation and rapidly prepare itself for an imminent loss of power. Typically, the microprocessor U4 would have approximately 3 milliseconds to perform these functions between the occurrence of the IRQ signal and a loss of power. At the end of the power fail delay period, the reset R is also placed in a logically low condition. This causes a memory STORE signal. When power is returned, the memory recalls the stored data when the power fail line PWFA is again returned to a logically high condition. The combination of R6 and C1 provides a small RECALL time delay during both power-fail and power-up procedures.

Also associated with the microprocessor U4 is a high frequency crystal Y1 which, in the preferred embodiment of the present invention, is capable of providing a 4.0 megahertz signal. The crystal oscillator Y1 is cooperatively associated with capacitors C17 and C18 as shown. The 4.0 megahertz signal is transformed into a 1 megahertz signal by the microprocessor U4 and is then sent on line 50, to a programmable divider 52.

The programmable divider 52 is contained on a semi-custom solid state chip U5. Although many components are contained on the semi- custom CMOS chip U5, only those components which are relevant to the present invention are illustrated in Figure 2. By appropriately grounding pins W1, W2 and W3, one of eight predetermined precise frequencies, which are less than 1 megahertz, can be chosen as the basic carrier frequency for the transmitting device comprising the present invention. In a preferred embodiment of the present invention, frequencies of approximately 7.35 kHz, 7.81 kHz, 8.33 kHz, 8.9 kHz, 9.6 kHz, 10.4 kHz, 12.5 kHz and 13.8 kHz can be selected by approximately grounding the desired combination of W1, W2 and W3 to determine a preselected binary value from zero to seven.As discussed above, a preferred embodiment of the present invention would utilize a 12.5 kHz carrier signal with which the base band data signal would be modulated. The carrier signal would be sent from the programmable divider 52, along line 16, to the modulator 14 which is also included in the semi-custom CMOS chip U5.

The modulated signal, which is output from the modulator 14 on line 20, is then amplified by an amplifier 62 and sent to the AND gate 30. If a modulated signal is received by the AND gate 30 simultaneously with a transmit signal on line 28, the modulated data is permitted to be output on line 34 to a transmitter 32. The actual transmission of the carrier signal would be provided by the transmitter 32 which is configured to inject the signal onto a conventional power line system. Although many types of transmitters, which are capable of injecting a carrier signal onto a power line, are known to those skilled in the art, a particular apparatus for both transmitting and receiving a power line signal is disclosed in U.S. Patent Application Serial No. 575,125 (W.E. Case No. 50,937) which was filed on January 30, 1984 and assigned to the assignee of the present application.

The novel features of the present invention relate particularly to the NPN transistor T1, the light emitting diode D1 and the resistors, R1 and R2. The transistor T1 is configured with its emitter grounded and its collector connected to the cathode of a light emitting diode D1. The anode of the light emitting diode D1 is connected to one terminal of a resistor R2 whose other terminal is connected to a +5 volt direct current power supply. The base of the transistor T1 is connected, through a resistor R1, to the data output port of the microprocessor U4. As shown in Figure 2, one terminal of the resistor R1 is connected to line 12 and the other terminal of the resistor R1 is connected to the base of the transistor Ti. As baseband data signal bits are output from the DATA port of the microprocessor U4 to the modulator 14, these data bits will also pass to the base of the transistor T1. As shown in Figure 2, this base current will cause a current to flow from the power supply through the light emitting diode D1 in synchronization with the data bits of the baseband data message that are received at the base of the transistor T1.

As can be sen in Figure 2, the pulses which are part of the baseband data message (reference numeral 24 of Figure 3) being transmitted from the DATA port of the microprocessor U4, on line 12, will therefore cause the light emitting diode D1 to flicker, or blink, in exact synchronization with the logic levels of the message bits. Although the baseband data can actually be received and stored by any apparatus which is photosensitive and capable of storing and decoding a message, the primary function of the present invention is to visually indicate the existence of an outgoing message from the microprocessor U4. By visual inspection of the light emitting diode D1, an operator can readily determine, by the mere existence of a flickering light, that the microprocessor U4 is sending a baseband data message from its DATA port, on line 12, to the modulator 14.

The capability of visually determining that a message is being sent from the microprocessor 14 significantly simplifies the initial installation and check out of the transmission apparatus illustrated in Figure 2 and also aids in identifying possible causes of any failure to properly transmit a signal on the power line system. For example, if a transmitted signal is expected to be received from the device illustrated in Figure 2 and that signal is not received by some remote receiver on the power line, an operator can demand a transmission by the microprocessor U4 and then visually observe the light emitting diode D1. If the light emitting diode D1 is not subsequently energized, it can safely be presumed that the problem exist functionally prior to the data output port of the microprocessor U4.Conversely, if a flickering of the light emitting diode D1 is observed, the problem can be isolated to those components which are functionally beyond the data output port of the microprocessor U4. Upon initial installation, the flickering of the light emitting diode D1 will generally indicate a proper operating status of the transmitting apparatus illustrated in Figure 2.

The present invention provides an effective means for determining the existence of a message being output by a microprocessor. Furthermore, the need for expensive additional components is avoided since load management terminals, such as that illustrated in Figure 2, typically incorporate light emitting diodes. Normally, these light emitting diodes are used to signal to the operator to indicate the system's operating status. In many applications, a periodic blinking of a light emitting diode is used to indicate the proper operation of the circuits. For example, one possible indication could be the blinking of the light emitting diode three consecutive times to indicate the proper results of local logic self tests or blinking the light emitting diode five consecutive times to indicate improper operation of the circuits.Some load management terminals have been configured to energize a light emitting diode continuously for a predetermined length of time, for example 64 minutes, following each reception of a carrier based signals an indication of its ability to receive. Various codes of either intermittent or steady energization of a light emitting diode are used to indicate either proper or improper function of some portion of the terminal.

The present invention is an improvement on that type of system since it actually flickers in synchronization with the actual message that is being output by the microprocessor U4 as an indication of its ability to receive, decode and respond to messages uniquely directed to it. A significant advantage of the present invention is that it does not require any additional software to generate the flicker of the light emitting diode. It merely utilizes the logic levels of the actual baseband data signal to provide a base current of a transistor which then amplifies this signal for use by the light emitting diode.

The alternative embodiment of the present invention which was described above, is illustrated in Figure 4. Figure 4 represents a schematic diagram of the logic modules within the microprocessor (reference U4 in Figure 1). As indicated by block F1, the demodulator demodulates the incoming message in order to separate the baseband data from the carrier signal. The demodulator receives the modulated message from the receiver, as indicated. Prior to receipt by the demodulator, the receiver hardware performs a hard limiting operation on the signal and the received signal is passed through a high-pass filter in order to remove lower frequencies such as the 60 Hz power line frequency. After the incoming signal is demodulated, the baseband data portion of that signal is passed to decoding software, indicated by block F2.

Viewing Figures 3 and 4 together, the data passing between blocks F1 and F2 is represented by waveform B. The function of decoding software is to translate the baseband data signal into predetermined command codes. It should be understood that the precise coding scheme can vary from application to application and is not directly related to the operation of the present invention.

After the message is decoded, as indicated by block F2, the microprocessor recognizes the specific commands contained in the incoming message and prepares to respond to them. This is indicated by block F3 in Figure 4. The actual commands contained in the incoming message can vary significantly. For example, these commands may request meter reading data, a status check, a load shedding schedule or any other appropriate commands that can normally be sent from a central communication station to the remote load management terminals. Once the commands are determined by the microprocessor, a response is formulated, if required, as indicated by block F4, and the formulated output message is encoded, as indicated by block F5.

After the response message is encoded, it must be specialized in preparation for output to the modulator (reference numeral 14 in Figure 1). The serialization is performed, as indicated by block F6, and, after the Rx/Tx signal is set for transmit and sent to the AND gate (reference numeral 30 in Figure 1), the serialized message is output to the modulator (reference numeral 14 in Figure 1).

The setting of the RxiTx signal to Tx is indicated by block F7 and the output to the modulator is repre sented by block F8 in Figure 4.

It should be understood that it takes a finite amount of time to decode the incoming message, determine the required response, formulate the response message, encode the outgoing message and serialize it. During this period of time, as the functions indicated by blocks F2-F6 are accomplished Rx/Tx signal is in the receive mode. Therefore, any baseband data messages that are output to the modulator (reference numeral 14 in Figure 1) would not be transferred to the transmitter (reference numeral 32 in Figure 1) because they would be blocked by the AND gate (reference numeral 30 in Figure 1) because of the status of the Rx,Tx signal on line 28 of Figure 1.Furthermore, it should be understood that the decoding of the incoming message, which is indicated by block F2 in Figure 4, can not be completed until the entire incoming message is demodulated and various check signals are determined to be proper. The decoding operation is performed on a field basis as the incoming message is demodulated. Furthermore, until the entire message is decoded, the required response cannot be determined and the output message cannot be formulated, encoded or serialized. Therefore, the operations indicated by blocks F2-F6 are generally serial in nature and require a finite period of time. The finite period of time results in a time delay between the demodulation of the incoming message F1 and the setting Rx/Tx to the transmit mode F7.Simultaneous with the receipt of an incoming message, that message is demodulated bit-by-bit by the demodulator as indicated by block F1. As the demodulated message is stored in preparation for the decoding operation, it is simultaneously sent to the modulator (reference numeral 14 in Figure 1). This operation is indicated by block F9. The message which is sent to the modulator, by block F9, consists of the baseband data message recently demodulated from the incoming signal. Therefore, the time period between the demodulation of the incoming message and the sending of the baseband data to the demodulator is extremely small. It occurs almost simultaneously with the demodulation of the signal and is completed at approximately the same time that the decoding operation, indicated by block F2, begins.

Therefore, it should be understood that the operations indicated by block F9 occur when the Rx/Tx signal is in the receive mode and before the decoding determining, formulating, encoding and serializing operations are completed.

Since the Rx/Tx signal is in the receive mode, any baseband data that is transmitted to the modulator (reference numeral 14 in Figure 1) will be prevented from reaching the transmitter (reference numeral 32 in Figure 1) due to the fact that the AND gate (reference numeral 30 in Figure 1) is blocking it.

Referring again to Figure 1, it should be understood that, since the load management terminal is in the receive mode, the output of a baseband data message on line 12 to the modulator 14 will have essentially no effect other than to cause the light emitting diode D1 to flicker in response to its data bits. The transmitter 32 will be unaffected because of the blocking nature of the AND gate 30 in response to the Rx/Tx signal on line 28. Furthermore, since the baseband data of the incoming signal is sent directly to the modulator 14, on line 12, the flickering of the LED D1 will represent the incoming baseband data.

Therefore, it can be seen that an incoming message can be visually observed by an operator and, with appropriate associated hardware, can be stored and decoded.

In the preferred embodiment of the present invention and in the alternative embodiment of the present invention, both transmitted and received messages can be visually indicated. The same transistor T1 and light emitting diode D1, along with their associated resistors and power supply, provide this visual indication of received and transmitted messages with little or no additional hardware being required.

In order to more completely describe the present invention, the particular components used in the preferred embodiment of the present invention are shown in Table 1 below.

TABLE 1 Reference numeral Type or Value U2 X2212DI (256x4) (X1COR) U3 X2212DI (256x4) (X1COR) U4 6801 microprocessor U5 semi-custom CMOS U7 74HC03 R1 10KQ R2 680Q R6 68KQ C1 ;i;f C17 39pf C18 39pf C21 D1 HLMP-3300 D2 1N4148 D3 1 N4148 T1 2N2222 Y1 4.0 MHz Athough the present invention has been described in significant detail in both the above discussion and the Figures, it should be understood that it can be used in conjunction with other apparatus. Its application is limited only to the requirement that an associated component, such as a load management terminal's microprocessor, must be capable of outputting a digital message. An additional advantage of the present invention is that, besides reflecting the actual data output of a message, the light emitting diode can be utilized to indicate other statuses by merely configuring the microprocessor to output an appropriate predetermined sequence of ones and zeros to cause the light emitting diode to flash a signal pattern.

Claims (8)

1. A method for sensing a digital signal passing through a conductor, comprising: electrically connecting a transistor input terminal to said conductor; grounding another terminal of said transistor; connecting a light emitting diode to a remaining terminal of said transistor, with said light emitting diode being energized from a source of power.

2. The method as claimed in claim 1, further comprising: connecting a first resistor electrically in series between the base terminal of said transistor and said conductor which serves as the input terminal; connecting a second resistor electrically in series between the anode of said light emitting diode and said power source, and the emitter terminal of said transistor is grounded.

3. A signal indicator apparatus, operating according to the method of claim 1, comprising: means for switching in response to a data signal; a light emitting diode operatively connected to said switching means and power source in order to toggle said light emitting diode.

4. The apparatus as claimed in claim 3, wherein said data signal is provided by a generating means including a microprocessor having an output signal port.

5. The apparatus as claimed in claim 4 wherein the light emitting diode indicates the output of data bits from said output signal port responsive to the logic level of said data bits.

6. The apparatus as claimed in any one of claims 3, 4 or 5, wherein said switching means includes a transistor having an emitter connected to ground, a collector connected in electrical communication with the cathode of said light emitting diode and a base connected in electrical communication with said generating means.

7. The apparatus as claimed in any one of claims 3 to 6 wherein: said transistor is an NPN-type transistor.

8. A signal generating apparatus, comprising: a microprocessor having a data output port, said microprocessor being associated with a transmitter for the injection of carrier based signals onto an electrical transmission line; a transition connected to said microprocessor with the input terminal of said transistor being in electrical communication with said data output port; and a light emitting diode having its cathode connected in electrical communication with another terminal of said transistor.