GB2105937A - Function generator - Google Patents

Abstract

A function generator for producing triangle waveforms is provided with digital control circuits to permit waveform symmetry to be controllable without affecting waveform signal frequency. A microprocessor 50 calculates the currents IU, ID required to alternately charge and discharge a capacitor 16 to produce the desired waveform, and controls such currents by applying digital control data to appropriate current generators via digital-to-analogue converters 52 and 54. The sum <IMAGE> is maintained constant. <IMAGE>

Description

SPECIFICATION Function generator with independently controllable symmetry and frequency The present invention relates generally to function generators, and more particularly to a circuit for generating a triangular waveform with controllable symmetry.

Function generators are well known in the art and are used extensively for generating triangle waveforms of controllable frequencies to be converted into different waveforms, for example, square-wave, sinusoidal, etc., for test and measurement purposes. A problem associated with such prior art function generators is that as the waveform symmetry is changed, the output frequency also varies. Accordingly, such function generator require a great deal of adjustment because an interaction exists between the frequency and symmetry controls. In instances where it is desired to quickly produce an output signal of predetermined frequency and symmetry (or dutyfactor), it is difficultto attain the desired signal characteristics.

In accordance with the present invention, a function generator is provided in which the symmetry and frequency are controllable independently of each other and without any interaction therebetween. A pair of current generators are provided for charging and discharging a capacitor to generate a triangle voltage. A pair of digital-to-analog converters with controllable reference voltage is provided to control the current generators. Control means provide appropriate digital data to the two digitalto-analog converters to permit varying the symmetry while maintaining the frequency characteristic constant. The net result is that frequency and symmetry of the output triangle waveform can be controlled independently without causing interaction between the two controls.

It is therefore one object of the present invention to provide an improved function generator having independently controllable frequency and symmetry characertistics.

It is another object of the present invention to provide a digitally controlled function generator.

Other objects and attainments of the present invention will become appa rent to those having ordinary skill in the ert upon a reading of the following description when taken in conjunction with the accompanying drawings.

FIG. lisa block diagram of a conventional function generator; FIG. 2 is a circuit diagram showing details of a function generator of the prior art; FIG. 3 is an amplitude-versus-time graph showing characteristics oftriangularwaveforms; FIG. 4 is a simplified block diagram of a function generator in accordance with the present invention; FIGS. 5A and 5B are circuit diagrams of the upper and lower current generating portions, respectively, of a function generator in accordance with the present invention; and FIG. 6 shows the details of a digital-to-analog converter used in the present invention.

Turning now to the drawings, there is shown in FIG. 1 a block diagram of a conventional function generator for generating a triangle waveform. It is believed that a discussion of such prior art function generators is warranted to provide an understanding ofthe present invention. The output currents lu and lfrom a current source 10 and a current sink 12 are alternately routed to capacitor 16through a steering switch 14 under control of switch control circuit 20.

The voltage across capacitor 16 is derived from output terminal 22 via buffer amplifier 18. The output signal from buffer amplifier 18 is also applied to switch control circuit 20.

The circuit operates as follows. Assuming that steering switch 14 is initially in its upper position to supply the current l to linearly charge capacitor 16, a positive-going excursion of the triangle voltage waveform is made. When the voltage across capacitor 16 reaches an uppervoltagethreshold level Vu, switch control circuit 20 connects steering switch 14to the lower position, thereby causing the current 1D to flow, from capacitor 16 thereby to result in a linear negative excursion of the triangle signal.

The above operation repeats when the triangle signal reaches a lower threshold level VL.

FIG. 2 is a detailed circuit schematic of a conventional function generator. Current source 10' consists of a pair of transistors 24 and 26, the bases of both of which are connected to the output of operational amplifier 28. The emitters of transistors 24 and 26 are connected respectively th rough resistors 34 and 36 to opposite ends of potentiometer 32, the slider of which is connected to a positive voltage source. Operational amplifier 28 operates to compare the emitter voltage of transistor 26 connected to the inverting input terminal of operational amplifier 28 with the controllable reference voltage derived from potentiometer 30 and applied to the noninverting inputterminal of operational amplifier 28.

The collector current of transistor 24 represents the charging current lu in FIG. 1 while the collector current of transistor 26 is used to drive current mirror circuit 12' for generating discharging current ID. Current mirror circuit 12' consists of three transistors 38, 40, and 42 and two resistors 44 and 46. The collector-emitter junction of transistor 42 and resistor 46 are connected in series between the collector of transistor 26 and a negative voltage source. The collector current of transistor 38 represents the discharging current I,. Steering switch 14 consists of a diode bridge including four diodes a through d.

In operation, transistors 24 and 26 conduct equally when the slider of potentiometer 32 is adjusted to its midpoint. By choosing identical resistance for resistors 44 and 46, the collector current of transistor 26 is accurately reproduced from that at the collector of transistor 38. Therefore, lu is equal to 1D in this condition. When the input voltage on input terminal 23 is relatively high, diodes a and d are conducting and the other diodes b and care non-conducting. The charging current lu is, therefore, supplied to capacitor 16 while the discharging current 1D is diverted to input terminal 23.As described hereinbefore with reference to FIG. 1, the positive excursion of the triangle waveform continues (see time t - t2 in FIG. 3) until the voltage reaches Vu at time t at which point steering switch 14 is reversed by decreasing the input voltage to the relatively low level. Diodes b and c become conducting while diodes a and d nonconducting, thereby generating the negative excursion (time t2 - t4 in FIG. 3) of the triangle waveform.

Considering that C represents the capacitance of capacitor 16, times (to - t2) and (t2 - t4) are given respectively by the following expressions: T1 = t2-to = CV CV ..(1) lU . . (1) CV T2=t4-t2= 1D .... . . . . . . . ....... . . . . (2) D T=T,+T2=( 1 + 1 )CV (3) Io Io It is now understood that the total period T of the output triangle waveform is a function of C, V, lu and 1D The expression (3) suggests that the period is proportional to the capacitance C. Also, current lu and 1D are controlled by potentiometer 30.The period T is inversely proportional to the currents lu and ID- In other words, the output frequency is increased when such currents lu and 1D are increased by changing the reference voltage applied to the non-inverting input terminal of operational amplifier 28 from a high to a low value.

The symmetry of the output triangle waveform may be controlled over a certain limited range by controlling potentiometer 32. lu is increased and 1D is decreased when the slider of potentiometer 32 is moved to the right position from its center position.

Similarly, lu decreases and 1D increases as the slider moves toward the left extreme.

The present invention will best be understood from the following description by reference to FIGS.

4, 5A and 5B. FIG. 4 is a simplified block diagram of the function generator according to this invention.

Current source 10" and current sink 12" include respectively symmetry control digital-to-analog converters (DACs) 52 and 54 which receive digital outputs from microprocessor (1LP) 50. DACs 52 and 54 may be of any conventional design, but DACs having a resolution of 10 bits or higher are better four finer control. DACs 52 and 54 provide output voltages corresponding to the digital input to each DAC. For example, appropriate digital inputs to DACs 52 and 54 are calculated by the microprocessor I1P in response to the data entered by the operator through the keyboard 51 for desired symmetry orthe ratio between the positive-going and negative-going periods of the triangle signal.It should be noted that the digital inputs to DACs 52 and 54 are calculated to such values that (Io Ip ) remains constant.

Afrequency control signal is applied through terminal 27 to the reference voltage (Vref) terminal of DACs 52 and 54. Such frequency control signal may initially be in the form of a digital signal and then converted into an analog signal before being applied to terminal 27. As is best understood from the following description of FIGS. 5A and 5B, the Vref signal controls the incremental voltage from DACs 52 and 54.

FIGS. 5A and 5B are circuit schematics of preferred embodiments of current source 10" and current sink 12", respectively, in FIG. 4. FIG. 6 is a circuit schematic of DACs 52 and 54.

FIG. 5A shows a preferred embodiment of current source 10" which includes, among other associated passive components, DAC 52, shift register 56, operational amplifiers 58 and 62 and PNP transistor 64.

DAC 52 may be a 10-bit multiplying DAC such as model AD 7533 commercially available from Analog Devices. As is shown symbolically in FIG. 6, a digital-to-analog converter for use as DAC 52 includes resistors Rust, Rs2, . . ., Rsn connected in series between ground and a Vref terminal to which the aforementioned controllable reference voltage Vre, is applied from frequency control terminal 27 in FIG. 4, shunt resistors Rp1, Rp2, . . ., r Rpn connected to each node of series resistors Rs and electronic switches S1, Si, . . S, Sn connected in series with shunt resistors Rp. Such switches S may be CMOS switches and are controlled by the digital output data from shift register 56 having latch capability.

The digital data is transmitted to the DAC from ,aP 50 via a data bus in the conventional manner.

One output terminal 1Out, of DAC 52 is connected to the inverting input of operational amplifier 58 while the other output terminal Iout 2 is grounded. The output of amplifier 58 is fed back to the feedback terminal RF,o of DAC 52 which is connected to 1Out, through the feedback resistor Rf. The non-inverting input of amplifier 58 is referenced to ground. Connected also to the output terminal of operational amplifier 58 is input resistor 60 of another operational amplifier 62 which receives a positive reference voltage from resistive divider including resistors 61,63, and 65.

The output of amplifier 62 is fed to current source transistor 64 including the emitter connected through feedback resistor 66 to the inverting input of amplifier 62 and also through resistor 68 to a regulated positive voltage source and the collector from which the output current lu is available.

In operation, the output current 1Out, from DAC 52 is responsive to the digital data from shift register 56. That is, all switches S, through Sn are at the lefthand position to route the corresponding binary weighted currents to outputterminal 1Out, when all digital data from register 56 are logical ones.Any current corresponding to zero digital data is routed to outputterminal lout2. It should be notedthatthe current from Iout 1 is representative of the digital data to DAC 52 and is also responsive to the reference voltage Vr,f. Such output current 10ut is made to flow through feedback resistor Rf to develop a co-res- ponding negative output voltage from operational amplifier 58 by the action thereof. Such output vol- tage is then amplified by operational amplifier 62 to establish the emitter voltage of transistor 64 and, in turn, the output current 11,- Current sink 12" in FIG. 5B is similarto that of current source 10f'; however, where appropriate, the polarities are reversed. Main differences include the use of NPN transistor 78 instead of PNP transistor 64 and non-inverting configuration of operational amF lifier 76. Current sink 12"operates in essentiallythe same manner as current source 10". To ensure similar operation, all passive components of identical electrical value are used in current sink 12" and are shown by identical reference numbers with prime symbols.As a result, current source 10' and current sink 12' operate respectively to provide currents lU and In of equal magnitude from terminals 70 and 80 when identical digital data are applied to DACs 52 and 5A Shift registers 56 and 72 may be made of three cascade connected 8stage shiftlstore registers, such as the MC 1409B commercially available from Motorola, if an Sbit microprocessor is used as FP 50.

In such an example, a first register receives digital data in serial format at its data input Such data is transferred to second and third shift registers sequentially. In other words, all the necessary data are loaded when three Sbit data words are applied to the data input of the first shift register. All the digital bits of data of the third shift register and the lasttwo bits of the second shift register are used as the 1bbit digital input data to DAC 54. The six digital bits of the second shift resistor and the last four digital bits of the first shift register are usedforthe 10-bit digital input data to DAC 52.The remaining four bits of digital data of the shift register may be used to control selection switches of timing capacitors 16 of different capacitance.

As is apparent from FIG. 3 and the above expression (3), the following relationship must be maintained between both currents lu and ID whatever symmetry may be chosen: 1+1 1+1 + 1 1 + 1 lut - IU2 l = IUn IDn = Constant .... (4) When desired frequency and symmetry are entered into ,zP 50 via keyboard 51, the appropriate reference voltage V,,1 is calculated and applied to terminal 27, thereby determining the period T of the triangle waveform. Also sup 50 calculates the magnitudes of required currents lU and ID based on the expression (4).The triangle waveform of designated frequency and symmetry will be generated when such data is supplied to DACs 52 and 54.

Another approach to provide a controllable symmetry without changing frequency is to utilize a phase-locked loop (PLL) technique. That is, the voltage level at time to in FIG. 3 is sampled by a sample ing means at every period T and such sample is compared with the lower threshold level VL. Either one or both of lu and ID is (or are) increased if the sample voltage is higherthan Y Contrarily, one or both of lS and ID is gor aret decreased if the triangle voltage reaches VL earlier than the time to. An equilibrium state is reached when the sample voltage is equal to-V.

As is understood from the foregoing description, a pair of DACs with controllable reference voltage are used in this invention to control the currents 1D and 3D for charging the discharging a capacitor. The reference voltage is used to determine the output fre quency in combination with selecting different capacitors if needed forwiderfrequency range. Con- trol means provide appropriate digital data to the two DACs for obtaining desired symmetry while maintaining (1 + 1 )oonstant The net result is thatlFre- Io ID quency and symmetry of the output triangle waveform can be controlled independently without causing interaction between the two controls.

Although the foregoing description is made only on preferred embodiment of this invention, various modifications can be made by a person skilled in the art without departing from the scope of this invention.

Claims (3)

1. Afunction generator, comprising: a current source and a currentsink; a capacitor connectable to said current source and said current sinkto be alternately charged and discharged thereby to produce a triangle voltage waveform; and control means connected to said current source and said current sink for varying the currents produced thereby while maintaining the sum of the inverses of such currents constant, thereby providing a controllable waveform symmetry independent of frequency.

2. Function generator in accordance with claim 1 wherein said control means includes means for producing digital control data for each of said current sink and current source, said digital data being converted to analog signals by digital-tbanalog conversion means to provide precise control of said current sink and said current source.

3. A function generator in accordance with claim 2 wherein said means for producing digital control data comprises a microprocessor.

4 Afunction generator constructed and arranged to operate substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.