GB2094552A - A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate - Google Patents

A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate Download PDF

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Publication number
GB2094552A
GB2094552A GB8206106A GB8206106A GB2094552A GB 2094552 A GB2094552 A GB 2094552A GB 8206106 A GB8206106 A GB 8206106A GB 8206106 A GB8206106 A GB 8206106A GB 2094552 A GB2094552 A GB 2094552A
Authority
GB
United Kingdom
Prior art keywords
micromodule
base
external leads
cover
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8206106A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of GB2094552A publication Critical patent/GB2094552A/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)

Abstract

An encapsulation micromodule or so-called chip carrier which is applicable in particular to hybrid circuits comprises a base 6 on which a semiconductor chip is soldered and which is connected electrically to external leads 7 supported by the base. The micromodule is closed by a cover 8 for protecting the chip, the lateral dimensions of the cover being smaller than the lateral dimensions of the base, thus leaving a bare length of external leads in order to permit electrical measurements after soldering of the micromodule on a substrate. <IMAGE>

Description

SPECIFICATION A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate This invention relates to an integrated-circuit chip encapsulation mocromodule which permits measurements and tests after soldering of said micromodule on a substrate.
The micromodule according to the invention is employed in particular in the fabrication of hybrid circuits in which integrated circuits are preferably utilized in the form of chips. For practical purposes of protection and handling, integrated-circuit chips must in fact be mounted in ceramic or plastic micromodules which are more advantageous than conventional integrated-circuit packages such as those known as "dual in-line" or "flatpack", for example.
The micromodules which are under consideration and form the subject of the present invention have lateral dimensions of the order of 1 cm by 1 cm and must not be confused with the encapsulated modules used in hybrid circuits since the dimensions of these latter are several centimeters on a side.
A micromoudle (commonly designated as a "chip-carrier") is constituted by a base, an integrated-circuit chip which is soldered to said base and is connected by means of wires to external leads supported by the base and foldedback beneath this latter. The micromodule is closed by a cover which is soldered to the base and endowed with insulating properties at least in that region in which the cover is placed over the external leads in order to prevent short-circuiting of these latter. The completed micromodule is soldered collectively on a substrate by means of all its external leads. By reason of the fact, however,that the external leads are folded-back beneath the micromodule, this latter cannot readily be tested after soldering on the substrate of a hybrid circuit. The difficulty involved in testing clearly represents a disadvantage.In the first place, integrated circuits are becoming increasingly complex and chip-carriers commonly have about forty external leads. In the second place, the increasing complexity of hybrid circuits is such as to make it necessary to test them separately before they are included in more complex equipment. In particular, it proves necessary to test the operation of the integrated circuits which form part of the hybrid circuits after mounting them on the hybrid-circuit substrate.
In order to solve this difficult of access to test and measurement points of encapsulated integrated circuit chips, the arrangements contemplated by the invention are such that, while the micromodule base remains in accordance with dimensional requirements, provision is made for a cover having smaller lateral dimensions than the base, thus making it possible to leave a part of the external leads left bare and also allowing access to these latter by the test needles or probes of measuring instruments.
In more precise terms, the invention relates to a semiconductor-chip encapsulation micromodule comprising a base on which the semiconductor chip is soldered and which is connected electrically to external leads supported by the base, said micromodule being closed by a cover for protecting the chip. The distinctive feature of the invention lies in the fact that, in order to permit electrical measurements after soldering of the micromodule on a substrate, the lateral dimensions of the cover are smaller than the lateral dimensions of the base, thus leaving an exposed length of external leads.
Other features of the invention will be more apparent upon consideration of the following description and accompanying drawings, wherein: ~Fig. 1 illustrates a micromodule according to the prior art; ~Fig, 2 illustrates a further example of a micromodule according to the prior art; ~Fig.--Fig.3 illustrates a micromodule according to the invention.
Fig. 1 shows a first example of a micromodule or chip-carrier according to the prior art.
A micromodule of this type is constituted by a base 1 on which is soldered an integrated-circuit chip which is concealed by the cover 2 in the figure, said cover being soldered on the base 1.
The integrated-circuit chip is connected to its external lead 3 either by means of wires soldered to the connection pads or by means of a metallic film of the type designated as TAB (Tape automatic bonding). The external leads 3 are folded-back twice, namely a first time along the side walls of the micromodule and a second time beneath the base 1 in order to permit subsequent soldering to the conductive tapes carried by the substrate of the hybrid circuit.
This type of micromodule is very common and has the advantage of being pluggable in test suports, the intended function of which is to make sure that no damage has been sustained by the integrated-circuit chip as a result of encapsulation.
The micromodule nevertheless has two drawbacks: in the first place, the grid of external leads 3 is cut from a metallic sheet, thus making it fairly delicate and costly. In the second place, once it has been soldered to the conductive tapes of a substrate, it proves very difficult to unsolder the micromodule as a whole by means of conventional methods which would be liable and would avoid short circuits between the different external leads.
Fig. 2 illustrates another type of micromodule according to the prior art but of more recent design.
Compared with the micromodule of Fig. 1, the essential difference lies in the design of the base 4. This base is constituted by a ceramic plate for supporting external leads 5 which are deposited by metallization, thus reducing the cost price in comparison with the external leads 3 of Fig. 1.
Fabrication of the base 4 requires a number of steps involving the use of a ceramic plate having larger dimensions in which two sets of holes are drilled and intersect at right angles, thus defining squares; each square corresponds to one base 4 of a micro-module. Starting from these ceramic plates, the holes are metallized, whereupon the plates are fractured and separated so as to form a corresponding number of bases 4. The external leads are then completed by partial metallizations on both faces of each base 4. Together with the metallized half-holes 5, said partial metallizations form the equivalent of the external leads 3 of the metallic grid of Fig. 1.
This type of micromodule is also well-known and in widespread use at the present time.
Although its cost price is advantageous in comparison with the previous design, this second micromodule nevertheless suffers from a disadvantage in that its external leads 5 are no longer accessible to test probes by reason of their very small dimensions since there are at least ten leads per side of 1 cm of the micromodule cover.
Fig. 3 illustrates the micromodule according to the invention.
This micromodule is constituted by a base 6 having dimensions which comply with the prescribed standards adopted by micromodule manufacturers and also by manufacturers of testing equipment. The external leads 7 supported by the base can be designed either in the form of a metallic grid which is wholly comparable with the connection grid of leads 3 as described in the first example of the prior art or in the form of metallic deposits which are comparable with the leads 5 of the second example of the prior art. These external leads 7 are folded-back beneath the module and terminate within the interior of the cover 8 in order to be connected to the connection pads of the integrated-circuit chip.
However, the cover 8 has smaller dimensions than the lateral dimensions of the base. Thus, when the cover ispermanently fixed on the base, an external-lead zone whose length is designated by the reference 9 in the figure is left bare outside the cover 8. This zone provides access to the test and measurement points of the integrated circuit when this latter is encapsulated within a micromodule according to the invention. An external-lead zone having a length of at least 0.5 mm facilitates positioning of test probes.
In addition to the fact that the micromodule can be tested after soldering in position on the hybrid circuit, it has a further advantage which is by no means negligible, namely that it can be unsoldered. By virtue of the fact that a portion of the base projects beyond the module cover, it is much easier to unsolder a module which has been mounted on a hybrid circuit whenever the need arises. This operation can be performed either by means of a conventional soldering iron or a special one which grips the four faces of the module and collectively unsolders all the output connections.
This has the effect of facilitating repair work or adjustments of the hybrid circuit. Furthermore, the module according to the invention permits plug-in insertion in commercially available test units since it complies with the standards laid down and internationally recognized for encapsulated semi-conductor modules.
The cover can be of ceramic material in accordance with widespread practice but may also be fabricated from plastic material which is more economical and is permitted by the fact that the cover is located at a greater distance from the hot points or from the locations at which the micromodule is soldered to a substrate. On the other hand, the base remains of ceramic material, alumina or beryllium oxide by reason of the fact that it is inteded to withstand high temperatures.

Claims (8)

1. A semi-conductor-chip encapsulation micromodule comprising a base on which the semiconductor chip is soldered and which is connected electrically to external leads supported by the base, said micromodule being closed by a cover for protecting the chip, wherein the lateral dimensions of thecover are sr aller than the lateral dimensions of the base, thus leaving a bare length of external leads in order to permit electrical measurements after soldering of said micromodule on a substrate.
2. A micromodule according to claim 1, wherein the external leads which rest on a principal surface of the base are folded-back twice along the periphery of said base, thus forming a layer of collectively solderable metallic connections on the other principal surface of said base.
3. A micromodule according to claim 2, wherein the external leads are constituted by a grid cut from a metallic sheet.
4. A micromodule according to claim 2, wherein the external leads are constituted by metallization deposits on the base.
5. A micromodule according to claim 1, wherein the length of external leads left bare between the cover and the periphery of the base is greater than 0.5 mm.
6. A micromodule according to claim 1, wherein the base is formed of a material which affords resistance to the soldering temperatures and is either ceramic material, alumina or beryllium oxide.
7. A micromodule according to claim 1, wherein the cover is formed of ceramic or plastics materials.
8. A micromodule substantially as hereinbefore described with reference to, and as illustrated in Figure 3 of the accompanying drawings.
GB8206106A 1981-03-06 1982-03-02 A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate Withdrawn GB2094552A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8104536A FR2501414A1 (en) 1981-03-06 1981-03-06 MICROBOITIER FOR ENCAPSULATION OF SEMICONDUCTOR PELLETS, TESTABLE AFTER WELDING ON A SUBSTRATE

Publications (1)

Publication Number Publication Date
GB2094552A true GB2094552A (en) 1982-09-15

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Family Applications (1)

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GB8206106A Withdrawn GB2094552A (en) 1981-03-06 1982-03-02 A semiconductor-chip encapsulation micromodule which is testable after soldering on a substrate

Country Status (3)

Country Link
DE (1) DE3207846A1 (en)
FR (1) FR2501414A1 (en)
GB (1) GB2094552A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2127217A (en) * 1982-08-10 1984-04-04 Brown David F Semiconductor chip carriers and housings
FR2565408A1 (en) * 1984-05-30 1985-12-06 Thomson Csf Device containing an integrated circuit wafer surmounted by an insulating slab acting as package
WO1987006062A1 (en) * 1986-03-27 1987-10-08 Hughes Aircraft Company Inverted chip carrier
EP0331245A2 (en) * 1988-03-01 1989-09-06 Lsi Logic Corporation Integrated circuit chip package and method
EP0351581A1 (en) * 1988-07-22 1990-01-24 Oerlikon-Contraves AG High-density integrated circuit and method for its production
EP0538010A2 (en) * 1991-10-17 1993-04-21 Fujitsu Limited Semiconductor package, a holder, a method of production and testing for the same
GB2283863A (en) * 1993-11-16 1995-05-17 Ibm Direct chip attach module
EP0723703A1 (en) * 1993-10-12 1996-07-31 Olin Corporation Edge connectable metal package
EP0844658A2 (en) * 1996-10-16 1998-05-27 Oki Electric Industry Co., Ltd. Integrated circuit, method of fabrication and evaluation of the same
EP1063699A1 (en) * 1998-02-10 2000-12-27 Nissha Printing Co., Ltd. Base sheet for semiconductor module, method for manufacturing base sheet for semiconductor module, and semiconductor module
US6300673B1 (en) 1992-08-21 2001-10-09 Advanced Interconnect Technologies, Inc. Edge connectable metal package
US8395399B2 (en) 2007-12-06 2013-03-12 Nxp B.V. Semiconductor device and wafer with a test structure and method for assessing adhesion of under-bump metallization

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3809797A (en) * 1971-11-16 1974-05-07 Du Pont Seal ring compositions and electronic packages made therewith
US4180161A (en) * 1977-02-14 1979-12-25 Motorola, Inc. Carrier structure integral with an electronic package and method of construction

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2127217A (en) * 1982-08-10 1984-04-04 Brown David F Semiconductor chip carriers and housings
US4638348A (en) * 1982-08-10 1987-01-20 Brown David F Semiconductor chip carrier
FR2565408A1 (en) * 1984-05-30 1985-12-06 Thomson Csf Device containing an integrated circuit wafer surmounted by an insulating slab acting as package
WO1987006062A1 (en) * 1986-03-27 1987-10-08 Hughes Aircraft Company Inverted chip carrier
EP0331245A2 (en) * 1988-03-01 1989-09-06 Lsi Logic Corporation Integrated circuit chip package and method
EP0331245A3 (en) * 1988-03-01 1991-05-08 Lsi Logic Corporation Integrated circuit chip package and method
EP0351581A1 (en) * 1988-07-22 1990-01-24 Oerlikon-Contraves AG High-density integrated circuit and method for its production
US4975765A (en) * 1988-07-22 1990-12-04 Contraves Ag Highly integrated circuit and method for the production thereof
US5666064A (en) * 1991-10-17 1997-09-09 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device, and method of testing and producing semiconductor device
US5750421A (en) * 1991-10-17 1998-05-12 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device, and method of testing and producing semiconductor device
EP0538010A3 (en) * 1991-10-17 1993-05-19 Fujitsu Limited Semiconductor package, a holder, a method of production and testing for the same
US5475259A (en) * 1991-10-17 1995-12-12 Fujitsu Limited Semiconductor device and carrier for carrying semiconductor device
US5736428A (en) * 1991-10-17 1998-04-07 Fujitsu Limited Process for manufacturing a semiconductor device having a stepped encapsulated package
US5637923A (en) * 1991-10-17 1997-06-10 Fujitsu Limited Semiconductor device, carrier for carrying semiconductor device
EP0538010A2 (en) * 1991-10-17 1993-04-21 Fujitsu Limited Semiconductor package, a holder, a method of production and testing for the same
US6300673B1 (en) 1992-08-21 2001-10-09 Advanced Interconnect Technologies, Inc. Edge connectable metal package
EP0723703A1 (en) * 1993-10-12 1996-07-31 Olin Corporation Edge connectable metal package
EP0723703A4 (en) * 1993-10-12 1998-04-01 Olin Corp Edge connectable metal package
GB2283863A (en) * 1993-11-16 1995-05-17 Ibm Direct chip attach module
AU740693B2 (en) * 1996-10-16 2001-11-08 Oki Electric Industry Co. Ltd. Integrated circuit and fabricating method and evaluating method of integrated circuit
US5994716A (en) * 1996-10-16 1999-11-30 Oki Electric Industry, Co. Ltd. Integrated circuit and fabricating method and evaluating method of integrated circuit
US6251696B1 (en) 1996-10-16 2001-06-26 Oki Electric Industry, Co. Ltd. Method of forming integrated circuit with evaluation contacts electrically connected by forming via holes through the chip, and bonding the chip with a substrate
EP0844658A3 (en) * 1996-10-16 1999-01-07 Oki Electric Industry Co., Ltd. Integrated circuit, method of fabrication and evaluation of the same
EP0844658A2 (en) * 1996-10-16 1998-05-27 Oki Electric Industry Co., Ltd. Integrated circuit, method of fabrication and evaluation of the same
US6423559B2 (en) 1996-10-16 2002-07-23 Oki Electric Industry Co. Integrated circuit and fabricating method and evaluating method of integrated circuit
EP1063699A1 (en) * 1998-02-10 2000-12-27 Nissha Printing Co., Ltd. Base sheet for semiconductor module, method for manufacturing base sheet for semiconductor module, and semiconductor module
EP1063699A4 (en) * 1998-02-10 2007-07-25 Nissha Printing Base sheet for semiconductor module, method for manufacturing base sheet for semiconductor module, and semiconductor module
US8395399B2 (en) 2007-12-06 2013-03-12 Nxp B.V. Semiconductor device and wafer with a test structure and method for assessing adhesion of under-bump metallization

Also Published As

Publication number Publication date
FR2501414B1 (en) 1984-07-06
FR2501414A1 (en) 1982-09-10
DE3207846A1 (en) 1982-09-16

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