GB2093614B - Triply redundant microprocessor system - Google Patents

Triply redundant microprocessor system

Info

Publication number
GB2093614B
GB2093614B GB8105275A GB8105275A GB2093614B GB 2093614 B GB2093614 B GB 2093614B GB 8105275 A GB8105275 A GB 8105275A GB 8105275 A GB8105275 A GB 8105275A GB 2093614 B GB2093614 B GB 2093614B
Authority
GB
United Kingdom
Prior art keywords
microprocessor system
triply redundant
redundant microprocessor
triply
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8105275A
Other versions
GB2093614A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co Ltd
Original Assignee
Plessey Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Co Ltd filed Critical Plessey Co Ltd
Priority to GB8105275A priority Critical patent/GB2093614B/en
Priority to ZA82160A priority patent/ZA82160B/en
Priority to PT74338A priority patent/PT74338B/en
Priority to IE340/82A priority patent/IE52648B1/en
Priority to NZ199770A priority patent/NZ199770A/en
Publication of GB2093614A publication Critical patent/GB2093614A/en
Application granted granted Critical
Publication of GB2093614B publication Critical patent/GB2093614B/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G06F11/185Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality and the voting is itself performed redundantly
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1604Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
GB8105275A 1981-02-19 1981-02-19 Triply redundant microprocessor system Expired GB2093614B (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
GB8105275A GB2093614B (en) 1981-02-19 1981-02-19 Triply redundant microprocessor system
ZA82160A ZA82160B (en) 1981-02-19 1982-01-11 Triple redundant microprocessor system
PT74338A PT74338B (en) 1981-02-19 1982-01-26 Triply redundant microprocessor system
IE340/82A IE52648B1 (en) 1981-02-19 1982-02-18 Microprocessor system
NZ199770A NZ199770A (en) 1981-02-19 1982-02-18 Triply redundant microprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8105275A GB2093614B (en) 1981-02-19 1981-02-19 Triply redundant microprocessor system

Publications (2)

Publication Number Publication Date
GB2093614A GB2093614A (en) 1982-09-02
GB2093614B true GB2093614B (en) 1984-10-17

Family

ID=10519827

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8105275A Expired GB2093614B (en) 1981-02-19 1981-02-19 Triply redundant microprocessor system

Country Status (5)

Country Link
GB (1) GB2093614B (en)
IE (1) IE52648B1 (en)
NZ (1) NZ199770A (en)
PT (1) PT74338B (en)
ZA (1) ZA82160B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE457391B (en) * 1987-04-16 1988-12-19 Ericsson Telefon Ab L M PROGRAM MEMORY MANAGED REAL TIME SYSTEM INCLUDING THREE MAINLY IDENTICAL PROCESSORS
SE465056B (en) * 1989-05-12 1991-07-15 Ellemtel Utvecklings Ab PROCEDURE TO AVOID LATENT ERRORS IN A LOGIC FOR MAJORITY SELECTION OF BINARY SIGNALS
US5349654A (en) * 1992-02-20 1994-09-20 The Boeing Company Fault tolerant data exchange unit
EP1146423B1 (en) * 2000-04-11 2010-01-20 The Boeing Company Voted processing system
US7318169B2 (en) * 2002-05-15 2008-01-08 David Czajkowski Fault tolerant computer
US7260742B2 (en) * 2003-01-28 2007-08-21 Czajkowski David R SEU and SEFI fault tolerant computer
CN110928217A (en) * 2019-11-18 2020-03-27 天津津航计算技术研究所 CPU (Central processing Unit) triple-redundancy voting circuit applied to aviation electric heating control system

Also Published As

Publication number Publication date
PT74338B (en) 1984-07-30
ZA82160B (en) 1982-11-24
IE820340L (en) 1982-08-19
IE52648B1 (en) 1988-01-06
NZ199770A (en) 1984-12-14
PT74338A (en) 1982-02-01
GB2093614A (en) 1982-09-02

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee