GB2081973A

GB2081973A - Hall effect device

Info

Publication number: GB2081973A
Application number: GB8111812A
Authority: GB
Original assignee: ITT Industries Ltd
Current assignee: ITT Industries Ltd
Priority date: 1980-08-05
Filing date: 1981-04-14
Publication date: 1982-02-24
Also published as: GB2081505A; GB2081973B

Abstract

A Hall effect device comprises a thin substrate-free epitaxially grown semiconductor (eg gallium arsenide, gallium indium arsenide or silicon) layer 11, initially formed on a substrate 12 which, after device processing is complete, is removed by selective etching. Intermediate layer 13 of e.g. gallium aluminum arsenide, may be provided. The device may be contacted 14, 15 and mounted in a magnetic e.g. ferrite housing 16, 17. A device fabricated by this method and provided with flux concentrators is stated to be much smaller than conventional Hall effect systems. <IMAGE>

Description

1

GB2081 973A

1

SPECIFICATION Hall effect device

5 This invention relates to semiconductor devices of the Hall effect type, to methods of fabricating such devices, and to applications thereof.

As is well known, a Hall effect device 10 comprises a plate-like body of a semiconductor material through which a transverse magnetic field may be applied. The effect of the magnetic field is to deflect an electric current flowing across the body between a pair of 15 current electrodes, this deflection of the current inducing a potential difference between a pair of sensor or Hall electrodes disposed one on each side of a line joining the two current electrodes. The magnitude of this Hall voltage 20 VH is given approximately by the expression

Bl

VH =

nde

25

where B is the applied magnetic field intensity; I is the current through the device; n is the carrier concentration of the device material; e is the electronic charge and d is the 30 device thickness. Thus the output Hall voltage is inversely proportional to the device thickness and is directly proportional to the current, which in turn is a function'of the carrier mobility in the semiconductor material. 35 Hall effect devices are used in a variety of applications, their most important features being the complete absence of moving parts and the provision of a high degree of isolation between the control input and the device 40 output. These features have made the use of such devices in e.g. telephone switching applications an attractive proposition. The use of Hall effect devices is however limited at present by their relatively low sensitivity which in 45 turn results in a relatively high power consumption.

From the expression given above, it will be seen that the sensitivity of a Hall effect device can be enhanced by using a semiconductor 50 material having a relatively high carrier mobility, e.g. gallium arsenide, and at the same time reducing the device thickness to a minimum. However, previous attempts to produce thin wafers of gallium arsenide have not been 55 successful.

An object of the invention is to minimise or to overcome these disadvantages.

According to one aspect of the invention there is provided a Hall effect device in which 60 the magnetic field-sensitive element includes a substrate-free laminar body of an epitaxially grown compound semiconductor material.

According to another aspect of the invention there is provided a method of fabricating 65 a Hall effect device, including depositing an epitaxial layer of a compound semiconductor on a substrate of the same semiconductor or a lattice-matching semiconductor, providing current contacts and Hall contacts to the exposed 70 face of the epitaxial layer, and removing the substrate from the unexposed face of the epitaxial layer.

Reduction of the device thickness has the additional consequent effect of increasing the 75 magnetic field through the device as the reduced thickness provides for a reduced air gap between the poles of the magnet used to opperate the device. This renders the device useful in application in which high sensitivity 80 is important, one such application being as a magnetometer.

Embodiments of the invention will now be described with reference to the accompanying drawings in which:

85 Figures 1 to 3 illustrate successive stages in the fabrication of a gallium arsenide Hall effect device.

Figure 4 shows how a Hall effect device embodying the invention can be used with 90 flux concentration.

Figures 5 and 6 show another way to mount a device embodying the invention.

Fig. 7 shows schematically another way to mount a device embodying the invention. 95 Referring to Figs. 1 to 3, the Hall effect device is formed in an n-type gallium arsenide epitaxial layer 11 (Fig. 1) grown on a gallium arsenide semi-insulating substrate 12 by conventional liquid or vapour phase epitaxial 100 techniques. Typically the epitaxial layer 11 is from 2 to 20 microns in thickness, and in some applications an intervening, e.g. 5 micron, layer 13 of gallium aluminium arsenide (Ga, _ xAlxAs where 0.8>x>0.5) may be pro-105 vided between the substrate 12 and the epitaxial layer 11. Where such an intervening alloy layer is provided the substrate need not be semi-insulating.

Hall-type ohmic contacts 14 of gold or a 110 gold tin alloy providing low contact resistance are formed on the n-type epitaxial GaAs layer using standard photolithographic techniques. The assembly is next inverted (Fig. 2) on to a gold or gold-tin alloy contact pattern 15 laid 115 on an insulating magnetic substrate 16 e.g. a ferrite, such that contact is made to the contacts 14.

The semi-insulating substrate layer 12 is back-etched using controlled etching tech-120 niques to provide uniformity of device thickness. The etch can either be a normal GaAs etch or one which preferentially etches GaAs with respect of GaAIAs. If the latter has been grown the etching stops at the alloy layer. 125 This is known as a "chemi-stop" process. Then, see Fig. 3, a lid 17 of ferrite or other magnetic material is placed over the device, and the package is incorporated in a magnetic circuit. Alternatively the base or substrate can 130 already be part of the magnetic circuit.

2

GB2081 973A 2

in Fig. 3, the substrate 16 and lid 17 are of magnetic material, as already mentioned,

while the side wall 18 is of non-magnetic material. Typically the depth of the non-mag-5 netic side walls is 10 microns, while the region 13 is in the range of 0.1 to 5 microns.

By employing the above technique the air gap can be reduced to less than 10 microns, i.e. an increase in output by a factor of 10 approximately 50 over conventional gallium arsenide devices.

Various methods may be used for removing the substrate from the back of the device. One such method is the cathodic inhibition method 15 as described in our Patent specification No. 1,469,005 (J. Froom et al-8-3-2). In this method the GaAs is grown on a semi-insulat-ing (SI) GaAs substrate. A chemical etch e.g.

20 KOh H202 Hs0

2g 10 ml 20 ml

(actually 10 ml of a standard commercial 30% 25 solution)

is used to dissolve the GaAs substrate. The semiconductor is given a negative potential (~10 V) by an external power supply, which 30 inhibits the action of the chemical etch. However this only affects the conductive epilayer. The surface of the high resistance material does not acquire the negative potential, so that substrate dissolves at the normal uninhi-35 bited rate. This is about 1 /im/min for the quoted mixture.

An alternative technique is the chemical discrimination method. This does not depend on the electrical properties of the substrate, 40 which can be n or p or SI, but requires the presence of the layer 13 of Ga, _„AlxAs between the substrate and the GaAs epilayer. The substrate is removed using an etch which does not attack Ga^^l^As, wherein x>0.5. 45 A mixture of 95% H202 solution (30% H202 in H20) with 5% concentrated NH3 solution has the required properties. If necessary the barrier layer of Ga^xAl, can then be removed by dissolution in concentrated HF solution, 50 which does not attack GaAs to any significant extent.

For both etching techniques the device uniformity is determined by the uniformity of the GaAs epilayer growth. The best uniformity has 55 been achieved with the metalorganic chemical vapour deposition (MOCVD) process.

In a further embodiment a device can be produced by growing n-type gallium indium arsenide, typically Ga047ln0 53As, on an indium 60 arsenide, (InP) substrate, preferably of semi insulating material, and then selectively removing the latter. The composition Ga047. In0 53As gives the epitaxial layer the same lattice parameter as the InP substrate. An 65 exact match is not essential but a close match should be provided. The gallium indium phosphide layer can be grown by conventional liquid epitaxial techniques.

The mobility at room temperature in Ga047-ln0 53As can be as high as 13,000 cm2V—1s—1, which is significantly greater than in GaAs with up to 8,000 cnr^V-'s-

Chemically selective dissolution of the InP can be achieved using a mixture of hydrochloric acid (HCI) and phosphoric acid (H3P04), typically in a volume ratio of 3:1, but other proportions would be satisfactory.

Other methods than those described above can be used to produce the thin Hall layer, including ion implantation and the MOCVD growth method.

The Hall effect devices described herein may be used in a variety of applications. In particular they may be used as switching elements in telecommunication exchanges, as general purpose relays or switches, or as current and magnetic field measuring devices. As will be seen from the subsequent description they can also be used in magnetometers.

We have referred above to the use of Hall effect devices as the sensing elements of magnetometers: with the relatively large and insensitive Hall elements hitherto available this has necessitated the use of relatively large flux concentrators. With a Hall element 9mm square and 0.2mm thick, the flux concentrators may be rods each 200mm long and 11 mm in diameter. Such flux concentrators are arranged as shown in Fig. 4, where 20 and 21 are flux concentrator rods with the Hall element in the air, as indicated at 21.

The use of the very small, back-etched, devices made as described above permits a substantial reduction in the size of the concentrators and the air gap. Thus if, by the method described above, we make a Hall element of thickness 10jum and 0.5mm square, the air gap can be 0.3mm, but with flux concentrator rods only 20mm long and 1.1mm in diameter. The reduction of the air gap thus made possible means that the enhancement of the magnetic induction increases exponentially. This would give an increase in sensitivity of at least 300 times.

The back-etch method, however, enables even thinner Hall elements to be made, for instance to sub-millimeter size, in which case we can have a Hall element 0.5mm square and 1jum thick, on a 9jum substrate. With this fitting closely between the flux concentrators we have an air gap of as little as 10jum. Flux-concentrators for such an element can be 8mm long an 0.5mm in diameter. This will give an even greater enhancement of sensitivity.

Flux enhancement can be improved even further by careful choice of magnetic materials for the concentrator. Examples of such materials are metallic glasses of typically Fe, Ni, Co, P, and B compositions made under the trade70

75

80

85

90

95

100

105

110

115

120

125

130

3

GB 2 081 973A

3

mark METGLAS, by Allied Chemicals, and under the trademark VITRO VAC, by Vacu-umschmelze GmbH. Such glasses can be moulded in a press to the required shape.

5 Where the frequencies involved are high, laminated metallic glasses can be used: this is convenient as such materials are often supplied in ribbon form. Soft iron laminates or other high permeablility materials can also be 10 used.

With the materials now used, temperature sensitivity is much reduced as compared with the ususally-used materials such as indium arsenide. Furthermore, susceptibility to noise 15 is low, especially when using AC sampling with phase-sensitive detector techniques at different frequencies.

One arrangement for a device of the above type is shown in Figs. 5 and 6, of which Fig. 20 5 is a diagrammatic side view and Fig. 6 a view from above. Here the Hall effect device 20 is formed on, or secured to, the end of the flux concentrator 21, with the lead 22 brought out as shown. Another flux concentra-25 tor 23 is placed over the device, so located as to give a very small air gap. The whole is then encapsulated in a potting compound as indicated at 24. The leads each end at a contact pad on a bush 25 of a non-magnetic and 30 electrically insulating material (e.g. plastics).

In Fig. 7, which is to a larger scale than Figs. 5 and 6, we see the Hall effect device 30 with its substrate between the flux concentrators 31, 32. The contacts are connected by 35 flying leads such as 22 to terminals such as 34 from which the leads are taken out, only one such lead being shown. This also is encapsulated in a potting compound (not shown). In this arrangement, the leads can be 40 taken out by suitable photolithographic design, so that the actual device 30, which may be a mesa (as shown) and the surrounding area can be thinned by etching. Thus the device 30 is isolated, but conductive tracks 45 extend on the gallium arsenide to the surrounding region for connection as shown.

At this point it is worth mentioning that with the advanced signal processing techniques available, and the relatively low noise 50 produced in a gallium arsenide device, it is possible in some applications to eliminate the use of flux concentrators. However, in such cases, the device can be mounted, and blobs of metallic glass placed above and below the 55 device to increase sensitivity.

The main emphasis in the proceeding description has been on Hall effect devices made from gallium arsenide, but other materials can be used, one of which is silicon, possibly 60 suitably doped. Thin silicon etching techniques can thus be used in the manufacture of such devices.

Figs. 8 and 9 show in side and plan views an application of a thin silicon Hall effect 65 device 40, centred on a region 41 of thin silicon. This thin silicon region 41 is centred between the pole-pieces 42 and 43 of a magnet, and has downwardly-extending regions to a substrate 44 of alumina. The Hall 70 electrodes are connected via bands such as 45 to pads such as 46, each connected to a contact pin via a solder blob 47. These bands are made by metallisation. The dashed line circle 49 indicates a back-etch central region 75 for the pale pieces.

The silicon used has an epi-layer or ion implant on high resistivity substrate of reverse doping type. The pole pieces of high permeability material , e.g. ma-metal or metallic 80 glass.

Such devices with flux concentrators can be used to measure components of induction perpendicular to the plane of the Hall device. If two Hall voltages are placed in series, but 85 perpendicular to each other in a horizontal position, then the sum of the Hall voltages is a sine voltage whose phase shifts from 0 to 360° with the angle between the Hall arrangement and the direction of magnetic 90 north. Voltages can then be derived which are proportional to the angle between the Hall devices are north, so that we have a compass.

Three Hall devices can be set perpendicular to each other, with feed-back coils around the 95 concentrators to reduce hysteria effects. In this case, care is needed to ensure that the flux concentrators in the three axes do not interfere with each other in terms of field perturbation. With the relatively small flux

100 concentrators used, any such perurbations are reduced.

Claims

CLAIMS:

1. A Hall effect device in which the mag-

105 netic field sensitive element includes a substrate-free laminar body of an epitaxially-grown compound semiconductor material.

2. A Hall effect device, including a substrate-free laminar body of an epitaxially-

110 grown compound semiconductor, which body is provided with current electrodes and Hall electrodes, and means for providing a magnetic field transverse to the plane of said body.

115

3 A Hall effect device as claimed in claim 2, wherein the thickness of said laminar body is between 2 and 20 microns.

4. A Hall effect device as claimed in claim 2 or 3, wherein said means for providing a

120 magnetic field includes a ferrite package within which the body is mounted.

5. A Hall effect device as claimed in any one of claims 1 to 4, wherein the semiconductor is gallium arsenide.

125

6. A Hall effect device as claimed in any one of claims 1 to 4, wherein the semiconductor is gallium indium arsenide.

7. A Hall effect device as claimed in claim 6, wherein the semiconductor is Ga047ln053As.

1 30

8. A Hall effect device as claimed in any

4

GB2081 973A 4

one of claims 1 to 4, wherein the semiconductor is silicon.

9. A Hall effect device substantially as described herein with reference to the accom-

5 panying drawings.

10. A method of fabricating a Hall effect device, including depositing an epitaxial layer of a compound semiconductor on a substrate of the same semiconductor or a lattice match-

10 ing semiconductor, providing current contacts and Hall contacts to the exposed face of the epitaxial layer, and removing the substrate from the unexposed face of the epitaxial layer.

11. A method as claimed in claim 10,

1 5 wherein the substrate is semi-insulating and is removed with an electric potential selective etch.

12. A method as claimed in claim 10, wherein the substrate is removed with a

20 chemically selective etch.

13. A method as claimed in claims 10,

11 or 12, wherein the thickness of the epitaxial layer is from 2 to 20 microns.

14. A method as claimed in claim 9, 10,

25 11 or 12, wherein the epitaxial layer is gallium arsenide.

15. A method as claimed in claim 14, wherein a relatively thin three component semiconductor layer is provided between the

30 substrate and the epitaxial layer.

16. A method as claimed in claim 10, 11,

12 or 13 wherein the epitaxial layer is gallium indium arsenide.

17. A method as claimed in claim 16,

35 wherein the epitaxial layer is Ga047ln053As,

and wherein the substrate is indium phosphide.

18. A method as claimed in claim 10, 11, 12 or 1 3, wherein the semiconductor is sili-

40 con.

19. A method of fabricating a Hall effect, device substantially as described herein with reference to the accompanying drawings.

20. A Hall effect device made by the

45 method of any one of claims 10 to 19.

21. A telephone exchange provided with a plurality of Hall effect devices as claimed in any one of claims 1 to 6 or claim 18.

Printed for Her Majesty's Stationery Office by Burgess & Son (Abingdon) Ltd.—1982.

Published at The Patent Office, 25 Southampton Buildings,

London, WC2A 1AY, from which copies may be obtained.