GB2080957A

GB2080957A - Method of suppressing spurious voltages and of measuring fault resistance

Info

Publication number: GB2080957A
Application number: GB8111561A
Authority: GB
Original assignee: Felten and Guilleaume Carlswerk AG
Current assignee: Felten and Guilleaume Carlswerk AG
Priority date: 1980-07-23
Filing date: 1981-04-13
Publication date: 1982-02-10
Also published as: GB2080957B; DE3027800C2; FR2487525A1; DE3027800A1; FR2487525B1

Abstract

A method of suppressing spurious voltages and a method of indicating the fault resistance RF when carrying out measurements with d.c. Murray bridge circuits on cables a,b with a stabilized measuring voltage source involves stabilizing the measuring voltage source Um with a low internal resistance for d.c. voltage but with a high internal impedance for a.c. voltages e.g. by providing a transistor T and an operational amplifier V connected as shown. A voltage which depends on the measuring current and therefore on the fault resistance is measured by meter I to give the value of the fault resistance. The method can be used particularly with telecommunications cables, and substantially reduces the effects of spurious voltages which can give rise to differential voltages between the cores. <IMAGE>

Description

SPECIFICATION Method of suppressing spurious voltages in measurements with d.c. Murray bridge circuits on cables, and of measuring fault resistance when measuring fault location The invention relates to a method of suppressing spurious voltages in measurements with d.c. Murray bridge circuits on cables with a stabilized measuring voltage source. The method may also include measuring fault resistance when measuring fault location.

High spurious voltages at frequencies of 50 Hz and 163 Hz frequently occur in the cores of installed cables as a result of inductive coupling of external voltages. These are mainly common mode voltages. Identical cores of the same cable carry identical voltages with respect to a particular measuring point and if both cores are equally loaded there is no potential difference between them. When insulation faults are located, the cores used for the measurement are usually asymmetrically loaded by the measuring circuit so that voltages of several volts can appear between the cores used for measurement. When a fault is located by means of a known Murray measuring bridge, the said voltage appears between the two cores under measurement at the input of the nul indicator and frequently faisifies the measured results.

According to one aspect of the invention there is provided a method of suppressing spurious voltage in a measurement on a cable with a d.c.

Murray bridgeRcircuit having a stabilized measuring voltage source, wherein the measuring voltage source is stabilized with a low internal resistance for d.c. voltage but with a high internal impedance for a.c. voltage.

According to another aspect of the invention there is provided an apparatus for performing a measurement on a cable, comprising a d.c. Murray bridge circuit including a stabilized measuring voltage source having a relatively low internal impedance for direct voltage and a relatively high internal impedance for alternating voltage.

It is thus possible-to substantially reduce the effect of spurious voltages when faults are located and to substantially prevent the appearance of push-pull or differential voltages between 'measuring cores.

Preferably, the stabilization of the measuring source is performed by means of a series transistor and operational amplifier in polarity opposition, and the amplifier being provided with frequency dependent feedback by means of a RC network between the output of the transistor and the inverting input of the amplifier so that stabilization of d.c. voltage is fully effective but is cancelled for a.c. voltages above a limiting frequency defined by the RC network.

It is thus possible to further perfect location of the fault by measurement of the absolute value of the fault resistance.

Preferably, measurement of a voltage which depends on the measuring current and is therefore approximately inversely dependent on fault resistance is used as measured value of the fault resistance.

Preferably, the measuring voltage for the fault resistance is tapped off between the base and the emitter of the series transistor. The fault resistance can thus be displayed with a logarithmic scale, i.e. over a relatively wide measuring range.

The invention will be further described, by way of example, with reference to the accompanying drawing, which is a circuit diagram of a preferred embodiment.

The single illustration shows in diagrammatic form a circuit for performing a method of suppressing spurious voltages when measuring fault resistance. The top part of the drawing shows a faulty cable with a fault-free core b having a core resistance Rb and a faulty core a. The resistance of the faulty core a as far as the fault location is designated by Rx and the resistance of the core a from the fault location to the distal cable end is designated by Ry. The two cores a and b are connected to each other at the distal end of the cable. The resistance of the fault location with respect to earth is designated by RF. A Murray measuring bridge with a balancing potentiometer P and a nul indicator N is shown at the terminals of the cores a and b which are to be measured.A measuring voltage is supplied by a measuring voltage source Um which is shown as a battery in the exemplified embodiment. The measuring voltage source Um can be extended by an additional voltage source Uz, as shown in the example, for measuring longer cable lengths with higher core resistances or for measuring large fault resistances RF. The negative terminal of the measuring voltage source Um is connected via a voltage stabilizing circuit to the wiper of the balancing potentiometer P and the positive terminal is connected to earth E and therefore to the earthy end of the fault resistance RF.The path of the measuring current from the positive terminal of the measuring voltage source via earth E, the fault resistance RF, via the measuring circuit, the wiper of the potentiometer P to the collector C of a series transistor T, the emitter E thereof, a limiting resistor R2, an operational amplifier V and to the negative terminal of the voltage source is designated by thicker lines outside the measuring circuit. A feedback voltage is tapped off from the collector C of the transistor T and is applied via the RC network, comprising the resistor R1 and the capacitor Cl, to the inverting input of the amplifier V.

It can be seen, that two voltages of identical magnitude, induced on to the cable cores a and b are loaded with different resistances when the balancing potentiometer T is directly connected through the bridge circuit to the measuring voltage source Um so that substantial voltage differences of several volts can appear at the nul indicator N. These voltages can substantially falsify the measured results and in many cases render measurement completely impossible. The illustrated stabilizing circuit comprising the transistor T and the amplifier V simulates in accordance with its purpose a low internal resistance of the voltage source Um for d.c. but represents an impedance which is very high compared with all resistances in the measuring circuit for a.c. above a limiting frequency defined by the RC network R1, C1.The pair of cores to be measured is therefore symmetrically terminated and any conversion of the common mode voltage on the cores into a push-pull or differential voltage and therefore falsification of the measured result is substantially avoided.

Another uncertainty in measurement is due to the fact that the magnitude of the fault resistance EF can alter during measurement. It is therefore advantageous to observe the value of the vault resistance while the location of the fault is determined. Due to the case of a constant measuring voltage, the measuring current in the circuit illustrated in the drawing is inversely proportional to the fault resistance RF. A voltage, tapped off the limiting resistor R2, couid therefore be used as a measure of the fault resistance.

However, since the value of the fault resistance can alter over several powers of ten while the fault is being located, such observation wouid be possible without difficulty only if the fault resistance is logarithmically displayed. It is well known that the voltage between the base B and the emitter E of a transistorT in base connection is inversely proportional to the logarithm of the current flowing between the collector C and the emitter E. If the base-emitter voltage of the transistor in the illustrated circuit is measured by the indicating instrument I, the display, given a suitable scale calibration, will indicate the fault resistance RF on a logarithmic scale which is particularly suitable for measurement. In practice, the base-emitter voltage of the transistor T will be indicated via an impedance converter and a measuring amplifier. If an additionai transistor, not shown in the illustration, but identical to the transistor T, is used for impedance conversion and is thermally coupled to the transistor T so that it assumes the same temperature, it will be possible to compensate for the dependence of the displayed value on the temperature of the transistor T. Special commercial arrangements containing two identical transistors in one casing are particularly suitable to this end.

An illustration of circuit details for the abovedescribed condftioning of the measuring voltage was omitted, since this Is probably known.

Claims

1. A method of suppressing spurious voltage in a measurement on a cable with X d.c. Murray bridge circuit having a stabilized measuring voltage source, wherein the measuring voltage source is stabilized with a low internal resistance for d.c. voltage but with a high internal tfnpedance for a.c. voltage.

2. A method as claimed in claim 1, in which stabilization of the measuring source is performed by means of a series transistor and operational amplifier in polarity opposition, and the amplifier being provided with frequency'dependent feedback by means of a RC network between the output of the transistor and the inverting input of the amplifier so that stabilization of d.c. voltage is fully effective but is cancelled for a.c. voltages above a limiting frequency defined by the RC network.

3. A method as claimed in claim 2, in which measurement of a voltage which depends on the measuring current and is therefore approximately inversely dependent on fault resistance is used as measured value of the fault resistance.

4. A method as claimed in claim 3, in which the measuring voltage for the vault resistance is tapped off between the base and the emitter of the series transistor.

5. A method of suppressing spurious voltage in a measurement on a cable substantially as hereinbefore described with reference to the accompanying drawing.

6. An apparatus for performing a measurement on a cable, comprising a d.c. Murray bridge circuit including a stabilized measuring. voltage source having a relatively low intemal'-irnpedance for direct voltage and a relatively high internal impedance for alternating voltage.

7. An apparatus substantially as hereinbefore described with reference to and as illustrated in the accompanying drawing.