GB2080074A - Improvements in or Relating to Multifrequency Signalling Control Units for Use in Transit Telephone Exchanges of Digital Type - Google Patents

Improvements in or Relating to Multifrequency Signalling Control Units for Use in Transit Telephone Exchanges of Digital Type Download PDF

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Publication number
GB2080074A
GB2080074A GB8121262A GB8121262A GB2080074A GB 2080074 A GB2080074 A GB 2080074A GB 8121262 A GB8121262 A GB 8121262A GB 8121262 A GB8121262 A GB 8121262A GB 2080074 A GB2080074 A GB 2080074A
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code
relating
memory
control unit
unit
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Italtel SpA
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Italtel SpA
Italtel Societa Italiana Telecomunicazioni SpA
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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q1/00Details of selecting apparatus or arrangements
    • H04Q1/18Electrical details
    • H04Q1/30Signalling arrangements; Manipulation of signalling currents
    • H04Q1/44Signalling arrangements; Manipulation of signalling currents using alternate current
    • H04Q1/444Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies
    • H04Q1/45Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling
    • H04Q1/457Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling with conversion of multifrequency signals into digital signals
    • H04Q1/4575Signalling arrangements; Manipulation of signalling currents using alternate current with voice-band signalling frequencies using multi-frequency signalling with conversion of multifrequency signals into digital signals which are transmitted in digital form
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

A multifrequency signalling control unit UCSm comprises first and second frequency discriminators DF, each of which receives from the exchange connection network multifrequency code telephone control signals relating to 32 connections and detects the pair of frequencies utilized for each signal. First and second emitters IV each carry out conversion from 32 codes relating to telephone control signals into as many codes relating to the sum of the pair of characteristic frequencies of each telephone control signal which can be sent to the connection network RC. A level discriminator DL detects the "validity" of each pair of frequencies available at the output of the frequency discriminators DF, a processor EL sends the telephone control signals detected by the level discriminator DL to the central control unit CC and sends the telephone control signals to be transmitted by way of the connection network RC to the emitters IV. <IMAGE>

Description

SPECIFICATION Improvements In or Relating to Multifrequency Signalling Control Units for Use in Transit Telephone Exchanges of Digital Type The present invention relates to a multifrequency signalling control unit which may be used in a transit telephone exchange of digital type comprising a central control unit arranged to control switching of codes supplied to a connection network by way of a plurality of trunks connected to as many switching exchanges.
In order to establish telephone connections, the switching exchanges engaged in each connection have to exchange on trunks suitable information, according to national and international standard procedures, called "signalling codes".
One of the types of codes is the multifrequency code, which is utilized by switching exchanges equipped with special devices (multifrequency registers) for the signal exchange (e.g. selection digits).
This sort of code provides generation of 6 frequencies and coding of each telephone control signal by the emission of 2 of the 6 available frequencies; it is thus possible to identify a control signal from fifteen possible such signals, characterizing the same with a pair of frequencies.
However, national and international procedures foresee the adoption of a plurality of multifrequency signalling sub-codes, which differ in the value of the frequency pair characterizing each telephone control signal as well as in the level at which the pair of frequency is generated.
According to the invention, there is provided a multifrequency signalling control unit for use in a transit telephone exchange of digital type comprising a central control unit arranged to control switching of codes supplied to a connection network by means of a plurality of trunks connected to as many switching exchanges, the multifrequency signalling control unit comprising: first and second interface units for interfacing with the connection network; first and second digital frequency discriminators, each arranged to receive from a respective one of the interface units codes relative to first and second PCM systems, respectively, utilizing signalling of multifrequency type and to supply at the output thereof, for each of the n channels of the system, 6 codes relating to the signal level belonging to the 6 frequencies utilizing by the multifrequency code adopted in each channel; first and second emitters each of whose inputs is arranged to receive, for each of the n channels of a respective PCM system, a code relating to the telephone control signal to be sent to the connection network, and each of which is arranged to forward to the respective interface unit a code relating to the sum, at a considered instant, of two signal samples relating to the pair of characteristic frequencies of the code to be transmitted; a level discriminator, whose input is connected to the outputs of the first and second frequency discriminators and which is arranged to provide at its output, for each of the 2. n input channels, a first code relating to the telephone control signal associated with the two frequencies which exceed a prefixed threshold, together with a second code relating to the validity of the first code; and second code relating to the validity of the first code; and a processor arranged to store codes relating to the telephone control signals concerning the 2. n input channels available at the output of the level discriminator, and to send a first group of the codes to the central control for each of the 2. n channels and a second group of the codes to the emitters when the central control unit generates the procesing phase signal provided for this operation in conjunction with the address wherein data to be forwarded are stored.
It is thus possible to convert multifreerequency signalling sub-codes into a pre-fixed code comprehensible to the device of a digital telephone exchange controlling PCM code switching operations. When the digital exchange receives multifrequency code selection digits, these are translated by the signalling control unit and then sent to the central control unit which, after examining the first group of digits (e.g. the first two or three digits), is capable of directing the ingoing connection towards the telephone exchange of destination, which receives the second group of selection digits in order to allow identification of the subscriber, for whom the connection is destined.
It is also possible to reduce the engagement of the central control unit which merely examines the first group of selection digits for the performance of the routing operation, whereas for the second group of such digits it only needs to perform a storing and sending operation for the signalling control unit from which it received the digits.
A preferred signalling control unit provides means designed to carry out the translation operation and further provides that the central control unit, upon reception of all digits needed to perform routing, sends a signal preventing transmission of further digits to the signalling control unit, as well as a code relative to the outgoing trunk, for which the digits are destined.
The signalling control unit transfers the second group of selection digits, stored in the memory area of the digit memory associated with the ingoing trunk, into a memory area of the digit memory identified by the address generated by the central control unit. Accordingly, the central control unit is only engaged to perform the routing operation, since the second group of selection digits is directly forwarded, from the signalling control unit to the outgoing trunk for which they are destined.
The invention will be further described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a block diagram of a telephone of digital type; Figure 2 is a block diagram of a multifrequency signalling control unit UCSm of Figure 1 constituting a preferred embodiment of the invention; and Figure 3 is a block diagram of a processor EL of Figure 2.
As shown in Figure 1, CTR indicates a transit telephone exchange, which operates according to the time-division principle and is arranged to switch digital signals originating in terminal exchanges CTE" CTE2, CTE .... CTE and sent 2' 3 to the exchange CTR by way of as many trunks.
More particularly, the trunks are connected to a connection network RC, which is further connected to a plurality of signalling control units UCS as well as to a central control unit CC.
The unit CC controls the signalling switching of the units UCS, which perform a translation operation of the signalling code utilized in each trunk into a code comprehensible to the central control unit CC. After reception of the information necessary to establish a connection, the unit CC provides for transferring the codes present in a given time slot of the considered trunk into a prefixed time slot of the trunk associated with the exchange CTE, for which the codes are destined.
UCS, to UCSk indicate the signalling control units designed to pre-process signalling other than multifrequency signalling, whereas UCS ml to UCSmm indicate the signalling control units designed to pre-process the multifrequency signalling.
The case where the terminal exchanges CTE2 and CTE3 employ multifrequency signalling and a given subscriber associated with the terminal exchange CTE2 intends to get in touch with a prefixed subscriber of the terminal exchange CTE3 will be considered. If these exchanges are not of digital type, the input of the exchange CTR must be equipped with PCM multiplexer-demultiplexer devices (not illustrated in Figure 1), which perform the aliocation of the signalling relative to the calling subscriber into a prefixed time slot x of the PCM system.
The unit CC controls switching of codes allocated in phase x into a prefixed time slot Xi of the PCM system, which connects the connection network RC to a unit UCSm arranged to process the multifrequency signalling.
The unit UCSm performs a translation operation of the multifrequency code into the code to be interpreted by the unit CC which, upon examining the first digits dialled by the subscriber associated with the exchange CTE2, detects the information that the subscriber must be connected to the exchange CTE3, so that it supplies the unit UCSm with the address of a prefixed time slot Yl of the PCM multiple from the unit UCSm, to which system are to be allocated the selection digits to be send to the exchange CTE3, so as to allow identification of the called subscriber.By means of the unit RC, the unit CC therefore controls switching of the codes allocated in the time slot Y,, into a time slot y of the PCM multiple, which is associated with the terminal exchange CTE3. Each unit UCSm is connected to the connection network RC by way of two PCM multiples, thus being arranged to process the signalling relative to 60 simultaneous connections.
Figure 2 is a block diagram of a given unit UCSm, which provides first and second interface units IN, and IN2 with the connection network, each of which is associated with a respective PCM multiple by way of which the signalling relative to 30 connections is received or transmitted.
The codes relating to the ingoing signalling are supplied, by means of one of the units IN, to a respective frequency discriminator DF, which includes 6 digital filters FD .... FDe tuned to 6 frequency values provided for coding each telephone control signal. The inputs of the filters FD receive, according to the time-division principle, the codes relating to the 30 signal samples relative to as many telephone control signals.
At the output of the filters FD there are available, for each of the 30 time slots, 6 codes S, each of 11 bits, relating to as many signal samples of which, in the absence of errors, only two should relate to a signal level such as to exceed a reference level.
The outputs of the filters FD are connected to a multiplexer MT which, during the time interval of each timing phase, is arranged to transfer the six codes to as many lines of a sample memory MC havinq a capacity 30.6.11.
The contents of the memory are updated every 2m/sec. The outputs of the two frequency discriminators DF, and D F2 are supplied to a level discriminator DL, which basically consists of a microprocessor which inspects the cells of the memories MC, and MC2 and provides for comparing the 6 codes relative to each control signal with a reference code. After detecting the pair of frequencies exceeding the reference threshold, the first group of four outputs of the discriminator DL generates a code relating to the validity of the identified control signal. In fact, a telephone control signal is only considered as valid when only 2 of the 6 frequencies exceed the threshold, as well as when the pair of frequencies is recognized as present for a time not shorter than a prefixed length.
The codes available at the output of the level discriminator DL reach a criterion memory provided in the processor EL having a capacity 60.8, in the memory cells of which there are stored telephone control signals available in each* of the 60 time slots at the considered instant.
After detecting the validity of the telephone control signal available at the first output of the discriminator DL, the processor EL provides for storing the code relating to the control signal in a memory area associated with the considered time slot. The telephone control signals relating to the same time slot are stored by the processor EL in further lines of the same memory area.
In the case where the telephone control signals are formed by selection digits, the processor EL, together with the storing operations, provides for sending such selection digits to the central control unit CC which, after examining the first selection digits relative to a given time slot, supplies the processor EL with the signal of the processing phase by which the remaining selection digits have to be sent to emitters IV, and 1V2.
The inputs of the emitters receives the codes relating to the telephone control signal to be sent during each of the 30 time slots relative to the two PCM systems from unit UCSm.
The emitters IV provide for converting each of the codes into a pair of codes, relating to signal samples of the two frequencies arranged to code the telephone control signal in question, which are summed and sent to the connection network RC by way of the corresponding interface unit IN.
The central control unit CC further controls the connection network RC in order to determine the sending of the remaining selection digits to the exchange CTE, for which they are destined.
Figure 3 is a block diagram of the processor EL of Figure 2, comprising a logic and arithmetic unit ULA which is associated with a data bus, connected to the following units: an interface unit IRC, arranged to receive data from the central control unit CC and comprising a memory consisting of two sections, each comprising 64 memory lines and each line being arranged to store 8 bits. The first section is arranged to perform the simultaneous storage of two telephone control signals on each memory line, whereas the corresponding line of the second section is arranged to store a code relating to the type of control signal stored on the first section.
The memory line at which the information is to be stored is identified by an address which is supplied by the unit CC, too; an interface unit ITC designed to send data to the central control unit CC, and comprising a pair of registers, each being arranged to store 8 bits.
The first register is arranged to perform the simultaneous storage of two telephone control signals, whereas the second register stores a code relating to the type of control signal present in the first register; an interface unit IDL for the level discriminator DL comprising the previously mentioned criterion memory; an interface unit IIV for the emitters comprising a memory having 64 lines, each line being arranged to store the 4 bits relating to the telephone control signal to be sent to a corresponding outgoing register; a data memory MDA comprising 64 memory areas, each having 1 6 lines and each line being arranged to store 8 bits.The memory MDA is arranged to store telephone controls signals other than the selection digits (e.g. control signal of engagement); a digit memory MCI comprising 64 memory areas, each comprising 16 lines and each line being arranged to store 4 bits, for storing the selection digits; an outgoing register address memory MRU comprising 64 memory lines, each line being arranged to store 6 bits, for storing the address of the processing phase (outgoing register) bound to generate the selection digits relating to each time slot; a reading pointer PUL consisting of a memory comprising 64 lines, each line arranged to store 4 bits, for storing the reading address of one of the 1 6 memory lines comprises in each memory area of the memories MDA and MCI; and a writing pointer PUS comprising a memory having 64 lines, each line being arranged to store 4 bits, for storing the writing address of one of the 1 6 memory lines comprises in each memory area of the memories MDA and MCI.
The input of the unit ULA further receives information available at the output of a programme memory MEP, which is addressed by the binary configuration available at the output of an address memory MEI.
The input of the memory MEI is concerned to a scanner SCA which provides for sequentially scanning the addresses of memories associated with the 64 processing phases.
The units MDA, MCI and PUS are addressed by the binary configuration available at the output of a multiplexer MX, a first input of which is connected to the output of the scanner SCA and a second input of which connected to the output of the memory MRU. The multiplexer MXr is controlled by the output of a decoding unit DC, whose input receives the messages available at the output of the memory MEP.
The unit DC also controls a second multiplexer MX2, whose inputs are connected to the outputs of the units PUL and PUS in order to address the digit memory MCI whenever a reading and a writing operation, respectively, must be performed.
The unit ULA is further associated with an accumulator memory MAC arranged to perform temporary data storage, as well as with a time memory MTM arranged to perform counting of prefixed markers of time for each processing phase.
There will now be described the procedure according to which telephone control signals are exchanged by means of the processor EL between the central control unit CC and the receiving and transmitting devices of the unit UCS m In particular, there will now be considered the case in which a given phase 4x is engaged by the central control unit CC for the control of ingoing telephone control signals, supporting that at line of of unit ID L there will be available a first code relating to a selection digit, which is associated with a code relative to validity of the first code.
When the scanner SCA provides for scanning the memory line of the unit IDL associated with the phase Xx, the unit ULA examines the validity code; if the examination is positive, the unit ULA transfers the code relating to the selection digit into the memory area of the digit memory MCI associated with the phase Xx.
Considering that each of the 64 areas of the memory comprises 1 6 memory lines, the line at which the first digit must be stored is identified by the contents of the phase fx of the writing pointer PUS. When the emission of the two characteristic frequencies of the first selection digit has ceased, the memory cells of the unit IDL associated with the phase Xx are reset, and when the level discriminator detects the presence of the second selection digit, it then transfers the relative code into the line associated with phase fx together with the validity code.
During the following scanning cycles of the memory line associated with the phase Xx of the unit IDL and when the unit ULA detects the presence of a code relating to the validity of the second selection digit, it controls transfer of the digit into the area of the memory MCI associated with the phase bx after having increased by one unit the contents of the phase Xx of the writing pointer PUS. The writing pointer PUS therefore addresses the memory line following the one at which the first selectin digit is stored. The remaining selection digits are written by the memory MCI according to procedures analogous to those described and such procedures are valid for each of the remaining 63 processing phases.
While performing storage operations of the selection digits in the digit memory MCI, the transfer of such digits to the central control unit CC is started. Such a transfer is carried out according to suitable instructions recognized by the decoder DC, which causes the emission, by means of the multiplexer My2, of the binary configuration available at the output of the reading pointer PUL.
When phase fx is scanned by SCA, there occurs the reading of the memory line identified by the address in the phase 5x of pointer PUL and the contents of the memory line thus identified are then transferred by means of the data bus into the cells of the register forming the unit ITC. The unit ULA provides for associating the code relative to the selection digit with a code relative to the type of control signal which is in the transfer phase.
The unit ITC is arranged so as to allow the simultaneous sending of two selection digits to the unit CC. At the output of the unit TC is available a first code comprising 8 bits relating to the pair of selection digits and a second code comprising 8 bits relating to the kind of code available on the first 8 outputs.
After examining the first two or three selection digits, the unit CC is able to route the connection present in the considered trunk towards the switching exchange CTE for which the connection is destined.
The central control unit CC only processes the first selection digits for the performance of the aforesaid routing, and emits an inhibition control preventing the transmission of further digits in replay to reception of the last useful digit for routing.
It is thus avoided that the remaining digits be sent to the unit CC, which would otherwise store them and then send the same again to the unit UCSm. Together with the aforesaid inhibition control, the unit CC generates a code comprising 6 bits relating to the address Y of the outgoing register to which the selection digits are to be sent.
The code is stored in line Y of the outgoing register memory MRU and, when the unit SCA scans the memory line, the code stored therein is transferred to the input of the multiplexer MX,.
The reception of the inhibition control involves the identification of a set of instructions in the operative code of which is provided a bit which assumes a prefixed logical value. This event is detected by the decoding unit DC which determines the emission, by means of the multiplexer MX, of the code available at the output of the unit MRU.
The set of instructions is not therefore performed on data identified by the address available at the output of the scanner SCA, but is carried out on data identified by the address available at the output of the unit MRU.
During the phase 6xt the selection digits in the memory area associated with the phase x of the memory MCI are therefore transferred into the memory area associated with the phase by of the same memory.
Upon transferring some selection digits, it is possible for the unit ULA to start the emission of selection digits from the memory area associated with the phase sby of MCI towards the ingoing register associated with the phase XyR To this purpose, during the phase z5y and after the unit CC has supplied the writing pointer with the address of the first digit to be withdrawn, the sequential transfer of the selection digits is carried out in the memory line associated with the phase by of the unit IIV, thus progressively increasing the contents of the unit PUL.
Every code comprising 4 bits relating to a given selection digit is then converted inside one of the units IV (cf. Figure 2) into pair of codes relating to signal samples relative to the two frequencies provided for coding the considered digit.
The unit UCSm is therefore arranged to perform translation of multifrequency codes into the code comprehensible to the unit CC and further to reduce to a minimum the engagement of the unit CC.

Claims (5)

Claims
1. A multifrequency signalling control unit for use in a transit telephone exchange of digital type comprising a central control unit arranged to control switching of codes supplied to a connection network by means of a plurality of trunks connected to as many switching exchanges, the multifrequency signalling control unit comprising: first and second interface units for interfacing with the connection network; first and second digital frequency discriminators, each arranged to receive from a respective one of the interface units codes relative to first and second PCM systems, respectively, utilizing signalling of multifrequency type and to supply at the output thereof, for each of the n channels of the system, 6 codes relating to the signal level belonging to the 6 frequencies utilizing by the multifrequency code adopted in each channel; first and second emitters each of whose inputs is arranged to receive, for each of the n channels of a respective PCM system, a code relating to the telephone control signal to be sent to the connection network, and each of which is arranged to forward to the respective interface unit a code relating to the sum, at a considered instant, of two signal samples relating to the pair of characteristic frequencies of the code to be transmitted; a level discriminator, whose input is connected to the outputs of the first and second frequency discriminators and which is arranged to provide at its output, for each of the 2. n input channels, a first code relating to the telephone control signal associated with the two frequencies which exceed a prefixed threshold, together with a second code relating to the validity of the first code; and second code relating to the validity of the first code; and a processor arranged to store codes relating to the telephone control signals concerning the 2. n input channels available at the output of the level discriminator, and to send a first group of the codes to the central control for the each of the 2. n channels and a second group of the codes to the emitters when the central control unit generates the processing phase signal provided for this operation in conjunction with the address wherein data to be forwarded are stored.
2. A control unit as claimed in ciaim 1, in which the processor includes a logic and arithmetic unit having a data bus connected to the following units.
a first unit arranged to receive data from the central control unit and comprising a memory comprising 2. n lines, each line being arranged to store the code relating to a telephone control signal as well as a code relating to the type of the stored control signal; a second unit arranged to transmit data to the central control unit and formed by a register arranged to store the code relating to the type of the stored control signal; a third unit arranged to receive data from the level discriminator and comprising a memory comprising 2. n lines, each arranged to store the code relating to the telephone control signal as well as a code relating to the type of the stored control signal; and a fourth unit arranged to forward data to the emitters, and comprising a memory comprising 2. n lines, each line being arrangd to store a code relating to a telephone control signal.
3. A control unit as claimed in claim 1 or 2, in which the telephone control signals relating to selection digits in the processor are stored in a digit memory comprising 2. n memory areas, each providing a number of lines not less than the highest number of digits which can be dialled by a subscriber and each line being arranged to store a code relating to a selection digit, the address of the memory area where a writing-reading operation must be performed being available at the output of a first multiplexer, whose first input is connected to a scanner and whose second input is connected to an outgoing register memory comprising 2. n memory lines, each line being arranged to receive the address of the outgoing register generated by the central control unit, the memory line inside the area identified by the address available at the output of a second multiplexer, whose first input is arranged to receive the code available at the output of a writing pointer, and whose second input is arranged to receive the code available at the output of a reading pointer comprising as many memories with 2. n lines scanned by the scanner.
4. A multifrequency signalling control unit substantially as hereinbefore described with reference and as illustrated in the accompanying drawings.
5. A digital transit telephone exchanged including a control unit as claimed in any one of the preceding claims.
GB8121262A 1980-07-09 1981-07-09 Improvements in or Relating to Multifrequency Signalling Control Units for Use in Transit Telephone Exchanges of Digital Type Withdrawn GB2080074A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23332/80A IT1148885B (en) 1980-07-09 1980-07-09 MULTIFREQUENCY TYPE SIGNALING CONTROL UNIT, OF PARTICULAR APPLICATION IN TELEPHONE UNITS FOR NUMERIC TYPES OF TRANSIT

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GB2080074A true GB2080074A (en) 1982-01-27

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GB8121262A Withdrawn GB2080074A (en) 1980-07-09 1981-07-09 Improvements in or Relating to Multifrequency Signalling Control Units for Use in Transit Telephone Exchanges of Digital Type

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BR (1) BR8104310A (en)
DE (1) DE3126981A1 (en)
FR (1) FR2486748A1 (en)
GB (1) GB2080074A (en)
IT (1) IT1148885B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0184984A1 (en) * 1984-11-30 1986-06-18 Ascom Autophon Ag Evaluating device for a pulsating tone signal

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT284917B (en) * 1968-07-22 1970-10-12 Siemens Ag Circuit arrangement for the reception of different characters transmitted in uninterrupted sequence in telecommunications, in particular telephone systems
DE2045144A1 (en) * 1970-09-11 1972-03-16 Siemens Ag Frequency selective signal receiver
DE2157559C3 (en) * 1971-11-19 1978-05-03 Standard Elektrik Lorenz Ag, 7000 Stuttgart Multi-frequency code signal receivers for telecommunications, in particular telephone systems
FR2296221A1 (en) * 1974-12-27 1976-07-23 Ibm France SIGNAL PROCESSING SYSTEM
IT1072242B (en) * 1976-12-17 1985-04-10 Cselt Centro Studi Lab Telecom PROCEDURE AND DEVICE FOR THE RECOGNITION OF TELEPHONE SIGNALS IN MULTIFREQUENCY CODE CONVERTED IN NUMERICAL FORM
US4133979A (en) * 1977-01-26 1979-01-09 Trw, Inc. Multifrequency sender/receiver in a multi-time slot digital data stream

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0184984A1 (en) * 1984-11-30 1986-06-18 Ascom Autophon Ag Evaluating device for a pulsating tone signal
CH672968A5 (en) * 1984-11-30 1990-01-15 Autophon Ascom Ag

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FR2486748A1 (en) 1982-01-15
BR8104310A (en) 1982-03-23
IT8023332A0 (en) 1980-07-09
DE3126981A1 (en) 1982-03-11
IT1148885B (en) 1986-12-03

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