GB2069264A - Data compression apparatus - Google Patents
Data compression apparatus Download PDFInfo
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- GB2069264A GB2069264A GB8039601A GB8039601A GB2069264A GB 2069264 A GB2069264 A GB 2069264A GB 8039601 A GB8039601 A GB 8039601A GB 8039601 A GB8039601 A GB 8039601A GB 2069264 A GB2069264 A GB 2069264A
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/72—Signal processing specially adapted for physiological signals or for diagnostic purposes
- A61B5/7232—Signal processing specially adapted for physiological signals or for diagnostic purposes involving compression of the physiological signal, e.g. to extend the signal recording period
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/24—Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
- A61B5/316—Modalities, i.e. specific diagnostic methods
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
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Abstract
The data sample of each exclusive and successive group of data samples which differs most in amplitude from the average amplitude of the previous group of data samples is selected for display by calculating and storing in latch L5 the average value of the immediately preceding group of samples and comparing each new sample with the stored value to determine that which shows the largest valuation. <IMAGE>
Description
SPECIFICATION
Data compression apparatus
This invention is concerned with improvements in or relating to data compression apparatus.
Equipment for monitoring physiological functions, such as the electrical activity of the heart, often outputs digital data samples at a rate that is greater than economical cathode ray tube displays or other monitoring apparatus can accommodate. For example, the digital data samples may occur every two milliseconds and the display apparatus may only be capable of displaying a sample every eight milliseconds, thus requiring a four-to-one data compression. One way of providing the required compression of the data in this situation would be to average each successive group of four data samples. Unfortunately, however, this reduces the amplitude of narrow pace pulses that are of utmost importance to a point where they may become indistinguishable from noise.
The present invention provides apparatus for compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, comprising an input to which data samples representing successive values of data can be applied; an output; means coupled to said input for deriving a representation of an average of the values represented by data samples of each group of data samples of a plurality of consecutive groups of data samples; means for deriving a representation of the absolute value of the difference between the value represented by each data sample of each group and the average of the values represented by the data samples of the previous group; and means for conducting to said output a sample from each group for which said absolute difference value is the greatest.
The present invention further provides a method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, the method comprising the steps of producing an average value of the data sample values in a group of samples; comparing said average value of said group with the values of the data samples in a preceding group to determine the absolute values of the differences between said average value and said values of said data samples in said preceding group; repeating the above steps for each successive group; and transmitting that sample of each successive group having the greatest absolute value of difference associated therewith.
In accordance with the embodiments of this invention which are hereinafter described, the absolute difference between the value of each data sample in a group of data samples and the average value of the previous group of data samples is determined and that data sample which has the largest absolute difference is selected as the display sample. The data samples are supplied to an input to which means is coupled for deriving a representation of the average value of the data samples in each group; means is provided for deriving the absolute difference between the value of each sample of the next group of data samples and the average value for the previous group, and means is provided for making that data sample for which the absolute difference is greatest available as a display sample for the display or other monitoring apparatus.The number of samples in a group equals the data compression required, e.g., in the example given above in which a compression of four4o-one was necessary, the number of data samples in each group would be four. Other compression ratios can also be used.
There now follows a detailed description which is to be read with reference to the accompanying drawings of two embodiments of the present invention which have been selected for description to illustrate the invention by way of example and not by way of limitation.
In the accompanying drawings:
Figure 1 illustrates a number of typical data samples from which an electrocardiogram can be formed;
Figure 2 illustrates the display samples that would be produced from the data samples of Figure 1 if each display sample is the average value of each exclusive group of four data samples;
Figure 3 illustrates the data samples of Figure 1 that would be selected as display samples in accordance with this invention;
Figure 4 is a block diagram of a circuit that selects data samples to be used as display samples in accordance with this invention in which the absolute difference between all data samples of a group and the average of the data samples of the previous group are made simultaneously available before the data sample having the largest absolute difference is selected as the display sample;;
Figure 4A illustrates signals used in controlling the operation of the circuit of Figure 4;
Figure 5 is a block diagram of a circuit that selects data samples to be used as display samples in accordance with this invention in which the absolute differences between each data sample of one group and the average of the data samples of the previous group are made successively available and successively compared before selecting the data sample having the largest absolute difference as the display sample;
Figure 5A illustrates signals used in controlling the operation of the circuit of Figure 5;
Figure 6 is a flow chart illustrating one way in which the data sample that is to be the display sample may
be selected by a processor or computer in accordance with this invention;
Figure 7 illustrates an ECG wave formed from actual data samples;;
Figure 8 illustrates an ECG wave formed by using the average values of each group of four actual data samples; and
Figure 9 illustrates an ECG wave formed by selecting a data sample of each group of four as a display sample in accordance with this invention.
In the following detailed description of embodiments of this invention, the terms "data sample" and "display sample" will refer to the actual values.
In Figure 1, each data sample is indicated by an "0", successive exclusive groups of four data samples are respectively encircled by separate lines 2,4,6,8 and 10, and the average of the data samples in each group is indicated by points 2', 4', 6', 8' and 10' respectively. The data point Pin the group 6 represents a pace pulse.
Figure 2 illustrates the electrocardiogram that would result if the data is compressed by using the average value of each group of four data samples, i.e., points 2', 4', 6', 8', and 10', as the display samples. Note that the pace pulse P is represented by the display sample 6' of the group 6 and is greatly attenuated.
In accordance with this invention, one data sample in each of the groups 2,4,6,8 and 10 is selected as a display sample. This is the data sample that differs from the average of the previous group of data samples by the greatest absolute amount. In Figure 1, the data samples, including those that are selected as display samples in accordance with this invention, are indicated by an "X" within the "0"; those selected as display samples are separately plotted in Figure 3 and joined by a solid line. It can be seen that the pace pulse P is selected as a display sample.In view of the fact that the data sample of a group that is to be the display cannot be selected until all data samples of the group have been examined, the data sample that has been selected as a display sample is supplied to the display means at a time between the last data sample of one group and the first data sample of the next, as indicated by the X's in Figure 3 that are joined by a dashed line.
Reference is now made to the circuit of Figure 4 that selects the data samples of each group of four that are to be the display samples in accordance with this invention. The means for deriving the average value of each group of data samples is as follows. Analog data, such as the output of an ECG machine, is supplied from a source 12 to an analog-to-digital converter 14 that provides digitized data samples at its output at a rate and duration determined by the triggering pulses S of Figure 4A. Only one data line is shown, but any desired number could be used. The triggering pulses S are provided by a pulse generator 16, which may be a digital counter. The digitized data samples at the output of the AID converter 14 are loaded in a latch L1 that is connected in series with latches L2, L3 and L4.The Q output of each of these latches is connected to the D input of the next latch in the series so as to form a shift register, and all the latches are strobed by the pulses
S. The inputs of an adder 18 are respectively connected to the 0 outputs of the latches L1 and L2; the inputs of an adder 20 are respectively connected to the output of the adder 20 and the 0 output of the latch L4. The output of the adder 22, except for the two least significant bits, is connected to the D input of a latch L5 SO as to divide the output of the adder 22 by four. Thus, after four timing pulses Sofa first group I of Figure 4A, the successive data samples A, B, C and D of that group are at the outputs of the latches L4, L3, L2 and L1 respectively, and their sum appears at the output of the adder 22.One-fourth of this sum, or the average of the data samples A, B, C and D, is loaded into the D input of the latch Ls. This average value is transferred to the 0 output of the latch L5 by a pulse O, Figure 4A, that is provided by the pulse generator 16. Inasmuch as the pulses 0 occur between the last pulse S of a group and the first pulse S of the next group, the average value appearing at the Q output of the latch L5 during the group II is the average value of the data samples of the group I.
Transfer of a data sample selected in a manner to be described to a display sample output bus 24 and a display means 25 is accomplished as follows. The data samples at the 0 outputs of the latches L1, L2, L3 and
L4 are also respectively present at the D inputs of the latches L6, L7, L8 and Lg by virtue of connections therebetween, and all the 0 outputs of the latches L6, L7, L8 and Lg are connected to the display sample output bus 24. The outputs of AND gates 6', 7', 8' and 9' are respectively connected to the trigger inputs of the latches L6, L7, L8 and Lg, and one input of each AND gate is connected by a bus 26 to the output of the pulse generator 16 at which the pulses 0 of Figure 4A appear.One of the other inputs d', c', b' and a' of the respective AND gates 6', 7', 8', and 9' is made to have a high state during a pulse Oso that the output of that
AND gate will become high and trigger the latch to which it is connected. The data sample at the input of that latch is the display sample, and it is transferred to the 0 output and via the display sample output bus 24 to the display means 25.
Derivation of the absolute values of the differences between each data sample of one group and the average value of the data samples of the previous group is performed by the following parts of the circuit.
One set of inputs of subtractors 27, 28, 30 and 32 are respectively connected to the Q outputs of the latches
L1, L2, L3 and L4 at which the data samples appear, and the other inputs of these subtractors are connected to the Q output of the latch L5 at which the average value of the previous group of data samples appears. Thus, when the data samples D', C', B' and A' of group II are respectively at the outputs of L1, L2, L3 and L4, the differences between these data samples and the average value of the data samples of group I respectively appear at the outputs of the subtractors 27, 28, 30 and 32. The absolute values of these differences, D'-X,
C'-X, B'-X and A' -X are respectively derived by absolute value circuits 27', 28', 30' and 32' that are connected to the outputs of the subtractors 27, 28, 30 and 32 respectively.
The selection of the data sample of a group causing the largest absolute difference is performed by the following circuit components. The output of the absolute value circuit 27' is connected to the X input of a comparator 34 as well as to an input terminal 6 of a switch S1, and the output of the absolute value circuit 28' is connected to the Y input of the comparator 34 as well as to an input terminal p of the switch S1. The output 36 of the comparator 34 is connected to a control terminal 38 of the switch S1. When the value at the input X of the comparator 34 is less than the value at its Y input, the output 36 is in a high state and the output 0 of the switch S is connected to the input terminal p.The output of the absolute value circuit 30' is connected to the X input of a comparator 40 as well as to an input terminal p of a switch SSI and the output of the absolute value circuit 32' is connected to the Y input of the comparator 40 as well as to an input terminal p of the switch S2. The output 42 of the comparator 40 is connected to a control terminal 44 of the switch 52. When the value at the input X of the comparator 40 is less than the value at its Y input, the output 42 is in a high state and the output 0 of the switch S2 is connected to the input terminal p. The outputs 0 of the switches S, and S2 are respectively connected to the X and Y inputs of a comparator 46 which has an output 48.As is the case with the other comparators, the output 48 is in a high state if the value at the input X is less than the value at the input Y.
The logic circuits now to be described operate in response to the outputs of the comparators 34,40 and 36 to raise the state of one of the respective inputs a', b', c', and d' of the AND gates 9', 8', 7' and 6' so that it will trigger the associated latch and cause it to transfer the data sample at its input to the data sample output bus 24 when the output strobing pulse 0 occurs. This data sample is then the display sample. The outputs of
AND gates 9", 8", 7" and 6" are respectively connected to the inputs a', b', c' and d' of the AND gates 9', 8', 7', and 6'.The inputs of the AND gate 9" are respectively connected to the outputs 42 and 48 of the comparators 40 and 46; the inputs of the AND gate 8" are respectively connected to the output 48 of the comparator 46 and to the output 42 of the comparator 40 via an inverter 50; the inputs of the AND gate 7" are respectively connected to the output 36 of the comparator 34 and via an inverter 52 to the output 48 of the comparator 46; and the inputs of the AND gate 6" are respectively connected to the output 36 of the comparator 34 via an inverter 54 and via the inverter 52 to the output 48 of the comparator 46.
The operation of the circuit of Figure 4 for the purpose of selecting a sample from Group II will now be explained by reference to the graphs of Figure 4A. Assume that the values of the data samples occurring during consecutive exclusive groups of Samples I and II are respectively in the order A, B, C, and D and A', B',
C', and D' as illustrated in Figure 4A. After the fourth data sample D of Group I has been received, the data samples A, B, C and D are respectively at the outputs of the latches L4, L3, L2 and L1, and the output of the adder 22 is the sum of A, B, C and D. Because the two least significant bits of this sum are not conducted to the D input of the Latch L5, the value at its D input is the average of the data samples of Group I or (A+B+C+D)/4 that is indicated by the dashed line 56.This is the condition that prevails when an output strobing pulse 58 of Group I occurs. The output strobing pulse 58 triggers the latch L5, causing the average value at its D input to be transferred to its 0 output and thus at one input of each of the subtractors 27,28,30 and 32. This average value remains at the 0 output of the latch L5 during the reception of the next group II of data samples A', B', C' and D' and until the output strobing pulse 60 of the Group II occurs.
After the data samples A', B', C' and D' of the group II have arrived and just prior to the occurrence of the output strobing pulse 60, the values at the outputs of the latches L4, L3, L2 and L1 are A', B', C' and D' respectively as indicated on the drawing. These values are respectively applied to inputs of the subtractors 32,30,28 and 27, and the average value X (A+B+C+D)14 of the data samples of group I, as represented by the dashed line 56 of Figure 5A, is applied to the other inputs of the subtractors are respectively A'-X, B'-X, C' -X and D'-y. The absolute values IA'-ThX and IB'- are derived by the absolute value circuits 32' and 30' and are respectively applied to the Y and X inputs of the comparator 40. Since, in accordance with the data samples illustrated in Figure 4A, IA'~X > B'-ThX, the output of the comparator 40 will be in a high state as indicated and the output 0 of the switch S2 will be connected to the input terminal p so as to conduct the value IA'-X1 to the Y input of the comparator 46.
The outputs of the subtractors 27 and 28 are respectively D'-Xand C'-X and their absolute values [ D'-R and IC'- are derived by the subtractors 27' and 28' and respectively applied to the X and Y inputs of the comparator 34. Inasmuch as fl D'-D'-mX > IC' -X1, the output 36 of the comparator 34 is low as indicated so as to cause the output 0 of the switch S1 to be connected to the input terminal 4 and thereby conduct the value ID'- to the X input of the comparator 46. In this example, the value IA'- is greater than the value iB'-Ni so that the output of the comparator 46 is low as indicated.
With the states indicated at the outputs 36, 48 and 42 of the comparator 34,46, 40 being (-), (-) and (+) respectively, the states applied to the inputs of the AND gates 6", 7", 8" and 9" will be as indicated so that the output of the AND gate 6", which is connected to the input d' of the AND gate 6', is the only one that has a high state. This enables the latch L6 to transfer the value of the data sample D'from its D input to its 0 output when the output data strobing pulse 60 occurs. At the same time, the average value (indicated by the dashed line 62) of the data samples A', B', C' and D' that is present at the D input of the latch L5 is transferred to the 0 output so as to be ready for comparison with the data samples of the next group, not shown.
Alternative Circuit
In the circuit of Figure 4 just described, the absolute differences between each data sample of one group and the average of the values of the data samples of the previous group were made simultaneously available and compared at one time. In the circuit of Figure 5, the absolute differences between the data samples of one group and the average of the data samples of the next previous group are made available in sequence and are compared successively so as to determine the absolute difference.
Turning now to the details of Figure 5, it is seen that the analog signals are supplied by a source 80 to an
AID converter 82 having its output coupled to the D input of a latch Lilo. In the interest of simplicity, only one digital data line is shown, but as many as required can be used. A signal generator 84 supplies timing pulses Si, S2, Sa, s4. 55 and se as illustrated in Figure 5A.The broad pulses of each of the signals Si, S2, sa, Sq and s6 could be provided by connecting the inputs of an OR gate to appropriate outputs of a Johnson counter, and the narrow pulses could be provided by connecting an astable multivibrator at a selected output of the counter. The signal sl is applied to the AID converter 82 and to the latch Lilo.
The Q output of the latch Lio is coupled to the following means for deriving the average value of the data samples in each group. One input 86 of an adder 88 is connected to the 0 output of the latch Lilo, and the output of the adder 88 is connected to the D input of a latch Lii is connected to one input of an AND gate 90.
Only one AND gate 90 is shown, but there would be as many as there are data lines. A signal 53 is applied to the other input of the AND gate 90, and its output is connected to the D input of a latch L12~ A signal S4 is applied to the trigger input of the latch L12, and its 0 output is connected to the other input 92 of the adder 88 as well as to the D input of a latch L13.
Operation of the data sample averaging means is as follows. Assume that the latch L12 has been cleared so that its 0 output is zero when the first data sample of a group of samples arrives at the input 86 of the adder 88 in response to the application of a pulse of the signal s, to the latch Lilo. The output of the adder 88 then equals the value of the first data sample and is connected to the D input of the latch L11. Before the next pulse of the signal s, occurs, a pulse such as 93 of the signal 53 triggers the latch Lii so as to transfer the value of the first data sample at its D input to its 0 output and thus to one input of the AND gate 90.Because the signal S3 that is applied to the other input of the AND gate 90 is in a high state during the entire time that samples of a group are received, the first data sample passes through the adder to the D input of the latch L12 This data sample is then transferred to the 0 output of the latch L72 and therefore to the input 92 of the adder 88 when the latch L72 is triggered by a subsequent pulse 94 in the signal 54. As seen in Figure 5A, the latter occurs between a pulse in the signal s2 and the time when the next pulse of the signal si occurs.When the second data sample arrives at the input 86 of the adder 88 in response to the next pulse in the signal sl, it is added to the first data sample that has been applied to the input 92 of the adder 88 from the Q output of the latch L12s The output of the adder 88 now has a value equal to the sum of the first and second data samples. Thus, after the last data sample of a group of four samples is received, a value equal to their sum appears at the 0 output of the latch L12s All but the two least significant bits of the sum value are passed to the D input of the latch Lla so that the value at its D input is the average value of the four data samples of the group.
After each group of data samples, the 0 output of the latch L12 is set to zero and the average value is retained at the Q output of the latch L73 for comparison with the data samples of the next group in the following manner. After the last pulse 95 for a group occurs in the signal so, the signal 53 drops to a low state for a short time, as indicated at 96 of Figure 5A, so as to cause the output of the AND gate 90 and hence the D input of the latch L12 to have a zero value.While the signal 53 is at the low state 96, a short pulse 97 appears in the signal s4 so as to trigger the latch L12 and transfer the zero value from its D input to its Q output and to the input 92 of the adder 88, thereby making the circuit ready to add the next group of data samples as just described. Before L12 is set to zero, a narrow pulse 98 in the signal 55 causes the latch L13 to transfer the average value of the samples of the group to its 0 output, where it will remain while data samples of the next group arrive and until the next narrow pulse 98 of the signal 55 occurs.
The means for deriving the absolute value of the difference between each data sample of a group and the average value of the data samples of the previous group is comprised of a subtractor 100 and an absolute value circuit 102 connected to the output of the subtractor 100. One input of the subtractor 100 is connected to the Q output of the latch Lio so as to receive the data samples of the new group as they arrive, and the other input is connected to the 0 output of the latch L13 so as to receive the average value of the data samples of the previous group. The output of the subtractor 100 thus successively represents the difference between each data sample and the average value of the previous group of data samples, and the absolute value of the difference is provided by an absolute value circuit 102.
The following means are used for identifying the data sample of one group that differs the most from the average value of the data samples of a previous group and for conducting it to an output 104 that is connected to a display means 106. The output of the absolute value circuit 102 is applied to an input 108 of an
AND gate 110 as well as to the Y input of a comparator 112. Only one AND gate 110 is shown, but there would be as many as there are data lines. The signal 53 is applied to the other input 114 of the AND gate 110, and the output of the AND gate 110 is connected to the D input of a latch L14. The 0 output of the latch L14 is connected to the X input of the comparator 112. The comparator 112 produces a high state on its output lead 116 if the signal at its X input represents a value less than the value represented by the signal at its Y input.
The output lead 116 is connected to the D input of latch L17, and the Q output 121 of L17 is connected to one input of an OR gate 118. A signal 52 is connected to the trigger input of L17. A signal ss having a pulse 119 that is opposite in polarity to the pulse 96 of the signal S3 is applied to the other input of the OR gate 118. The output of the OR gate 118 is applied to the other input. The output of the AND gate 120 is connected to the trigger input of a latch L,4, which has its D input connected to the output of the AND gate 110 and its 0 output connected to the X input of the comparator 112. The output of the AND gate 120 is also connected to the trigger input of a latch L15 having its D input connected to the Q output of the latch Lilo, and its 0 output connected to the D input of a latch Lis. The Q output of the latch L16 is connected to the data sample output 104, and the latch L16 is triggered by the signal 55.
The manner in which the portion of the circuit just described operates to select the data sample that is to be the display sample of a group is as follows. Assume that the 0 output of the latch L14 and thus the X input of the comparator 112 have been set to zero in a manner to be described. When the first data sample causing an absolute value that is other than zero arrives at they input of the comparator 112, the output lead 116 acquires a high state so that the Q output of latch L17 can be triggered high when a pulse such as 93 of signal S2 arrives shortly thereafter. Because the signal s6 is low when pulse 93 occurs, the output of the OR gate 118 goes high as does the input of the AND gate 120 to which it is connected.Thus, when a high state pulse such as 94 from signal S4 occurs, both inputs of the AND gate 120 are high, and its output goes high so as to trigger the latch L14. Prior to the time when the latch L14 is triggered, the absolute value at the output of the circuit 112 is present at the D input of the latch L14 because the high state of the signal 53 allows it to pass through the AND gate 110. Therefore, when the latch L14 is triggered, the absolute value that caused it is transferred to the X input of the comparator 112 where it is compared with the absolute value caused by the next data sample. If the latter absolute value is greater than the previous one, the latch L14 is triggered; but if it is not greater, nothing happens.The latch L15 is also triggered by the AND gate 120 so that it transfers the data sample corresponding to a larger absolute value from its D input to its 0 output and to the D input of the latch L16. After the absolute values of all data samples of the group have been compared, the data sample that differs the most from the average value of the preceding group of data samples will be at the D input of the latch L16. When the latch L16 is triggered by the pulse 98 of the signal 55, the data sample is passed via the lead 104 to the display means 106.
Resetting the X input of the comparator 112 to zero so as to be ready for the next group of data samples is done as follows. After the last pulse 95 of the signal s, has caused the last data sample of a group to appear at the 0 output of the Lilo, the signal 53 drops to a low state as indicated at 96 so as to cause the output of the
AND gate 110 and the D input of the latch L14 to have a low state or zero value.This low state is transferred to the X input of the comparator 112 by triggering the latch Ln4. Because the output of the latch L17 to which one input of the OR gate 118 is connected may or may not be high, a high state pulse 119 of the signal 56 is applied to the other input of the OR gate 118 is connected may ormay not be high, a high state pulse 119 of the signal 56 is applied to the other input of the OR gate 118 so as to ensure that its output will be high. Then when a pulse 97 of the signal S4 occurs, both inputs of the AN D gate 120 are high so as to cause its output to go high and thereby trigger the latch L18 as required.
Whereas the invention can be performed with the circuits of Figures 4 or 5 in the manner described, it is generally preferable to utilize a microprocessor or computer, especially if they are available for other purposes. Figure 6 illustrates a flow chart that can be used as a basis for formulating programs for any general purpose processor or computer, but the program set forth below is for the Hewlett-Packard HP9825A programmable calculator. The numerals within the blocks of the flow chart are the numbers of the related steps in the program.
Analog data is provided by a source 126 to an AID converter 128 that is timed by a system clock 130. During the occurrence of a first group of data samples A, B, C and D, program steps 2,3 and 4 of block 132,the program places the average of the previous four samples Z in Y and calculates a new average Z to be used with the next group of samples A', B', C' and D'. In this way, Y always contains the average of the previous four samples. The data sample of a second group A', B', C' and D' that is a possible display sample at various points in the program is placed in a register DS, not shown.Decision blocks 134, 136, and 138 respectively determine if lA'-Yl > IB'-Yl, if IA'-YI > IC'-Yl, and itA'-YI > ID'-YI. The program progresses from one block to the next only if the answer is affirmative. If all decisions are affirmative, data sample A' is put in the display register DS, block 140, and as indicated at block 142, it is output to a display means 144. If the answer in block 134 is negative, then B' is a possible display sample and is put in the register DS, block 146, until a final determination is made.But before B' is designated as a display sample, blocks 148 and 150, which respectively determine if IB'-Y ] > C'-Yl and if iB'-Y ] > / D'-Y , must yield affirmative answers. If they do, data sample B' which is already in the register DS is inputted to the display device 144 as indicated at block 142.If, however, the decision of the block 148 is negative, data sample C' now becomes a possible display sample and is placed in the register DS, block 152, but before being designated as the display sample, a block 154 must produce an affirmative answer indicating that C'-Yj > ID'-Yl. If the answer of the block 154 is affirmative, the data sample C' which is already in the register DS is inputted to the display device 144 as indicated at block 142. If the decision of either of the blocks 150 or 154 is negative, then the data sample D' is placed in the DS register, block 156, and inasmuch as the process is completed, the sample D' is inputted to the display device 144 as indicated at block 142.
If the decision of the block 134 is affirmative, i.e., A'-Y > iB'-Yj, B'-Y,but the decision of the block 136 is negative, i.e., A'-YI < IC'-YI, then data sample C' may be the display sample and is put into the DS register, block 152. The program then continues from the block 152 to determine whether IC'-YI > ID'-Yi, block 154, as before. If so, data sample C' is inputted to the display device 144 from the register DS; but if not, data sample D' is the display sample and it is placed in the register DS, block 156. From there, the data sample D' is in putted to the display device 144, block 142. If the answers of the blocks 134 and 136 are both affirmative and the decision of the block 138 is negative, i.e., lA'-Yl < ID'-Yl, then data sample D is the display sample and is placed in the register DS, block 156. From there, it is transferred, block 142, to the display device 144.
Program for HP 9825A 0: "enhl":dsp "in enhl"
1: forl=1to8192by8
2: itf (K$ [ I,l+1j)#r1; itf(K$ [ 1+2,1+3 ] )r2 3: itf(KS [ l+4,l +5 ] )#r3; itf(K$ [ 1+6,1+7 ] ) r4 4: Z Y; (r1 +r2+r3+r4)!4 bZ 5: if abs (r1-Y) > abs(r2-Y); gto 10
6: r2 < C 7: if abs(r2-Y) > abs(r3-Y); gto 13
8: r3 < C 9: gto 18 10: ifabs(r1-Y) > abs(r3-Y); gto 16 11: r3 < C 12: gto 1 8 13: if abs(r2-Y) > abs(r4-Y); gto 21
14: r4 < C 15: gto 21 16: if abs(r1~Y) > abs(r4~Y);gto20 gto 20 17: gto 14 18: if abs(r3-Y) > abs(r4-Y); gto 21
19: gto 1 4 20: r1 GC 21: dspC
22: next I Figure 7 illustrates an ECG wave formed by using all data samples which occur every 2 milliseconds as display samples;Figure 8 illustrates the same ECG wave formed by using the average of each successive and exclusive group of of four data samples as a display sample; and Figure 9 illustrates the same ECG wave formed by selecting one data sample in each successive and exclusive group of four data samples in accordance with this invention. Note that the pace pulse P' of Figure 7 is completely lost in the noise in the
ECG wave of Figure 8, but that it retains its full amplitude in the ECG wave of Figure 9. This is of significance when implanting or evaluating the performance of a pace maker device in a patient.
In the embodiments of the invention herein described, one data sample in four is selected as a display sample. Whereas this would seem to indicate a severe reduction in information content, as actually occurs in the averaging method of data compression illustrated in Figure 8, it has been found that the loss in information content is considerably reduced using the described technique. The invention may be applied by using groups containing two or more data samples, but if the number of data samples in a group is not a power of 2, the average of the data samples in a group must be determined by a true divider rather than by eliminating bits of lower significance. The loss in information content will, of course, increase as the number of samples in a group is increased. It is thought that the circuits as well as the program could be altered by one skilled in the art to work with groups having other than four data samples. It will also be appreciated that the particular decisions illustrated in the flow chart of Figure 6 could be altered as long as a final determination is made as to which data sample of a group differs the most from the average of the data samples of the previous group.
Claims (4)
1. Apparatus for compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, comprising
an input to which data samples representing successive values of data can be applied;
an output;
means coupled to said input for deriving a representation of an average of the values represented by data samples of each group of data samples of a plurality of consecutive groups of data samples;
means for deriving a representation of the absolute value of the difference between the value represented by each data sample of each group and the average of the values represented by the data samples of the previous group; and
means for conducting to said output a sample from each group for which said absolute difference value is the greatest.
2. Apparatus for compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, substantially as hereinbefore described with reference to Figures 1,3,4, 4A, 6 and 9, or with reference to Figures 1,3,5, 5A, 6 and 9, of the accompanying drawings.
3. A method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, the method comprising the steps of:
producing an average value of the data sample values in a group of samples;
comparing said average value of said group with the values of the data samples in a preceding group to determine the absolute values of the differences between said average value and said values of said data samples in said preceding group;
repeating the above steps for each successive group; and
transmitting that sample of each successive group having the greatest absolute value of difference associated therewith.
4. A method of compressing data represented by samples occurring at a given frequency in such manner that they can be displayed without loss of significant detail of said data, each data sample having a value representative of the corresponding data value, substantially as hereinbefore described with reference to
Figures 1,3,4, 4A, 6 and 9, or with reference to Figures 1,3, 5, 5A, 6 and 9, of the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16516980A | 1980-07-02 | 1980-07-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB2069264A true GB2069264A (en) | 1981-08-19 |
Family
ID=22597738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8039601A Withdrawn GB2069264A (en) | 1980-07-02 | 1980-12-10 | Data compression apparatus |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS5743232A (en) |
GB (1) | GB2069264A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0083985A1 (en) * | 1982-01-11 | 1983-07-20 | Technicare Corporation | Improved ultrasonic image storage system |
EP0521669A2 (en) * | 1991-07-01 | 1993-01-07 | Marconi Instruments Limited | A method of and apparatus for reducing the size of a display whilst substantially maintaining its information content |
US20130268157A1 (en) * | 2010-12-13 | 2013-10-10 | Korea Railroad Research Institute | Method for reducing detection data of a monitoring device in a vehicle, and method for monitoring a vehicle defect in near real time using same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5336759B2 (en) * | 1972-10-13 | 1978-10-04 | ||
FR2231972B1 (en) * | 1973-05-29 | 1977-04-29 | Electricite De France |
-
1980
- 1980-12-10 GB GB8039601A patent/GB2069264A/en not_active Withdrawn
-
1981
- 1981-06-25 JP JP9905481A patent/JPS5743232A/en active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0083985A1 (en) * | 1982-01-11 | 1983-07-20 | Technicare Corporation | Improved ultrasonic image storage system |
EP0521669A2 (en) * | 1991-07-01 | 1993-01-07 | Marconi Instruments Limited | A method of and apparatus for reducing the size of a display whilst substantially maintaining its information content |
EP0521669A3 (en) * | 1991-07-01 | 1996-11-06 | Marconi Instruments Ltd | A method of and apparatus for reducing the size of a display whilst substantially maintaining its information content |
US20130268157A1 (en) * | 2010-12-13 | 2013-10-10 | Korea Railroad Research Institute | Method for reducing detection data of a monitoring device in a vehicle, and method for monitoring a vehicle defect in near real time using same |
US8935039B2 (en) * | 2010-12-13 | 2015-01-13 | Korea Railroad Research Institute | Method for reducing detection data of a monitoring device in a vehicle, and method for monitoring a vehicle defect in near real time using same |
Also Published As
Publication number | Publication date |
---|---|
JPS5743232A (en) | 1982-03-11 |
JPH0157369B2 (en) | 1989-12-05 |
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