GB2058414A - Apparatus for controlling stepping motors in electronic time pieces - Google Patents

Abstract

Apparatus for controlling an electronic time piece having two motors M1, M2 comprises only six power transistors T13 to T18 divided into pairs of transistors of opposite conductivity type, the transistors of each pair being connected in series with each other in a respective switching circuit connected between the supply terminals (+,-). The first motor M1 is connected between the middle connection points of the pairs T13/T14 and T17/T18 and the second motor M2 between the middle connection points of the pairs T17/T18 and T15/T16. The pair of transistors T17/T18 is thus common to the two motors. The circuit provides alternating pulses to each motor M1, M2 or may be used to energize two separate windings of a single motor, for reverse and forward drive. If two motors are used, one may drive a seconds hand and a minutes hand, and the other an hours hand and a date indicator. Opposite conductivity type FETs may be used instead of bipolar transistors. <IMAGE>

Description

SPECIFICATION Apparatus for controlling stepping motors in electronic time pieces The present invention relates to an apparatus for controlling non-simultaneously, by polarised electrical pulses, two stepping motors of an electronic time piece, or two separate windings of a motor.

In clocks and watches, it is known to utilize stepping motors to drive the time-indicating hands or other display members, such as those which indicate the date, via gear trains. A stepping motor of this type is usually fed by polarised electrical pulses having a given frequency. This frequency is obtained from a quartz oscillator followed by several frequency dividers.

U.S. Patent Specification No 3,742,697 describes an apparatus which delivers polarised electrical pulses and which comprises two switching circuits connected in parallel to the positive and negative terminals of a battery and each containing two transistors which are switched between saturated and cut-off states. The motor is connected between the connection points of the transistors in the two switching circuits.

Figure 1 illustrates such a bridge circuit. The transistors T1 to T4 are saturated alternatively in pairs (T1-T4 and T3-T2) by successive impulses at a given frequency by means of a logic circuit (not shown) which controls the bases of the transistors T, toT4 via the current-limiting resistors R, to R4. Thus the motor M, is subjected successively and alternately to positive and negative impulses. On this figure, as for the other figures, the + and - arrows indicate schematically the direction of the current in the winding of the motor, or in other words whether a positively or negatively polarised pulse is being applied to it.

It is likewise known to use two stepping motors in one and the same watch. In such a case, one of the motors may drive the second hand and the minute hand, while the other drives the hour hand and the date indicator. This arrangement enables the watch to be provided with means which are both of simple construction and simple to use for enabling the information displayed by the watch to be corrected and the display of the time zones to be easily changed, or even for example for enabling a chronographic mechanism to be incorporated in the watch. French Patent Application No 2,393,840 describes an example of such a watch comprising two stepping motors.

If, as shown in Figure 2, the circuit of Figure 1 is utilised in a watch having two motors M, and M2, eight transistors T5 to T,2 and eight resistors R5 to R,2 are then necessary and four terminals must be provided in the integrated circuit for the connections with the motors.

Now, these transistors are power transistors which, unlike the logic circuits which control them, occupy a large amount of space on the integrated circuit chip. Such a solution thus precludes any increase in miniaturization and any reduction in the cost of manufacture in this field. A reduction in the number of terminals in the integrated circuit is moreover desirable in order to improve its reliability and likewise to reduce its cost of manufacture.

The object of this invention is to provide an apparatus for controlling two stepping motor windings which makes use of a reduced number of transistors and which enables the number of terminals and the cost of manufacture of the circuit in which these transistors are incorporated to be reduced.

The invention is defined in claim 1, to which reference should now be made.

Certain embodiments of the invention are illustrated by way of example in the accompanying drawings, in which: Figure 1 shows a known circuit art for controlling a stepping motor, Figure 2 shows an application of the circuit of Figure 1 to a movement comprising two stepping motors, Figure 3 illustrates a first embodiment of the apparatus according to the invention, Figure 4 illustrates a second embodiment of the apparatus according to the invention, and Figure 5 illustrates schematically a ROM memory store which can be used with the apparatus according to the invention.

Figures 1 and 2 have already been described in the introduction.

The device of Figure 3 comprises three switching circuits connected in parallel to the positive and negative terminals of a source (not shown) of electrical energy. Each switching circuit contains one PNP transistor and one NPN transistor the emitters of which are connected respectively to the positive and negative terminals of the electric energy source and the collectors of which are interconnected.The P.NP transistors are indicated by the references Tug3, T15 and T17 and the NPN transistors by references Ta4, T,6 and Tia. The winding of the motor Mr is connected between the collectors of the transistors T13 and T14 on the one hand and the collectors of the transistors T7 and T,8 on the other hand. The winding of the motor M, is connected between the collectors of the transistors T15 and T,6 on the one hand and the collectors of the transistors T17 and T18 on the other hand.

Figure 4 illustrates an embodiment which differs from the embodiment of Figure 3 only in that the PNP transistors have been replaced by P channel MOS transistors indicated by the references T,9, T2, and T23, and the NPN transistors by N channel MOS transistors indicated by the references T20, T22and T24.

In the two embodiments described above, since the two motors M, and M2 are not required to run simultaneously, the transistors T,7 and T,8 (Figure 3) and the transistors T23 and T24 (Figure 4) which are common to the two motors can be of the same dimensions in the integrated circuit as the other transistors T13 to T,6 (Figure 3) and T19 toT22 (Figure 4). Moreover, only one terminal is necessary to connect the common point of the transistors T,7 and T,8 or T23 and T24 to the outside of the integrated circuit.

The bases of the transistors T,3 to T,8 or the control electrodes of the transistors T19 to T24 receive from a control circuit, an example of which will be described later, signals of definite duration and polarity so as to turn selected transistors on or off and thereby cause the motor shaft of one or other of the motors to rotate in one direction or the other.

Thus, for example, a logic signal "0" applied to the transistors T,3, Tr5, Tr7, T,s, T2, or T23 turns them on, whereas a logic signal "1" turns them off. The transistors Tr4, T6, Tr8, T20, T22 and T24 on the other hand are turned on by a logic signal "1" and turned off by a logic signal "0". As is usually the case in logic circuits the expressions logic signal "0" and logic signal "1" are used to mean a signal having the same voltage as the negative and positive poles respectively of the supply source.

In order to cause a positive current flow through the motor M, in the direction of the arrow marked with the symbol +, the transistors T14 and T17 (Figure 3) ore20 and T23 (Figure 4) must be turned on. In order to cause a negative current to flow through the same motor, the transistors T,3 and T,8 (Figure 3) or T19 and T24 (Figure 4) must be turned on.

Likewise, in order to cause a positive current to flow through the motor M2, the transistors T,6 and T17 (Figure 3) or T22 and T23 (Figure 4) must be turned on and, in order to cause a negative current to flow through the same motor, the transistors T15 and T,8 (Figure 3) or T21 and T24 (Figure 4) must be turned on.

The required signals can be supplied, for example, by a read only memory (ROM) such as that shown in Figure 5.

This memory has six output connections S, to S6 which are data output connections and which will be connected via the resistances R3 to R,8 to the bases of the transistors T13 to T,8 or directly to the control electrodes of the transistors T19 to T24. It also has three input connections, indicated by the references E" E2 and E3, which are address input connections and which receive from a control circuit (not shown) logic signals, each combination of which corresponds to a different condition of the motors.

Each winding may be turned off, short-circuited or fed by a positive or a negative current.

The control circuit is not shown because its circuit diagram depends on the function assigned to each of the motors and on the automatic or manual means which are provided for controlling them. It comprises in all cases a time base and logic circuits which elaborate, as a function of the signals emitted by the time base and by the control means, logic signals that are to be applied at each instant at the input connections E, to E3 of the ROM.

The following table summarises the operation of the circuit:

I CONDITIONS INPUTS OUTPUTS M1. M2 E1. E. E2 S1 i 5,' 54 S5 54 1 OFF OFF 0 0 0- 1 0 1 0 1 0 2 + OFF O 1 0 1 1 1 0 0 0 3 ~ OFF 0 0- 1 0 0 1 0 1 1 4 CC OFF 0- 1 1 1 1 1 0 1 1 . .

5 OFF + 1 1 0 1 0 1 1 0 0 6 OFF ~ - 1 0 1 1 0 0 0 0 . 1 1 7 OFF CC 1 1 1 1 0 1 1 I 1 1 8 CC CC 1 0 0 ~ 0 0 0- 0 1 1 In this table the first two columns, headed "Conditions" together indicate the different possible conditions of the motors M, and M2. In these columns "OFF" means that the motor indicated at the head of the column is out of service, "CC" that its winding is short-circuited (the winding of a stepping motor is usually short-circuited at the end of each driving pulse in order to reduce the period during which the rotor oscillates about its position of equilibrium) and "+" and "-" that a positive or negative current respectively is passing through the motor indicated.

The three columns headed "Input" give an example of combinations of three logic signals emitted from the control circuit for each of the eight possible conditions indicated in the two first columns of the table, which logic signals are applied to the inputs E, to E3 of the ROM.

The last six columns entitled "Outputs" indicate the logic conditions assumed by the outputs S, to Só of the memory for each of the combinations of input logic conditions. It may be noted that the combinations of output logic conditions S, to S8, which are the only ones that can occur, are such that the transistors T,3 to T,8 (Figure 3) or T19 toT24 (Figure 4) will only be turned on under the required conditions. The motors M, and M2 will thus never receive current simultaneously and any two transistors which are connected in the same branch (TX3 and Ta4, T15 and T16 etc) will never be turned on simultaneously.

It is evident that the present arrangement could also be used for controlling a single motor provided with two windings, such as the two-directional stepping motor described in US Patent Specification No 4,144,467.

Claims (2)

1. An apparatus for controlling non-simultaneously, by polarised electrical pulses, two motor windings of an electronic time piece, comprising three circuits connected in parallel to the terminals of a source of electrical energy and each containing two transistors which are connected in series with each other and can be controlled independently to determine selectively the operation of the two motor windings and the polarity of the pulses, one end of both motor windings being connected to the point of connection of the transistors in one of the said circuits and the other ends of the motor windings being connected respectively to the points of connection of the transistors in the other two circuits.

2. An apparatus according to claim 1, wherein the transistors are field-effect transistors, each circuit comprising one P type field-effect transistor and one N type field effect transistor.