GB2054309A - Radar processing apparatus - Google Patents

Abstract

A radar processing apparatus, for distinguishing moving target data from false data, comprises a plot extractor 3, a data store 5, a central control 7 and a comparator 9, 11, 13 and 19. For each one of a number of consecutive scans, extracted plot data, corresponding to a common area of the scan cover, is used by the control 7 which provides information representing the presence or absence of a plot at positions measured across the common area. This information, derived from each scan, is correlated by the comparator 9, 11, 13 and 19 to determine the coincidence of plots lying within each one of a spectrum of resolved component velocity ranges and the results of this comparison used to derive a code for labelling each plot extracted from the most recent scan. One form of the comparator comprises the combination of a number of shift registers 19 having comparator circuitry 13 connected to their terminal stages, the arrangement of these connections defining one or more of the velocity ranges. <IMAGE>

Description

SPECIFICATION Radar processing apparatus The present invention relates to radar processing apparatus and is particularly concerned with the detection of moving targets and the automatic detection of target tracks.

Since radar signals are reflected not only by moving targets but also by weather clutter and ground structures, it is a constant problem distinguishing the true from false target signals and plots. Whilst a substantial number of weak signals returned from sparse light clutter may be rejected by initial processing techniques eg signal thresholding, stronger returns from dense clutter will often break through.

In visual display systems, one approach to mitigate this problem has relied on display technique and operator response. In this technique, data from a number of consecutive radar scans is processed, plots extracted, and stored. The data is then dispiayed frame by frame, one frame corresponding to each scan, on the phosphor screen of a visual display unit. The data acquired on the most recent scan is also repeatedly displayed for a number of frames. Moving targets are, in this way, shown as illuminated tracks having a brightened head. The operator is able to recognise the patterns formed, and so distinguishes targets from clutter. Nonetheless, this technique is not automated, for it relies on operator response, and is not alone generally suitable for target tracking. Also heavy clutter remains as a distracting feature of these display systems.

In radar tracking systems an automatic technique is usually adopted. Typically, target tracks have been detected and extracted by plot-by-plot correlation. In this correlation a selected plot, extracted from a first scan, is compared with all those plots extracted on the next scan that lie within maximum target range. From this comparison a number of possible tracks is predicted. It is likely that only one of the predicted tracks is true, other tracks being due to the presence of false plots. On a number of subsequent scans, extracted plots are examined to determine whether they lie on these predicted tracks. A count is associated with each predicted track, the highest count distinguishing true track from false tracks.It is a disadvantage of this type of system that even if a number of consecutive plots have been correctly associated to form a track, if one or more true plots are missed the track can be misled by false plots so that when the true plots reappear the falsely predicted position is now so far away from the true target position that the true plots are not recognised as belonging to the track.

According to a first aspect of the invention there is provided radar processing apparatus comprising: a plot extractor having a store for extracted plot data; data processing means having access to the store; and, control means for controlling the transfer of data between the store and the processing means and for controlling the processing means; wherein, the plot extractor, the processing means, and the control means, are arranged to perform the following processing steps: sorting from the extracted plot data, for each one of a number 'n' of consecutive radar scans, a sample corresponding to a common select area of the scan cover; providing, for each sample, information representing the mapping of the sample onto a one dimensional grid; correlating the information over the 'n' consecutive scans, for each of one or more of the plots extracted from the most recent scan, to determine the coincidence of extracted plots lying within each one of a spectrum of grid-velocity ranges; and coding each such plot extracted from the most recent scan, according to coincidence and gridvelocity.

The plot coding may subsequently be used for sorting plots corresponding to targets moving with a component of velocity parallel to the grid, from plots corresponding to stationary or slow moving clutter or to targets moving with velocity orthogonal or near orthogonal to the grid.

In a fully automated radar system the select area may be one of a first set of parallel and overlapping longitudinal swaths each extending right across the scan cover. The plot extractor, the processing means, and the control means is then arranged to repeat the above processing steps for each of these swaths.

Advantageously, to allow sorting of false plots corresponding to stationary and slow moving clutter from true plots corresponding to targets moving with velocity substantially transverse to the grid, the plot extractor, the processing means and the control means may be arranged to repeat the processing steps for a second set of swaths orthogonal to the first set of swaths. The plot coding may be used subsequently for eliminating false plots, prior to display, to afford a less confusing display presentation. The plot coding for the first and second set of swaths may be used for computation of target speed and track. With such computation, the apparatus may be used in parallel with, and to supplement, a point-by-point track extractor, to provide overall an improved tracking system.

The processing means and the control means may be provided by a computer or microprocessor programmed to perform the processing steps.

Preferably, however, whilst the control means may be provided by a programmed computer or microprocessor, the processing means may be provided, at least in part, by a peripheral comparator.

According to a second aspect of the invention there is provided a comparator for use in the above apparatus, the comparator comprising: a plurality 'n' of digital shift registers; load control means, capable of responding to the information for loading each register to duplicate the information such that each register bit has a binary value to distinguish between the extraction and absence of plots each within a corresponding one of an ordered multiplicity of consecutive divisions of the grid; clock control means for controlling the transfer of bit data along each register; and, correlator means connected with each of the registers for correlating bit data, and coding each sample plot extracted from the most recent scan; the registers, the load control means, the clock control means, and the correlator means being arranged to correlate the bit data to determine the coincidence of extracted plots lying within each one of a spectrum of grid-velocity ranges.

In one form of the comparator, the correlator means may be connected to a single output terminal of each register. Here it is arranged that the clock control means is capable of controlling the transfer of bit data along each register each at a different rate to afford sequential correlation of the bit data over a number of velocity ranges, and that the correlator means is capable of gating sequentially presented bit data to perform each sequential correlation.

Preferably, in another form of the comparator the correlator means may be connected to one or more consecutive bit output taps of each register, the number of taps in each case, and the arrangement of connections thereto, being such as to define at least one grid-velocity range selection for the purpose of data comparison. In this form of the comparator, the number of velocity range selections, defined by the connection arrangement, may cover simultaneously the spectrum of velocity ranges. Here, it is arranged that the clock control means is capable of controlling the transfer of the bit data in each register to allow comparison for each plot of the sample extracted from the most recent scan.

Alternatively, however, the tap arrangement may be such as to define grid-velocity range selection for only a fraction of the grid-velocity spectrum. In this case, bit data is compared step by step to cover the full spectrum of grid-velocity ranges, and from step to step bit data in each register is displaced by different relative increments in order to change the grid-velocity selection defined by the tap arrangement. Between steps, bit data may be transferred along each register to allow codification of the swath of extracted plots.

The invention will now be described, by way of example only, and with reference to the accompanying drawings, of which: Figure 1: is a block diagram of a radar processing system embodying features of the invention; Figure 2: is a schematic illustrating typical radar coverage and showing the division of this cover into swaths; Figure 3: is a graph to illustate defined velocity range selection by shift register tap arrangement; and, Figures 4 and 5: show two detector components of a comparator logic unit included in the system of Fig. 1.

As shown in Fig. 1 a radar receiver 1 is arranged to feed radar information to a processing system comprising a plot extractor 3, an auxilliary data store 5, a cental control unit 7, a load control unit 9, a clock control unit 11 and a comparator logic unit 1 3. These components of the system are interconnected through interfacing, by means of a bus 1 5. The system, also includes a data display unit 1 7 which is interfaced with the bus 1 5. The load control unit 9 feeds an array of eleven shift registers SRo to Sir,, and it provides controlled loading of these registers.

Bit data may be loaded, through a single input 1 9 of each register, as shown. In preference to this, however, to allow faster loading, bit data may be loaded through a multiplicity of inputs, each input serving a different stage of each register. Bit data temporarily stored in each of these registers can be transferred along each register from stage to stage in response to phase clock signals supplied by the clock control unit 11.

Each register has one or more output taps to facilitate the simultaneous detection of the bit data stored in its terminal stages and these taps are connected via groups of leads, L0 to L,O, to the inputs of logic unit 1 3. The particular number of these taps and their collective arrangement, define velocity range selection, as will be described in detail below.

In the course of operation the plot extractor 3 receives amplified radar return signals from the receiver 1. It processes these signals and provides in internal store, or in the auxillary data store 5, extracted plot data, each extracted plot being labelled according to target position. The extracted plot data may be stored directly in (r, 0) polar co-ordinate form, or more conveniently, as here, after conversion to (x, y) cartesian co-ordinate form. The x - y co-ordinates may represent co-ordinate measure in the E-W, N-S directions:-- eg Plot No 1017: (Xi, Yi). It does this for a number of scans-here eleven-before updating the store with more recently acquired data.

Typical radar scan cover is illustrated in Fig. 2. Here the cover is a full 360 of azimuth, corresponding to a fully rotational radar antenna. Three target aircraft P, Q, R are shown moving within radar range. Target aircraft P is shown moving from a position P,0, detected on the earliest scan, to a position P0, detected on the most recent scan, on a south-west bearing. In the same time aircraft Q and R move from positions Q,0, R10 to positions Q0, R0 on north and southeast bearings, respectively. The cover is shown as divided into a number N of parallel east-west swaths So, S" . .., 5N-1 Each swath has a width sufficient to encompass a target moving from one side of the swath to the other aircraft Q--with maximum velocity, during a number of scans. Thus, for typical values of radar scan rate:- 4 rpm, and limited target maximum velocity 6 miles/min (-600 kph), swath width is fixed at 1 5 miles (-25 km) for ten scans.

It is noted that during the duration of the scans, aircraft R moves from swath S2 to S,. In order to encompass all targets within swaths for a substantial amount of this duration, rather more than N swaths are necessary. The cover is thus further divided into N swaths parallel to swath S,an E-W swath displaced northwards of swath S, by a third of the swath width-here a displacement of five miles, and N swaths parallel to S,ran E-W swath displaced northwards of swath S, by two-thirds of the swath width-here a displacement of ten miles. This selection of 3N swaths ensures that a target moving with maximum velocity lies within at least one of the swaths for at least seven out of ten consecutive scans.

The central control unit 7, under programme instruction, accesses extracted plot data, sorts from this a sample of data representative of a swath and provides codified information. This information represents, in binary pulse form, the mapping of swath sample plots onto a one dimensional grid-the grid divisions being typically a resolution cell long eg 41 mile (0.4 km), and the grid axis being directed E-W ie parallel to swath length. Thus the data is sorted to determine the extraction or absence of plots for each one of a multiplicity of co-ordinate divisions along the grid, and this is indicated by a sequence of digital '1' and digital '0' signal levels. A digital '1' level thus indicates the extraction of a plot for a scan over a division of the swath area cog Dj.The central control unit 7 maintains a record of the plot-data-to-information transformation so that label codes subsequently provided by logic unit 1 3 may be associated with extracted plots.

Codified information derived from data representing eleven consecutive scans of one swath is then directed via bus 1 5 to the load control unit 9. Bit data duplicating this information, is loaded into cleared registers SRO to Sir,,. After this loading has been completed each register stage has a bit value logic '1' or '0' dependant on the extraction or absence of a plot for a corresponding one of the divisions. Thus the stages of register SRO are coded from left to right to indicate plot extraction and position, from E-W along the selected swath for the most recent scan. Similarly the stages of registers SRR to Sir10 are coded for the first to tenth preceeding scans, respectively.

The number and arrangement of shift register taps is now considered with reference to the graph of Fig. 3. On this graph, the grid-position (x) of a target from a most recent scan position origin is shown as a function of time. A target moving with maximum velocity 360 mph (600 kph) from West to East will be 1 5 miles west of it position ten scans later. The grid-velocity of this target is represented on this graph by grid-velocity line V + max Similarly, a target moving with maximum velocity from East to West is represented by grid-velocity line V - max. Between these two extremes the area of the graph is divided by a number of grid-velocity lines representing targets moving with velocities having E-W grid components of lower magnitude.

The spectrum of target grid-velocities is divided into twenty-four velocity ranges to cover targets of grid-velocity between - 360 mph and - 330 mph (- 600 kph and - 550 kph),... - 30 mph and 0 mph (- 50 kph and 0 kph), 0 mph and 30 mph (50 kph), .. 330 mph and 360 mph (550 kph and 600 kph), each velocity range being of magnitude 30 mph (50 kph).

Since each register stage stores a bit for each target grid-position, and each register corresponds to a different scan, this graph also serves to indicate the correspondence between grid-velocity selection and tap arrangement. Additional axes are shown for scan number (0 representing most recent scan, 10 representing earliest scan) against shift register tap number (0 representing taps corresponding to a selected grid division. All positive tap numbers, corresponding to stages counted to the right of this stage representing target positions West.

The approximate correspondence between the tap numbers for each register, and grid-velocity range limits, shown in Fig. 3, is indicated in the following table:- TABLE 1 TAP NUMBER - GRID-VELOCITY CORRESPONDENCE FOR REGISTERS R01 TO R10 GRID-VELOCITY LIMIT

kph 600 550 500 450 400 350 300 250 200 150 100 50 0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -500 -550 -600 mph 360 330 300 270 240 210 180 150 120 90 60 30 0 -30 -60 -90 -120 -150 -180 -210 -240 -270 -300 -330 -360 R01 -6 -6 -5 -5 -4 -4 -3 -3 -2 -2 -1 -1 0 0 1 1 2 2 3 3 4 4 5 5 6 R02 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 R03 -18 -17 -15 -14 -12 -11 -9 -8 -6 -5 -3 -2 0 1 3 4 6 7 9 10 12 13 15 16 18 R04 -24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 16 18 20 22 24 R05 -30 -28 -25 -22 -20 -18 -15 -13 -10 -8 -5 -3 0 2 5 7 10 12 15 17 20 22 25 27 30 R06 -36 -33 -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 3 6 9 12 15 18 21 24 27 30 33 36 R07 -42 -39 -35 -32 -28 -25 -21 -18 -14 -11 -7 -4 0 3 7 10 14 17 21 24 28 31 35 38 42 R08 -48 -44 -40 -36 -32 -28 -24 -20 -16 -12 -8 -4 0 4 8 12 16 20 24 28 32 36 40 44 48 R09 -54 -50 -45 -41 -36 -32 -27 -23 -18 -14 -9 -5 0 4 9 13 18 22 27 31 36 40 45 49 54 R10 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60 #12- #11- #1- #1+ #11+ #12+ GRID-VELOCITY RANGE Consider, for example, the arrangement of taps defining the grid-velocity range - 1 80 mph (- 300 kph) to - 210 mph (350 kph).On the earliest scan, scan no 10, the target P having an E-W grid-velocity xt in this range will be between the 7Q and 83/4 mile grid-divisions and East of the target position on most recent scan. The bit value '1' representing such a target will be stored in register SR10 in one of the tapped stages between taps number 30 and 35 inclusive.

For this register taps, 30 to 35 are connected to a six-input OR-gate 11 OA (Fig. 4). Any register stage, between taps 30 to 35 inclusive, loaded with a logic 1 indicating extrapolation of a plot, results in a logic '1' output from this OR-gate 11 OA.

The taps on registers SR01 to SR09 are also connected to register dedicated OR-gates 102A to 109A (Fig. 4) as indicated in the following table:- Table 2 Register tap/OR-gate correspondence for velocity range - 180 mph (-300 kph) to - 210 mph (- 350 kph) Register Tap No to Tap No No of taps OR-gate SR01 3 3 1 SR02 6 7 2 102A SR03 9 10 2 103A SR04 12 14 3 104A SR05 15 17 3 105A SR06 18 21 4 106A SR07 21 24 4 107A SR08 24 28 5 108A SRO9 27 31 5 109A SR10 30 35 6 llOA The nine OR-gates 102A to 11 OA collectively provide a sequence detector 111 A, a component part of the logic unit 1 3. Ideally, when a target, having a grid-velocity lying in the range defined by this arrangement, is detected, a logic level '1' is presented at all OR-gate outputs of detector 111A.A tenth output of detector 111 A is provided by the appropriate tapped output of register SR01.

The logic unit 13 also includes a common interface/code relay unit 113 which is connected to the ten outputs of detector 111A. Interface unit 113 is connected to bus 15 for relaying velocity label code data for plot association and storage under the control of central control unit 7. Interface unit 113 is also connected to the appropriate output of register SRoo. Whenever a logic '1' level is present on this output, the presence of an extracted plot on most recent scan is indicated and code relay enabled. A valid code may then be delivered to bus 15 when data transfer is permitted.

For the particular grid-velocity range selections illustrated, two different types of sequence detector are required. The first of these two types has already been described, detector 11 1A (type A). A second type, sequence detector 111 B (type B) is shown in Fig. 5. This detector 111 B comprises: two 2-input OR-gates 101 B, 102B; two 3-input OR-gates 103B, 104B; two 4input OR-gates 105B, 105B; two 5-input OR-gates 107B, 108B; and, two 6-input OR-gates 109B, 11 OB. These ten OR-gates 101 B to 11 OB are connected to the appropriate outputs of shift registers SR01 to SR10, respectively.

In order to cover simultaneously the full spectrum of velocities - 360 mph to + 360 mph (- 600 kph to + 600 kph) twelve type A detectors 111 A and twelve type B detectors 111 B, in all, are provided. The type A detectors are connected to appropriate register outputs for covering the velocity ranges: - 330 mph to - 300 mph (- 550 kph to - 500 kph), - 270 mph to - 240 mph (- 450 kph to - 400 kph) to + 330 mph to + 360 mph (+ 550 kph to + 600 kph). The type B detectors are connected for covering the alternate velocity ranges: - 360 mph to - 330 mph (- 600 kph to - 550 kph), to, + 300 mph to 330 mph (500 kph to 550 kph).

Consider the target P having grid-velocity #@ and suppose that a plot is extracted for this target on the most recent scan and a logic '1' level bit is located at the tapped stage of registers Roo. A ten-bit code is presented to interface 11 3 by each of the detectors 111 A, 111 B.The code from the detector 111A covering the velocity range - 210 mph to - 180 mph (-350 kph to - 300 kph) (- x") will indicate a high degree of coincidence: (1111111111) xss In normal circumstances the codes from all other detectors will indicate a low degree of coincidence: (1001000001) x" the logic 1 code bits arising from clutter and receiver noise false plots.

In order to reduce bus access time it is preferable that these data codes are sorted before delivery. Only codes indicating high coincidence are useful and these may be sorted from low coincidence codes by coincidence counting. For example, a count of seven or more logic 'l's out of ten may be taken as a suitable measure of high coincidence and codes having fewer counts may be rejected. The correlation logic unit 1 3 thus prepares to deliver the highly coincident code and also provides a velocity label: (- 1111111111) After delivery, this labelled code is then associated with the selected extracted plot and held in store.

To codify each recently extracted plot lying within the selected swath, the bit data in then transferred along each register, one stage at a time, under the control of clock control unit 11.

The central control unit 9 maintains a record of register transfers for the purpose of code and plot association.

Once every recently extracted plot has been compared the registers are cleared and comparison repeated to cover all 3N E-W swaths.

When all E-W swaths have been processed, the extracted plot data is sorted into N-S swath samples and these are processed so that the recently extracted plots may be codified for N-S velocity components: (y", After correlation each recently extracted plot may have associated with it both an E-W velocity label code and N-S velocity label code. These codes may then be correlated for sorting stationary targets from moving targets. Also, if required, these codes may be used for target velocity determination and track definition, for display or tracking purposes.

At the expense of data processing time, the number of detectors may be reduced and the registers operated in a different manner for grid-velocity and the registers operated in a different manner for grid-velocity spectrum coverage. Modified load control and clock control units are however required. For this mode of operation consider two adjacent detectors, one type A, the other type B, connected in appropriate manner to registers SRoo to SR10. Under load control it is arranged that these two detectors cover the grid-velocity ranges - 360 mph to - 330 mph (- 600 kph to - 550 kph) and - 330 mph to - 300 mph (- 550 kph to - 500 kph) respectively.Comparison is then performed for the first extracted plot and bit data transferred stage by stage along each register to complete two velocity range comparisons for the selected swath. Data is then re-loaded, but to change velocity range selection, it is ensured that data in adjacent registers is displaced by relatively different increments.The relative increments for each register are shown in the following table:- Table 3 Incremental displacement Register to right of register ROO O Row 1 R02 2 R03 3 R04 4 R05 5 R06 6 R07 7 R08 8 R09 9 R10 10 When the registers contain bit data displaced in this manner the detectors now define gridvelocity selection for the next two ranges - 300 mph to - 270 mph (- 500 kph to - 450 kph) and - 270 mph to - 240 mph (- 450 kph to - 400 kph) and comparison is repeated as before.

With successive reloading and displacement of the data, the velocity spectrum - 360 mph to + 360 mph (- 600 kph to + 600 kph) may be covered step by step two velocity ranges being selected at each step.

It is noted that two, three, four or six paired detectors could also be used, to reduce the number of these steps. In this case the incremental displacements would be appropriately different.

Where for display purposes, rejection of stationary target plots only is required, the required spectum of grid-velocity ranges could be very limited, with considerable reduction in system complexity. Eg detectors for the velocity ranges - 30 mph to 0 mph (- 50 kph to 0 kph) and 0 mph to + 30 mph (0 kph to 50 kph) alone could be used. Subsequent processing of label code data to separate all-zero velocity data from one-only-zero velocity data could then be used for plot rejection prior to display.

It is further noted that accelerating or manoevering targets would be represented by curves on the graph of Fig. 3. With further complexity in tap arrangement and logic it is appreciated that it would also be possible to codify plot data according to acceleration range selection.

Claims (9)

1. A radar processing apparatus comprising: a plot extractor having a store for extracted plot data; data processing means having access to the store; and, control means for controlling the transfer of data between the store and the processing means and for controlling the processing means; wherein, the plot extractor, the processing means, and the control means are arranged to perform the following processing steps:: sorting from the extracted plot data, for each one of a number 'n' of consecutive radar scans, a sample corresponding to a common select area of the scan cover; providing, for each sample, information representing the mapping of the sample onto a one dimensional grid; correlating the information over the 'n' consecutive scans, for each of one or more of the plots extracted from the most recent scan, to determine the coincidence of extracted plots lying within each one of a spectrum of grid-velocity ranges; and, coding each such plot extracted from the most recent scan, according to coincidence and gridvelocity.

2. An apparatus as claimed in claim 1 wherein the select area is a longitudinal swath.

3. An apparatus as claimed in claim 2 wherein the select area is a longitudinal swath extending right across the scan cover.

4. An apparatus as claimed in claim 3 wherein the swath is one of a first set of parallel swaths each extending right across the scan cover, and overlapping adjacent neighbours to range over the whole cover; the extractor, processing means, and control means being arranged to repeat the processing steps for each swath.

5. An apparatus as claimed in claim 4 wherein the extractor, processing means and control means are arranged to repeat the processing steps for another set of swaths orthogonal to the first set.

6. A comparator for use in the apparatus claimed in any one of the preceding claims, comprising: a plurality 'n' of digital shift registers; load control means, capable of responding to the information for loading each register to duplicate the information such that each register bit has a binary value to distinguish between the extraction and absence of plots each within a corresponding one of an ordered multiplicity of consecutive divisions of the grid; clock control means for controlling the transfer of bit data along each register; and, correlator means connected with each of the registers for correlating bit data, and coding each sample plot extracted from the most recent scan; the registers, the load control means, the clock control means, and the correlator -means being arranged to correlate the bit data to determine the coincidence of extracted plots lying within each one of a spectrum of grid-velocity ranges.

7. A comparator as claimed in claim 6 wherein the correlator means is connected to a single output terminal of each register, the clock control means is arranged to transfer bit data along each register each at a different rate to afford sequential correlation of the bit data over a number of velocity ranges, the correlator means gating sequentially presented bit data to perform each sequential correlation.

8. A comparator as claimed in claim 6 wherein the correlator means is connected to one or more consecutive bit output taps of each register the number of taps in each case, and the arrangement of connections thereto, being such as to define at least one grid-velocity range selection.

9. A radar processing apparatus substantially as hereinbefore described with reference to and as shown in the accompanying drawings.

1 0. A comparator substantially as hereinbefore described with reference to and as shown in the accompanying drawings.