GB2035689A - Monolithic L.E.D. array - Google Patents
Monolithic L.E.D. array Download PDFInfo
- Publication number
- GB2035689A GB2035689A GB7937678A GB7937678A GB2035689A GB 2035689 A GB2035689 A GB 2035689A GB 7937678 A GB7937678 A GB 7937678A GB 7937678 A GB7937678 A GB 7937678A GB 2035689 A GB2035689 A GB 2035689A
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- Prior art keywords
- slice
- channels
- channel
- glass
- suspension
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76275—Vertical isolation by bonding techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
Abstract
In the manufacture of a monolithic LED array, in which portions of the array are electrically isolated from one another by channels 5 cut or etched through a slice of n-type material 1, the channels are filled with a glass frit which is bonded to the semi-conductor material on each side of the channel, to give a robust construction. A suspension of glass particles in a liquid medium is introduced into the channels, then the liquid is removed and the glass powder is sintered; and the channels may be of uniform width, or may consist of a wide portion, formed first from the back of the slice, and a narrower, shallow portion formed subsequently from the front of the slice to meet the wide portion, to give high resolution. The glass suspensions may be introduced into the channels by spreading or spinning over the slice surface, or by electrophoretic deposition and/or capillary action. <IMAGE>
Description
SPECIFICATION
Manufacture of monolithic LED arrays for electroluminescent display devices This invention relates to the manufacture of monolithic arrays of light-emitting semiconductor diodes (hereinafter referred to as "LEDs") for electroluminescent display devices of the type including such an array and means for applying operating voltages to the diodes.
A monolithic LED array can be manufactured by a process (hereinafter referred to as a process of the type specified) which includes the steps of providing a a slice of a n-type semiconductor material, forming a plurality of discrete regions of p-type semiconductor material in the said slice by diffusing p-type material or a p-type dopant into one surface of the slice, to delineate the individual diode areas, forming metal contacts on the surfaces of the p-type and n-type regions of the slice and connecting groups of the p-type contacts together as required for addressing the array, at a convenient stage in the process forming one or more isolation channels through the n-type region of the slice for electrically isolating portions of the array from one another as required, and mounting the whole structure on a suitable insulating substrate.That surface of the semiconductor slice which carries the p-type regions, and the contacts formed on said regions, will hereinafter be referred to as the "front" of the slice and the "front" contacts respectively, and the opposite surface of the slice on which the semi-conductor material is wholly n-type and any contacts formed on this surface will be referred to respectively as the "back" of the slice and the "back" contacts. The substrate may be bonded either to the back of the slice or to the back contacts.
For example, in the manufacture of a matrix array consisting of a plurality of LEDs arranged in rows and regularly spaced so as to form columns orthogonal to the rows, the diodes in each column having a common back contact on the n-type surface, and the diodes in each row having individual front contacts on the p-type areas which are connected together by a continuous conductor (usually known, and hereafter referred to, as a "beam lead") for addressing the row in operation of the device, the required electrical isolation between the columns in respect of the n-type regions and common contacts may be effected by cutting or etching channels from the back of the structure, through the common contact layer and the n-type slice, in such a manner that, while the columns are completely isolated from one another, the overlaid beam leads are undamaged.This method of isolation requires the array to be subsequently handled, for the purpose of mounting the array on to a substrate, in a highly vulnerable and fragile state, as the array is held together solely by the adhesion of small areas of the beam leads to small areas of the semiconductor strips constituting the diode columns.
In another method of effecting the isolation, the array is first mounted on its substrate, and then the requisite channels are etched from the front of the slice, after the beam leads are formed, using the undercutting properties of the etch to provide isolation. However, this technique is limited to coarse geometry arrays, due to the anisotropy of such etches.
It is an object of the present invention to provide an improved process for the manufacture of a monolithic LED array, whereby handling of the structure subsequently to the formation of the isolation channels is facilitated, and a large area, beam leaded, high resolution array can be obtained.
According to the invention, in a process of the type specified for the manufacture of a monolithic array of light-emitting semiconductor diodes, for an electroluminescent display device, the said isolation channel or channels is or are filled with a suspension of glass particles in a liquid medium, then the liquid is removed and the semiconductor slice is heated to a sufficiently high temperature to cause the glass particles to sinter so as to form a glass frit contained in the channel or channels and bonded to the semiconductor material on each side of the channel or of each channel, this procedure being repeated if necessary until each channel is completely filled with said glass frit, and the formation of the channel or channels and filling thereof with said glass frit being carried out before the formation of the said contacts on the p-type and n-type regions of the semiconductor slice.
The isolation channel or channels may be formed by mechanical cutting or by chemical etching.
Usually a plurality of isolation channels will be required in an LED array, and the invention will hereinafter be described with reference to such an array, but it is to be understood that the operations described are equally applicable to the manufacture of an array having a single isolation channel. The glass employed for filling the channels may be of any suitable composition that can be sintered at a temperature which is not so high as to cause damage to the semiconductor material; the glass must also have a thermal expansion coefficient compatible with that of the semiconductor material, so that no strains or cracks will be produced in either material during the sintering process.
Usually the p-type material or dopant is diffused into the required areas of the front surface of the slice after the isolation channels have been formed and filled with glass frit. However, in some cases, if the temperature to which the slice is required to be heated for effecting the diffusion of the p-type material into the n-type material is appreciably higher than the sintering temperature of the glass employed for filling the channels, it may be desirable to form the diffused p-type region before the formation and filling of the channels.
The filling of the isolation channels with a glass frit bonded to the semiconductor material is advantageous in that it produces a composite slice of robust construction, enabling the subsequent processing steps to be carried out readily without risk of damaging the semiconductor slice; the planar composite glass/semiconductor structure of the front and back surfaces of the slice allows diffusion of the p-type material and formation and connection of the front contacts, and formation of back contacts if required, to be carried out by the usual techniques.
Furthermore, the glass-filled channels improve the mechanical strength of the completed array while maintaining the required electrical isolation between n-type regions.
In the first method of carrying out the process in accordance with the invention, isolation channels of uniform width are formed from the front surface of the slice of n-type material through a part of the slice, suitably to a depth of from 1/2 to 3/4 of the thickness of the slice, and are then filled with glass frit in the manner described above, and subsequently the back of the slice is lapped or polished to remove n-type material until the glass frit in each channel is exposed at the back surface of the slice, so that the remaining regions of n-type material are isolated from one another by the glass frit in the channels.If desired, before forming the channels, a layer of suitable support material, for example silica or silicon nitride, may be deposited on the back of the slice of n-type material, to provide a temporary strengthening supportforthe slice during the chan
nel forming and filling steps. This support layer is, of course, removed by the subsequent lapping or
polishing operation. The contacts required on the front surface of the slice may be applied either
before or after the lapping or polishing operation,
and if back contacts are required they are of course
applied after said operation.
In order to produce an LED array giving high
resolution, the isolation channels are required to be
as narrow as possible, at least at and in the vicinity of the front surface of the slice. However, if very narrow
channels are formed through a major part of the
thickness of the slice, difficulties may arise in
completely filling these channels with a glass pow
der suspension for forming the glass frit.Therefore,
in a second method of carrying out the process of the invention, the isolation channels are formed in
two stages: thus the front surface of the semicon
ductor slice is mounted on a first support layer,
initial channels are formed from the back surface of
the slice through nearly the whole of the thickness
thereof, suitably to within less than 50 microns of the
front surface, and are filled with glass frit then the
back surface of the slice is mounted on a second
support layer and the first support layer is removed
from the front surface of the slice, and then further
channels, corresponding in number and position to,
and narrower than, the initial channels, are formed
from the front surface of the slice to meet the glass
filling in the initial channels, and the said narrower
channels are filled with glass frit.The said second
support layer is then removed if it is desired to form
back contacts on the n-type regions of the slice orto mount the slice on a substrate of different composi
tion from the support layer. Alternatively, the second
support layer may be retained to constitute, or to be
mounted on, the substrate, if back contacts are not
required, and if the diffusion of the p-type regions
has been carried out before the formation of the
glass filled isolation channels.
The initial channels formed in the said second
method may be wider than the channels of uniform width which are produced in the first method described above, and the shallow, narrower channels formed in the second stage can be appreciably narrower than the said uniform channels; the filling of the channels with a glass powder suspension is facilitated, in the case of the initial channels by their greater width, and in the case of the narrower channels by their small depth. In operation of an LED array having glass-filled isolation channels formed by this two-stage method, the degree of resolution obtainable will be determined by the width of the narrower channels in the front part of the semiconductor slice, and can thus be higher than that obtainable with channels of uniform width through the slice.
The liquid suspension of glass particles employed for filling the isolation channels, in either the said first or second method, may consist of a slurry of glass powder in a binder medium which can be spread or spun over the surface of the slice in which the openings of the channels are situated, so that the slurryfilis the channels. The excess slurry is removed from the surface areas of the slice between and outside the channels before removal of the liquid medium from the channels and sintering of the glass therein.The binder medium may consist of a photoresist, or any suitable known binder, in an organic solvent, and after evaporation of the solvent the binder may be removed by appropriate chemical means, or may be oxidised and vaporised by heating in the presence of oxygen, or in the case of a photoresist may be exposed to ultra violet radiation and then removed by immersion of the slice in a standard developer solution. During sintering the glass flows and is thus reduced in volume: it is usually therefore necessary to repeat the procedure of filling the channels with slurry, removing solvent and binder, and sintering the glass several times in order to effect complete fi! filling ing of the channels.
An alternative method of introducing glass particles into the isolation channels is by electrophoretic deposition: the semiconductor slice, with the required channels formed therein and the remaining surface areas of the slice suitably masked, is immersed in a suspension of glass particles in a suitable liquid containing a surfactant which imparts an electric charge to the glass particles, an electrode is also immersed in the suspension, the semiconductor slice functioning as the second electrode, and an electric field of appropriate polarity is applied be
tween the slice and the electrode to cause the glass
particles to be attracted to the slice and deposited in the channels. The slice is then dried in an oven to remove the liquid introduced into the channels with the glass particles, and the slice is heated to sinter the glass.
In another alternative method of depositing glass
particles in the channels, the slice is immersed in a suspension of glass particles in a suitable liquid
having high surface tension or containing a surfactant, the slice being so oriented in the liquid that the
longitudinal axes of the channels lie substantially
orthogonally to the surface of the liquid, then the
slice is slowly withdrawn from the liquid: during withdrawal of the slice, the glass suspension is drawn into the portions of the channels rising above the surface of the liquid, by capillary action.
One preferred method of depositing the glass particles in the channels comprises a combination of the electrophoretic and capillary action procedures described above: thus the slice is immersed in a glass powder suspension as aforesaid, with the longitudinal axes of the channels oriented orthogonally to the surface of the liquid, and electrophoretic deposition of glass particles in the channels is effected first, and then the slice is slowly withdrawn from the suspension to promote further deposition by capillary action. This procedure is advantageous, since the electrophoretic action ensures coverage of the innermost regions of the channel walls with glass particles, and the subsequent capillary action ensures that the channels are completely filled with glass particles.
Suitable semiconductor materials for use in the manufacture of the LED array include, for example, gallium arsenophosphide, gallium arsenide, gallium indium phosphide, gallium aluminium arsenide, gallium phosphide, and gallium indium arsenide phosphide, in each case containing suitable dopants for producing n-type or p-type material as required: a preferred p-type material is zinc doped gallium arsenophosphide, and preferred n-type materials are gallium arsenophosphide doped with selenium or tellurium, and silicon doped gallium arsenide. The slice of n-type semiconductor material may be of graded composition, and is suitably prepared by epitaxial deposition of material of the required composition or range of compositions on an initial thin slice of similar or allied composition.The diffusion of p-type material into the front surface of the slice is carried out by a well-known process, the pattern of p-type regions being delineated by conventional photolithographictechniques.
The contacts are composed of suitable metals, for example chromium, nickel, nickel-chromium alloy, ortitanium, overlaid with gold, and may be formed by vacuum evaporation in known manner, the required contact patterns being delineated by photolithographic techniques, and the contacts so formed may be thickened by electroplating if desired. The required connection between front contacts on the p-type regions preferably consist of beam leads, formed by depositing, suitably by electroplating, photolithographically delineated strips of metal, for example gold, on the appropriate portions of the front of the slice so as to overlay groups of the p-contacts. Alternatively the connections between the p-contacts may be made by stitch-bonding.
The contacts for the n-type regions of the array may be in the conventional form of a continuous metal layer covering the whole of the back surface of each such region. However, for convenience in manufacture of the device, the n-contacts may advantageously be located on the front surface of the n-type slice, so that all contacts are accessible from the front of the array; a single small contact on the front of each n-type region, for example located at one end of each column in a matrix array, may be sufficient, but preferably two n-contacts are provided on each region, for example one at each end of each column, to ensure reliability of operation of the device.The advantage of such an arrangement is that all the contacts, on both p-type and n-type regions, can be connected to conducting tracks on the substrate by stitch-bonding from the contacts on the edges of the front of the slice to the said tracks. If desired, where n-contacts are located on the front of the slice, additional continuous contacts may be provided over the back surfaces of the n-type regions, to ensure that electric current introduced through the front n-contacts is evenly distributed throughout the n-type regions.
Suitable materials for the substrate of the array include, for example, ceramic alumina, sapphire, and high resistivity silicon. If the LED array includes back contacts, an area of the substrate corresponding to the area of the array is metallised to enable the contacts to be bonded to the substrate, but if no back contacts are present on the array, the back surface of the array, composed of n-type semiconductor material and the glass frit in the isolation channels, is bonded directly to the insulating substrate material.
The substrate also carries the requisite conducting tracks to form leads for addressing the array in operation of the device.
Some specific processes, in accordance with the invention, for the manufacture of high resolution matrix LED arrays, will now be described by way of example, with reference to the accompanying diagrammatic drawings, in which
Figure 1 is a perspective view of a portion of one form of array,
Figure 2 is a perspective view of a portion of a second form of array, and
Figure 3 is a perspective view of a third form of array having isolation channels formed by the two-stage process.
Like parts in the three figures of the drawings are indicated by the same reference numerals.
Example 1
The array shown in part in Figure 1 of the drawings consists of a plurality of columns formed from a rectangular slice of n-type semiconductor material 1, composed of silicon doped gallium arsenide (GaAs) 1a overlaid by tellurium doped gallium arsenophosphide (GaAsP) 1 b, with an ohmic contact 2 covering the whole of the back surface of each column and bonded to a ceramic substrate 3, and with front surface diffused regions of p-type GaAsP, 4, delineating the diode matrix and provided with individual front ohmic contacts connected together in rows approximately orthogonal to the columns; the columns are separated from one another by isolation channels 5 filled with sintered glass frit, indicated by stippling.Each of the front contacts consists of a rectangular metal pad 6 overlapping the p-type region, with a narrow conducting strip 7 formed around the edge of the remainder of the p-type region; these contacts are connected together by continuous beam leads 8 laid across the array, overlying the respective rows of contact pads 6 and the intervening glass-filled channels 5: one of the beam leads has been omitted from the drawing, in order to show one row of contact pads 6. Alternative- ly, the rows of front contact pads may be connected together by stitch-bonding (not shown in the drawing).
In the manufacture of the array described above with reference to Figure 1, an n-type slice 1 of the desired thickness is produced by depositing an epitaxial layer of tellurium doped GaAsP on an initial slice of silicon doped GaAs. Isolation channels 5 are then formed by etching or cutting grooves of the required width, for example 50 microns or less, from the front of the slice (that is to say the GaAsP surface) to a predetermined depth, suitably 3/4 of the thickness of the slice. The channels are filled with a proprietary glass powder slurry in a photo-resist binder medium, by spreading or spinning the slurry over the front surface of the slice, the excess slurry being scraped off the semiconductor surface areas between the channels.The slice is then heated to evaporate the solvent of the slurry, further heated in oxygen or air to fire off the binder, and finally heated at 750 C to sinter the glass particles in the channels to form a frit bonded to the semiconductor columns.
The required p-type regions are then formed by diffusing zinc into the surface areas 4, the diode matrix pattern being delineated in a suitable diffusion mask material by conventional photolithog raphictechniques and the slice being heated to 7000C for the diffusion process.
The front contacts 6, 7 are formed by vacuum evaporation of chromium and then gold, photolithographic techniques again being used for delineating the contact pattern. The back of the n-type slice is then lapped or polished to remove sufficient n-type material therefrom to expose the glass frit in the channels Sat the back surface of the structure, and the back contacts 2, composed of a gold-tin alloy, are deposited on the semiconductor columns by a procedure similar to that used for forming the front contacts. The array is heated to 500 C to effect partial diffusion of the metal of the front and back contacts into the semiconductor material, and then the beam leads 8 are formed by electroplating gold on to the requisite areas of the front surface of the array through a photolithographically produced mask.Finally the array is mounted on the substrate 3 by soldering the back contacts to a delineated metallised surface area of the substrate. The substrate suitably consists of either high resistivity silicon with a surface layer of thermal or pyrolytic silicon oxide overlaid by gold, or ceramic alumina metal lised with gold, and the solder used may be a gold-germanium alloy; the glass frit strips on the back surface of the array are not wetted by the solder. The beam leads 8 are connected to conducting tracks on the substrate (not shown) by stitchbonding.
Example 2
The array shown in Figure 2 of the drawings differs from that shown in Figure 1 in that the back contacts 2 on the columns of the array are omitted, and contacts 9 for the n-type regions are provided on the front n-type surfaces of the columns, at one or both ends of each column (only one end is shown in the drawing). In the manufacture of this array, the glass-filled isolation channels 5, the p-type regions 4 and their contacts #, 7 are formed by the procedures described in Example 1 and an additional photolithigraphic procedure is carried out to delineate the n-contacts 9, composed of vacuum evaporated gold on chromium.The contacts are partially diffused into the semiconductor material, and then the beam leads 8 are formed, also as described in Example 1, and the array is then mounted on a non-metailised area of a ceramic substrate 3 having defined conducting tracks (not shown), the composite semiconductor-glass back of the array being bonded to the substrate by means of a proprietary insulating epoxy resin. The beam leads 8 and the n-contacts are connected to the substrate tracks by stitch bonding.
Example 3.
The array shown in Figure 3 differs from that shown in Figure 1 in that each of the glass-filled isolation channels consists of a relatively wide section 10, extending from the back surface of the n-type semiconductor slice 1 to a distance of 25 microns from the front surface of the slice, and a narrower section 11 formed from the front surface of the slice to the centre of the wider channel section.
The wider and narrower channel sections 10 and 11 are, for example, 100 microns and 25 microns wide respectively. In the manufacture of this array, the slice 1 is produced as described in Example 1, and a supporting layer of silica or silicon nitride is deposited over its front surface. The channels 10 are then cut or etched from the back surface of the slice, and are filled with glass frit in the manner described in
Example 1. The slice is then re-mounted on a support layer applied to its back surface, the support layer on the front surface is removed, and the channels 11 are cut or etched from the front surface and are filled with glass frit.The support layer is then removed from the back surface, and the remainder of the steps in the manufacture of the array, comprising the formation of the p-type regions 4, front contacts 6,7 and back contacts 2, partial diffusion of the contacts, application of the beam leads 8, and mounting the array on the substrate 3, are carried out as described in Example 1.
Example 4
The process of this example includes an alternative method of filling the isolation channels with glass powder suspension, which can be employed in the manufacture of arrays of any of the forms shown in Figures 1, 2 and 3 of the drawings.
The n-type semiconductor slice is prepared as described in Example 1, and both the front and back surfaces of the slice are coated with silicon nitride (or other suitable non-conducting masking material).
The required isolation channels 5 (Figure 1 or Figure 2) or 10 (Figure 3) are delineated by removing portions of the silicon nitride coating from the front or back surface as appropriate, by a photolithographic method or by cutting through the coating, and the channels are cut or etched in the n-type material.
The slice is then immersed in a suspension of glass particles in isopropyl alcohol containing 0.25% to 1.0% by volume of a surfactant, suitably a commer dally available material designated "FC-807", the proportion of glass particles in the liquid being 10% weight/volume, and the slice being so oriented in the suspension that the longitudinal axes of the channels are orthogonal to the surface of the liquid. A platinum electrode is also immersed in the suspension, and a current of 6 to 8 mA is passed through the suspension between the slice as anode and the electrode as cathode, for 4 to 12 hours: the glass particles are negatively charged by the surfactant and are therfore deposited in the channels in the semiconductor slice.After switching off the current, the slice is slowly withdrawn from the liquid, so that as the channels emerge above the surface of the liquid they are completely filled with glass suspension drawn into them by capillary action. The slice is then dried in an oven at 100"C, and heated to effect sintering of the glass particles.
In the case of an array of the form shown in Figure 3, the above-described procedure is repeated for delineating and forming the channels 11 from the front surface of the slice, and filling them with glass powder suspension and converting the latter to glass frit.
After completion of the formation of the glassfilled channels, by either the single stage or twostage process, the diode areas are delineated by removing further portions of the silicon nitride coating from the front surface of the slice, the silicon nitride is removed from the back of the slice, the excess n-type material also being removed from the back in the case of an array of the form shown in
Figure 1 or 2, and the p-type regions, contacts and beam leads are formed as described in Example 1 or 2, the completed array finally being mounted on a substrate.
It will be understood that, in any of the methods described in the above specific examples, the steps of filling the isolation channels with glass powder slurry or suspension, removing the liquid medium and sintering the glass may be repeated as necessary to effect complete filling of the channels with glass frit, before the further processing steps are carried out.
Claims (12)
1. A process of the type specified for the manufacture of a monolithic array of light-emitting semiconductor diodes, for an electroluminescent display device, wherein the said isolation channel or channels is or are filled with a suspension of glass particles in a liquid medium, then the liquid is removed and the semiconductor slice is heated to a sufficiently high temperature to cause the glass particles to sinter so as to form a glass frit contained in the channel or channels and bonded to the semiconductor material on each side of the channel or of each channel, this procedure being repeated if necessary until each channel is completely filled with said glass frit, and the formation of the channel or channels and filling thereof with said glass frit being carried out before the formation of the said contacts on the p-type and n-type regions of the semiconductor slice.
2. A process according to Claim 1, wherein one or more isolation channels of uniform width is or are formed from the front surface of the slice of n-type material through a part, being at least half, of the thickness of the slice, and then filled with said glass frit, and subsequently the back of the slice is lapped or polished to remove n-type material until the glass frit in each channel is exposed at the back surface of the slice, so that the remaining regions of n-type material are isolated from one another by the glass frit.
3. A process according to Claim 2, wherein the said channel or channels is or are formed to a depth of from one-half to three-quarters of the thickness of the slice.
4. A process according to Claim 1, wherein the said isolation channel or channel is or are formed and filled in two stages, the process including the steps of mounting the front surface of the slice of n-type material on a first support layer, forming one or more initial channels from the back surface of the slice through nearly the whole of the thickness thereof, filling the said channel or channels with glass frit, then mounting the back surface of the slice on a second support layer and removing the first support layer from the front surface of the slice, then forming one or more further channels, corresponding in number and position to, and narrower than, the said initial channel or channels, from the front surface of the slice to meet the glass filling in the initial channel or channels, and filling said narrower channel or channels with glass frit.
5. A process according to Claim 4, wherein the said initial channel or channels is or are formed to within less than 50 microns of the front surface of the slice.
6. A process according to any preceding Claim, wherein the said suspension employed for filling the isolation channel or channels consists of a slurry of glass powder in a binder medium, and wherein the said slurry is spread or spun over that surface of the slice in which the channel opening or openings is or are situated, so as to fill the channel or channels, the excess slurry being removed from the surface areas of the slice outside and between the channel or channels before removal of the binder medium from the channel or channels and sintering of the glass therein.
7. A process according to Claim 6, wherein the said binder medium consists of a photoresist in an organic solvent, and wherein the binder is removed by exposing the slice to ultra violet radiation and then immersing it in a developer solution.
8. A process according to any of the preceding
Claims 1 to 5, wherein for introducing glass particles into the isolation channel or channels formed in the slice of n-type semiconductor material, the remaining surface areas of the slice are masked, the slice is immersed, together with an electrode, in a suspension of glass particles in a liquid containing a surfactant capable of imparting an electric charge to the glass particles, and an electric field of appropriate polarity is applied between the slice and the electrode to cause electrophoretic deposition of glass particles in the channel or channels.
9. A process according to any of the preceding
Claims 1 to 6, wherein for introducing glass particles into the isolation channel or channels formed in the slice of n-type semiconductor material, the slice is immersed in a suspension of glass particles in a liquid having high surface tension or containing a surfactant, the slice being so oriented in the suspension that the longitudinal axes of the channel or channels is or are disposed substantially orthogonalliy to the surface of the liquid, and the slice is slowly withdrawn from the suspension, so that the suspension is drawn into the channel or channels, rising above the surface of the liquid, by capillary action.
10. A process according to any of the preceding
Claims 1 to 5, wherein for introducing glass particles into the isolation channel or channels formed in the slice of n-type semiconductor material, the remaining surface areas of the slice are masked, the slice is immersed, together with an electrode, in a suspension of glass particles in a liquid containing a surfactant imparting an electric charge to the glass particles, the slice being so oriented in the suspension that the longitudinal axes of the channel or channels is or are disposed substantially orthogonalliy to the surface of the liquid, an electric field o appropriate polarity is applied between the slice and the electrode to cause electrophoretic deposition of glass particles in the channel or channels, then the electric field is removed and the slice is slowly withdrawn from the suspension, so that further deposition of the suspension in the channel or channels rising above the surface of the liquid is effected by capillary action.
11. A process according to claim 1, substantially as hereinbefore described in any one of the specific examples and with reference to Figure 1 or Figure 2 or Figure 3 of the accompanying drawings.
12. A monolithic array of light-emitting semiconductor diodes, for an electroluminescent display device, manufactured by a method according to any preceding Claim.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB7937678A GB2035689B (en) | 1978-11-20 | 1979-10-31 | Monolithic led array |
| US06/200,257 US4335501A (en) | 1979-10-31 | 1980-10-23 | Manufacture of monolithic LED arrays for electroluminescent display devices |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB7845300 | 1978-11-20 | ||
| GB7937678A GB2035689B (en) | 1978-11-20 | 1979-10-31 | Monolithic led array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2035689A true GB2035689A (en) | 1980-06-18 |
| GB2035689B GB2035689B (en) | 1983-04-13 |
Family
ID=26269666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB7937678A Expired GB2035689B (en) | 1978-11-20 | 1979-10-31 | Monolithic led array |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2035689B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0182430A1 (en) * | 1984-11-23 | 1986-05-28 | Rtc-Compelec | Light-emitting diodes array and method for its production |
| DE102013111772B4 (en) * | 2012-10-26 | 2020-10-08 | Infineon Technologies Ag | Semiconductor components and methods of manufacturing semiconductor components |
-
1979
- 1979-10-31 GB GB7937678A patent/GB2035689B/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0182430A1 (en) * | 1984-11-23 | 1986-05-28 | Rtc-Compelec | Light-emitting diodes array and method for its production |
| FR2573897A1 (en) * | 1984-11-23 | 1986-05-30 | Radiotechnique Compelec | ELECTROLUMINESCENT DIODE DIAMOND AND METHOD FOR MANUFACTURING THE SAME |
| DE102013111772B4 (en) * | 2012-10-26 | 2020-10-08 | Infineon Technologies Ag | Semiconductor components and methods of manufacturing semiconductor components |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2035689B (en) | 1983-04-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |