GB2019621B - Binary adder circuits - Google Patents

Binary adder circuits

Info

Publication number
GB2019621B
GB2019621B GB7908825A GB7908825A GB2019621B GB 2019621 B GB2019621 B GB 2019621B GB 7908825 A GB7908825 A GB 7908825A GB 7908825 A GB7908825 A GB 7908825A GB 2019621 B GB2019621 B GB 2019621B
Authority
GB
United Kingdom
Prior art keywords
adder circuits
binary adder
binary
circuits
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7908825A
Other versions
GB2019621A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Services Ltd filed Critical Fujitsu Services Ltd
Priority to GB7908825A priority Critical patent/GB2019621B/en
Publication of GB2019621A publication Critical patent/GB2019621A/en
Application granted granted Critical
Publication of GB2019621B publication Critical patent/GB2019621B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502—Half adders; Full adders consisting of two cascaded half adders
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3868—Bypass control, i.e. possibility to transfer an operand unchanged to the output

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Processing (AREA)
GB7908825A 1978-04-25 1979-03-13 Binary adder circuits Expired GB2019621B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7908825A GB2019621B (en) 1978-04-25 1979-03-13 Binary adder circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1618178 1978-04-25
GB7908825A GB2019621B (en) 1978-04-25 1979-03-13 Binary adder circuits

Publications (2)

Publication Number Publication Date
GB2019621A GB2019621A (en) 1979-10-31
GB2019621B true GB2019621B (en) 1982-02-24

Family

ID=26251877

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7908825A Expired GB2019621B (en) 1978-04-25 1979-03-13 Binary adder circuits

Country Status (1)

Country Link
GB (1) GB2019621B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4718034A (en) * 1984-11-08 1988-01-05 Data General Corporation Carry-save propagate adder

Also Published As

Publication number Publication date
GB2019621A (en) 1979-10-31

Similar Documents

Publication Publication Date Title
JPS54114941A (en) Binary multiplying circuit
JPS5289036A (en) Binary adder
EP0081632A3 (en) Adder circuit
JPS54129425A (en) Pushhpull invertor circuit
JPS54154253A (en) Binary analoggtoodigital converter
GB2012999B (en) Digital servo circuits
JPS54128233A (en) Logic circuit
GB2012137B (en) Logic circuit
DE3163646D1 (en) Binary mos-switched carry parallel adder
BE896999R (en) BINARY ADDER
DE3172895D1 (en) Digital adder circuit
JPS5583475A (en) Commutating circuit
JPS5558895A (en) Fetros circuit
GB2025740B (en) Noiseeliminating circuit
JPS5571341A (en) Binary converter
JPS54141535A (en) Binary adder
JPS5495138A (en) Carry lookkahead adder
GB2015774B (en) Digital circuit generating
JPS54113283A (en) Multiifunction circuit
JPS55112649A (en) Binary adder
JPS54141534A (en) Binary adder
GB2031680B (en) Moss-logic circuit
GB2019621B (en) Binary adder circuits
GB2019620B (en) Binary adder circuits
GB1551711A (en) Modulation circuits

Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19940313