GB1596503A - Electronic fuel injection control for an internal combustion engine - Google Patents

Description

(54) ELECTRONIC FUEL INJECTION CONTROL FOR AN INTERNAL COMBUSTION ENGINE (71) We, LUCAS INDUSTRIES LIM ITED, a British Company of Great King Street, Birmingham B19 2XF, do hereby declare the invention for which we pray that a Patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to an electronic fuel injection control for an internal combustion engine.

An electronic fuel injection control in accordance with the invention comprises a main fuel control circuit for determining the quantity of fuel injected by controlling the duration of fuel injection valve actuating pulses generated by said main fuel control in response to at least one engine operating parameter, means for generating an electrical demand signal and means for producing a single additional fuel injection valve actuating pulse of fixed duration each time the rate of increase of said demand signal exceeds a predetermined value.

Preferably the demand signal generating means is a position transducer associated with an engine throttle opening control member such as a foot pedal.

In the accompanying drawings: Figure 1 is a schematic diagram illustrating one example of an electronic fuel injection control in accordance with the invention: Figure 2 is a circuit diagram of a part of the control shown in Figure 1; Figure 3 is the circuit diagram of a temperature transducer circuit and a temperature "window" circuit forming part of the control of Figure 1; Figure 4 is the circuit diagram of a clock pulse generator forming part of the control of Figure 1; Figure 5, 6, 7 and 8 are fragmentary circuit diagrams illustrating four possible modifications to the circuit shown in Figure 2 and Figure 9 is a graph illustrating the relationship between the clock pulse generator output frequency and the engine water temperature achieved in the example of the invention shown in Figures 1 to 4.

Referring firstly to Figure 1 the overall system comprises a main digital fuel control 10 of known type utilizing digital computation techniques to produce a digital fuel demand signal in accordance with the value or values of one or more engine operating parameters selected from air intake mass flow, engine speed, air intake manifold pressure, air intake throttle position. Such parameter or parameters is or are measured by one or more transducers 11. The digital fuel demand signal is generated by means of a read only memory matrix incorporated in the control 10 which produces a multi-bit digital output signal in accordance with the value or values of digital signals addressing the matrix and derived from the transducer or transducers. The multi-bit digital signal may be used in either of two equivalent ways.Firstly, it may be transferred to a presettable counter which is then clocked to zero or it may be applied, if need be via a latch, to one input of a digital comparator whilst the output of a counter being clocked up from zero is applied to the other input of the comparator. In either case the digital signal is transformed to a pulse duration directly proportional to the digital signal and inversely proportional to the clock frequency. Figure 1 shows a clock pulsegenerator 12 which provides the clock pulses and a fuel injector control 13 which receives the pulse duration modulated signals from the main fuel control 10.

The control 13 has two output terminals to which the pulse modulated signals from the control 10 are alternately steered, each output stage of the control 13 including an open collector power transistor (not shown). These output stages are connected to two groups of solenoids 16 forming part of a bank of fuel injection valves.

Figure 1 illustrates a number of arrangements by means of which the clock pulse frequency is varied, both as a function of engine water temperature and as a function of the rate of movement of an accelerator pedal 17. The pedal 17 is linked to the slider of a potentiometer 18, which slider is connected by a buffer input stage 19 to an operational amplifier differentiating circuit 20, via a capacitor C2 (which forms a part of the differentiating circuit). The circuit has clamping feedback circuits 21 and 22 which operate respectively in acceleration and deceleration. A water temperature "window" circuit 23 which controls a sensitivity switch 24 through the intermediairy of which the output of the differentiating circuit 20 is applied to the clock 12 and also controls a time law circuit 29 at the input to the differentiating circuit 20.The "window" circuit 23 receives an input from a temperature transducer circuit 25, which also provides an input to the clock 12.

Figure 1 also shows an "extra pulse" circuit 26 which is triggered by the acceleration clamping circuit 21, but which is muted for a predetermined time after a deceleration has been demanded by an input from the deceleration clamping circuit 22. The circuit 26 has an open collector output stage connected by parallel diodes 27, 28 to the solenoids 16 as will be explained in more detail hereinafter.

Turning now to Figure 2 the potentiometer 18 is connected in series with a diode D1 between a regulated voltage supply rail 30 and an earth rail 31. The slider of the potentiometer 18 is connected via a resistor Rl and a capacitor C1 in series to the rail 31.

The common point of the resistor R1 and capacitor C1 at which there appears a filtered d.c. signal corresponding to the position of the slider of the potentiometer 18 is connected both to a terminal E (see also Figure 4) and to the base of a pnp transistor Q1 connected as an emitter fol lower buffer with its collector grounded to rail 31 and its emitter connected by a resistor R2 to the rail 30.

The emitter of the transistor is connected by a time-law switch circuit to one side of a capacitor C2 which forms the input of the differentiating circuit 20. The time law switching circuit comprises two resistors R3, R4 is series between the emitter of the transistor Ql and the capacitor C2 with resistor R3 of larger ohmic value bridged by the collector-emitter of an npn transistor Q2 which has its base connected by a resistor R5 to a terminal D, (see also Figure 3). A diode D2 has its anode connected to the common point of the resistor R4 and the capacitor C2 and its cathode connected to the emitter of the transistor Q1.

The other side of the capacitor C2 is connected by a resistor R6 to the inverting input terminal of an operational amplifier A1, the non-inverting input terminal of which is connected to the common point of two resistors R7, Rs connected in series between the rails 30, 31. Feedback around the amplifier A1 is provided by the parallel combination of a resistor R9 and a capacitor C3. The main differentiating action of the amplifier is provided the capacitor C2 and the resistor Rg which dominate the transfer function of the amplifier for low frequency signals. The resistors R6 and capacitor C3 provide an integral action at high frequency to overcome the differential action so that the transfer function at high frequencies is integral rather than differential.This eliminates or at least substantially reduces the effect of high frequency noise and interference on the differentiating circuit.

The acceleration and deceleration clamping circuits share a common biasing chain R10, R11 and R12 connected in series between the rails 30, 31. The common point of the resistors R11 and R12 is connected to the cathode of a diode D3 with its anode connected to the base of an npn transistor Q3 which has its collector connected to said other side of the capacitor C2 and its emitter connected by a resistor R13 to the emitter of pnp transistor Q4 having its collector connected to the rail 31 by a resistor R14. The base of the transistor Q4 is connected by a resistor R15 to the rail 31 and is also connected to the cathode of a diode D4 which has its anode connected to the output terminal of the amplifier Al.

The common point of the resisistors Rlo and R11 is connected by two diodes D5, D6 in series to the base of a pnp transistor Q5, the collector of which is connected to said other side of the capacitor C2. The emitter of the transistor Q5 is connected by a resistor R16 to the emitter of an npn transistor Q6 the collector of which is connected by a resistor R17 to the rail 30.

The base of the transistor Q6 is connected directly to the output terminal of the ampli fierA1.

The bases of the transistors Q. Q5 are interconnected by a resistor R15.

In steady state conditions the output terminal of the amplifier Al will be at a voltage set by the resistors R7 and Rs. This will set the voltage at the base of the transistor Q4 higher than the voltage at the base of the transistor Q3 so that neither of these will conduct and similarly the transistors Q5, Q6 will be off.

During acceleration the output of the amplifier Al falls to a level determined by the rate of increase of the voltage at the slider of the potentiometer 18. Should this output voltage fall to a level lower than that at the junction of the resistors R11 and R12, the transistors Q3 and Q4 will both turn on, diverting sufficient current from the capacitor C2 to hold the amplifier output constant.

When the increase in input voltage ceases capacitor C2 can charge through the resistor R4 and the transistor Q2 (assuming this to be conductive) and the amplifier output returns to its previous voltage at a rate determined by such charging. If the transistor Q2 is not conductive, the inclusion of the resistor R3 is the charge path of the capacitor C2 causes delaying of the release of clamping and also increase of the duration of charging.

In deceleration, the output of the amplifier Al increases and eventually turns on transistors Q5 and Q6 to provide the clamping action, when the voltage at the base of transistor Q1 ceases to fall the capacitor C2 discharges rapidly via the diode D2 irrespectively of whether the transistor Q2 is conductive or not.

The diodes D3 and D4 are included to compensate for the base-emitter voltages of the transistors Q3 and Q4 so that no temperature drift effects occur. Similarly the baseemitter voltages of the transistors Q5 and Q6 are compensated for by the diodes D5 and D6.

The output terminal of the amplifier Al is connected to the rail 30 by two resistors R19, R20 in series and to an output terminal A by a resistor R2l, pnp transistor Q7 has its emitter connected to the common point of the resistors R19 and R20, its collector connected to the terminal A and its base connected by a resistor R23 to the terminal D. The transistor Q7 constitutes the sensitivity switch 24 of Figure 1.As will be explained hereinafter the terminal A is held at a fixed voltage such that the amplifier A1 draws current from terminal A via the resistor R21. When transistor Q1 is on the resistors R19, R20 are arranged to draw no current from terminal A when the signal output is steady, but the overall gain of the circuit is increased - i.e. the current drawn by the amplifier Al from the terminal A increases for a given rate of increase of the input signal from the accelerator pedal potentiometer 18.

Figure 2 also shows the extra pulse circuit 26. This is constituted by a transistor Q8 with its emitter grounded to the rail 31 and its collector connected by two resistors R24, R25 in series to the rail 30. The junction of the resistor R.4, R25 is connected by two resistors R26, R27 in series to the rail 31 and by a resistor R28 to the inverting input terminal of a voltage comparator A2, a diode D7 bridging the resistor R28 and a capacitor C4 connecting the collector of the transistor Q8 to the inverting input terminal of the comparator A2. The non-inverting input terminal of the comparator A2 is connected by a resistor R29 to the junction of the resistors R26, R27. The non-inverting input terminal is also connected by a resistor R30 to a terminal C' (see Figure 3).The output terminal of the comparator A2 is connected by a resistor R31 to the rail 30 and by two resistors R32, R33 in series to the rail 31. The common point of the resistors R32, R33 is connected to the base of a transistor Q9, the emitter of which is grounded to the rail 31 and the collector of which is connected to the cathodes of the diodes 27, 28.

When the transistor Q4 turns on as the acceleration clamping level is reached current flows in resistor R14 flows until at some point the transistor Q8 turns on. This reduces the voltage at the junction of the resistor R24 and the capacitor C4. Initially, however, capacitor C4 draws current through the resistor R28 and thus causes the output of the comparator A2 to go high until the capacitor C4 is charged to a given level.

The transistor Qg conducts for the duration of this pulse, causing an additional injection action from all the injectors simultaneously.

When the transistors Q4 and Q8 turn off again the diode D7 allows rapid discharge of the capacitor C4, and limits the voltage excursion of the inverting input terminal of the comparator A2 For muting the extra pulse circuit just described an npn transistor Qlo has its emitter connected to the rail 31 and its collector connected to the non-inverting input terminal of the comparator A2. The base of the transistor Q1, is connected to the common point of two resistors R34 and R35 connected in series between the rail 31 and the collector of a pnp transistor Q11. The base of Qllis connected to the collector of the transistor Q6 and its emitter is connected to the rail 30.A capacitor C5 is connected between the base and collector of the transistorQ1t When the transistor Q6 turns on as the deceleration clamping level is reached, the transistor Q,l turns on at a predetermined higher level set by the resistor R17 thereby turning on transistor Q1(, and grounding the non-inverting input terminal of the comparator A2. The transistor Q11 does not turn off immediately the transistor Q6 turns off because the capacitor C5 continues to supply base current to the transistor Q11 for a predetermined period, thereby preventing operation of the extra pulse circuit for a predetermined time after a "clamping level" decleration has taken place.This muting arrangement comes into play when rapid pedal movements are executed such as during gear changing or during repeated acceleration of an unloaded engine prior to pulling away from rest.

The temperature dependent circuit of Figure 3 includes a thermistor R40 sensitive to the engine cooling water temperature.

The thermistor R40 is connected between the base of a pnp transistor Q12 and the rail 31 in parallel with a resistor R4l a resistor R42 being connected between such base and the rail 30. The collector of the transistor Q12 iS connected to the rail 31 and its emitter is connected by a resistor R43 to the rail 30 and is also connected to a terminal C and to the anode of a diode D8 with its cathode connected by a resistor R85 to the rail 31 and also connected to the terminal C'. The cathode of the diode D8 is also connected via a resistor R44 to the inverting input terminal of a voltage comparator A3, a further resistor R45 connecting this input terminal to the inverting input terminal of a further voltage comparator A4.The noninverting input terminals of the comparators A3 and A4 are connected to the common points of three resistors R46, R47 and R48 connected in series between the rails 30 and 31 so that the non-inverting input terminal of the comparator A3 is at a higher voltage than that of comparator A4. Positive feedback resistors R49, R50 connect the output terminals of the two comparators A3, A4 to their non-inverting input terminals so as to provide a small amount of hysteresis to prevent spurious triggering of the comparator. The output terminal of the comparator A3 is connected to the inverting input terminal of the comparator A4 and a load resistor R51 is connected between the rail 30 and the output terminal of the comparator A4 which is connected to the terminal D.

The voltage at the terminal C falls substantially linearly over the normal working range of the system. At low temperatures (e.g. below 15"C) the output of the comparator A3 is low and that of the comparator A4 is therefore high. As the temperature rises and the voltage at terminal C falls, the comparator A3 switches so that the output of the comparator A4 goes low. As the temperature continues to rise the comparator A4 switches (at about 60"C) and its output goes high again.

Turning now to Figure 4, the clock pulse generator includes a pnp transistor Q13 with its base at a fixed voltage (of about 3.3V) and its collector connected by a capacitor C6 to the rail 31. The emitter of the transistor Q13 is connected by a resistor R52 to the rail 30 and is also connected to the terminal A.

The terminal C of Figure 3 is also arranged to provide an input to the clock circuit to vary the proportion of the current in resistor R52 which enters the emitter of the transistor Q13. The terminal C is connected to the base of two npn transistors Q17 and Q18 which have their collectors connected to the emitter of the transistor Q13. The emitter of the transistor Q17 is connected to the common point of two resistors R86 and R87 connected in series between the rails 30, 31.

Similarly the emitter of the transistor Q15 is connected to the common point of two resistors R88, Rgg connected in series between the rails 30, 31. The resistors R86 to R89 are chosen so that the.transistor's Q17, Q18 switch off at different voltage levels of terminal C. Thus the current drawn by the transistors Q1, Q,, will decrease with increasing temperature, initially at a relatively steep slope until the transistor Q17 turns off and then at a shallow slope until transistor Q18 turns off. At higher temperatures the current drawn through the resistor R52 is not temperature dependent.The collector of the transistor Q13 is connected to the noninverting input terminal of a comparator A5 which has a load resistor R54 connected between its output terminal and the rail 30.

The inverting input terminal of the comparator A5 is connected by a resistor to the common point of two resistors R55, R56 connected in series between the rails 30 and 31. The output terminal of the comparator A5 is connected to the base of an npn transistor Q14 the emitter of which is connected by a resistor R58 to the rail 31 and the collector of which is connected to the inverting input terminal of the comparator A5. A second npn transistor Q15 has its base connected to the emitter of the transistor Q14, its emitter grounded to the rail 31 and its collector connected to the non-inverting input terminal of the comparator A5.Because of the fixed voltage bias on the base of the transistor Q13 its emitter is held at a fixed voltage (about 4V) and the current passing through the resistors R52 is constant.

A very small amount of this current passes through the base-emitter junction of the transistor Q13 and variable amounts are sunk via the terminal A and via the transistors Q17 and Q18 depending on the conditions in the Figure 1 circuit and the temperature respectively. The remaining current passes into the capacitor C6 charging it linearly whenever the transistor Q15 is off.

This occurs whenever the output of the comparator A5 is low so that the voltage at the non-inverting input terminal of the comparator rises linearly until it exceeds the voltage set at the inverting input terminal.

The output of the comparator A5 now goes high turning on both transistors Ql4 and Q,5. The transistors Ql4 causes the voltage at the inverting input terminal to be reduced by drawing current through the resistors R55 and Ras7, thereby increasing the speed of switching and the transistor Q15 discharges the capacitor C6, rapidly. The comparator AS then switches back to its original state and the cycle re-starts. For a fixed voltage at the junction of the resistors R55, R56 the frequency of the clock is proportional to the capacitor C6 charging current.

The voltage at the junction of resistors R55 and R56 is not, however constant because of the effect of the components shown at the left hand side of Figure 4. These components include a voltage comparator A6 which has its non-inverting input terminal connected by a resistor R60 to the terminal E (of Figure 2) and its inverting input terminal connected to the common point of two resistors R61, R62 connected in series between the rail 31 and the cathode of a diode D9 the anode of which is connected to the rail 30. The comparator A6 has positive feedback from its output terminal to its non-inverting input terminal via a resistor R63 and a further resistor R64 connects the non-inverting input terminal the rail 31.A resistor R65 connects the output terminal of the comparator A6 to the rail 30 and a resistor R66 connects this output terminal to the junction of the resistors R55 and R56 The comparator A6 is set so that its output is normally low but goes high when the accelerator pedal is nearly fully depressed. This causes an increase in the voltage at the junction of the resistors R55 and R56 and therefore decreases the clock frequency and increases the quantity of fuel injected for a given fuel demand signal.

In addition two resistors R67 and R68 are connected in series between the rail 30 and the junction of the resistors R55 and R56.

These normally increase the voltage at the junction of R55 and R56 slightly, but a terminal F at the junction of the resistors R67 and R68 is provided and can be grounded whenever it is intended that the vehicle in which the fuel injection control is installed is to be used predominantly at high altitudes. This increases the clock frequency and reduces the fuel injected.

Turning now to Figure 9, the graph shows the overall effect of temperature on the clock frequency. The line A is the steady state frequency curve and the lines B and C show the limits of frequency variation resulting from clamping of the differentiating circuit in acceleration and deceleration respectively.

Below 15"C and above 60"C the transistor Q7 iS off because the output of the comparator A4 which controls it is high. Relatively narrow limits of acceleration enrichment and deceleration enleanment are then permitted. In between 15"C and 60"C the output of the comparator A4 goes low turning on the transistor Q7 and the overall gain of the differentiator (considered as a current sink) increases.

In the modification shown in Figure 5 gain variation with temperature is obtained by switching in and out an additional resistor R70 in parallel with the resistor Rg. This is effected by means of an npn transistor Q16 with its collector connected by the resistor R70 to the inverting input terminal of the amplifier A1 and its emitter connected to the output terminal of the amplifier A1. A bias resistor R71 is connected between the base and emitter of the transistor Q16 to bias it off and a diode D10 and a resistor R69 in series connect the base of the transistor to the terminal D to turn the transistor Q16 on at extreme temperatures and thereby reduce the gain of the differentiating circuit.

The modification shown in Figure 6 affects the time law switch based on transistor Q2. Instead of varying a resistance in series with the capacitor C2, the transistor Q2 now introduces a capacitor C7 and resistor R72 in series with one another across the capacitor C2. This not only changes the time constants in the manner required but also varies the gain of the differentiator so that the transistor Q7 of Figure 2 can be omitted completely. The diode D2 must also be emitted so that time law variations apply to acceleration and deceleration clamping.

The modification shown in Figure 7 includes a quite different form of arrangement for varying the effect of the differentiation on the clock frequency with temperature. In this case the output of the amplifier Al is connected by a resistor R73 to the common point of a pair of resistors R74 and R75 connected in series between the rails 30 and 31. The emitter of a transistor Q17 is connected to this same common point, the collector of this transistor being connected to the terminal A and its base being connected by a resistor R76 to the terminal C.

This modification can be used in conjunction with the modifications shown in Figures 5 and 6 which give gain variation by alteration of feedback or by alteration of the input capacitance of the differentiating circuit.

Turning finally to Figure 8 a different arrangement is shown for determining the clamping threshold levels. In this case separate potential dividers are used for biasing the acceleration and deceleration clamp circuits. The resistors R5( and R81 connected in series between the rails 30 and 31 have their common point connected to the cathode of the diode D3. Two further resistors R82 and R83 connected in series between the rails 30, 31 have their common point connected to the anode of the diode D5. The terminal D is connected to the cathode of a diode D12 with its anode connected to the common point of the resistors R80 and R8l so that only the acceleration clamping threshold is altered when the signal at D goes low.

Our copending UK Patent Applications Nos 45859/76, (Serial No. 1596501) 45860/ 76, (Serial No. 1596502) and 45862/76.

(Serial No. 1596504) relate to inventions having some features in common with the present invention.

Our prior Patent No. 1482194 discloses and claims the use of a variable frequency clock pulse generator in an engine control system.

WHAT WE CLAIM IS: 1. An electronic fuel injection control for an internal combustion engine comprising a main fuel control circuit for determining the quantity of fuel injected by controlling the duration of fuel injection valve actuating pulses generated by said main fuel control in response to at least one engine operating parameter, means for generating an electrical demand signal and means for producing a single additional fuel injection valve actuating pulse of fixed duration each time the rate of increase of said demand signal exceeds a predetermined value.

2. An electronic fuel injection control as claimed in claim 1 in which said demand signal generating means is a position transducer associated with an engine throttle opening control such as a foot pedal.

3. An electronic fuel injection control as claimed in claim 2 in which said additional pulse producing means comprises an electronic differentiating circuit connected to said transducer and means for detecting when the output of the differentiating circuit exceeds a predetermined level presenting said predetermined value of the rate of change of the demand signal.

4. An electronic fuel injection control as claimed in claim 3 in which said differentiating circuit has associated with it a clamping circuit operable to limit the differentiating circuit output to said predetermined level, the clamping circuit being connected to a pulse generator for producing said additional pulses.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (4)

**WARNING** start of CLMS field may overlap end of DESC **. (Serial No. 1596504) relate to inventions having some features in common with the present invention. Our prior Patent No. 1482194 discloses and claims the use of a variable frequency clock pulse generator in an engine control system. WHAT WE CLAIM IS:

1. An electronic fuel injection control for an internal combustion engine comprising a main fuel control circuit for determining the quantity of fuel injected by controlling the duration of fuel injection valve actuating pulses generated by said main fuel control in response to at least one engine operating parameter, means for generating an electrical demand signal and means for producing a single additional fuel injection valve actuating pulse of fixed duration each time the rate of increase of said demand signal exceeds a predetermined value.

2. An electronic fuel injection control as claimed in claim 1 in which said demand signal generating means is a position transducer associated with an engine throttle opening control such as a foot pedal.

3. An electronic fuel injection control as claimed in claim 2 in which said additional pulse producing means comprises an electronic differentiating circuit connected to said transducer and means for detecting when the output of the differentiating circuit exceeds a predetermined level presenting said predetermined value of the rate of change of the demand signal.

4. An electronic fuel injection control as claimed in claim 3 in which said differentiating circuit has associated with it a clamping circuit operable to limit the differentiating circuit output to said predetermined level, the clamping circuit being connected to a pulse generator for producing said additional pulses.