GB1592700A - Two-wire transmitter for use in an admittance measuring system for monitoring the condition of materials - Google Patents

Description

(54) A TWO-WIRE TRANSMITTER FOR USE 1N AN ADMITTANCE MEASURING SYSTEM FOR MONITORING THE CONDITION OF MATERIALS (71) We, DREXELBROOK CONTROLS, INC., a corporation organized under the laws of the State of Pennsylvania, United States of America, of 205, Keith Valley Road, Horsham, Pennsylvania 19044, United States of America, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: This invention relates to a two-wire transmitter for use in a two-wire transmitter system comprising a power supply and a load at one location and a two-wire transmitter at another location interconnected by a pair of transmission lines carrying a variable signalling current, and particularly to such a twowire transmitter for use in an admittance measuring system for monitoring the condition of materials.

The invention provides a modification of or alternative to the system described in our U.K. Patent 1,528,167. This Patent (our earlier patent) describes the background in this field, and reference should first be made thereto.

The present invention is defined in the appended claim 1, to which reference should now be made. Preferred features of the invention are defined in the sub-claims.

The invention will now be described in more detail by way of example, with reference to the accompanying drawings, in which: Fig. 1 is a block diagram of a two-wire transmitter representing embodiment of the invention; and Fig. 2 (and) are schematic diagrams of circuitry shown in block form in Fig. 1 where the diagram has been split along lines y-y and z-z.

An embodiment of the invention will now be described with reference to Fig. 1. As shown therein, terminals 20 and 22 of the two-wire transmitter are connected to the full wave rectifying bridge comprising diodes 70, 72, 74 and 76 as described in our earlier Patent. The diodes of the full wave rectifying bridge permit the polarity of the terminals 20 and 22 to be reversed without risk of damaging the transmitter or affecting the operation thereof. A spark protection Zener diode 502 is connected across the full wave rectifying bridge so as to limit the voltage which can be applied to the signal processing circuitry.

The output from the full wave rectifying bridge is connected to a voltage regulator 500 which supplies substantially constant voltages for various components of the transmitter thereby avoiding any inaccuracies in measurements due to undesirable variations in the supply voltage of the transmitter.

The admittance responsive network comprises a ramp-type admittance bridge. One side or half 790 of the bridge comprises a current source including a fixed zero current source 800 and a span current source 802 where resistance is included in the zero and span current sources. Both the zero current source and span current source are connected to the unknown admittance which is in series with a capcitor 803. The zero current source establishes a reference value of the unknown admittance while the span current source, having a magnitude controlled by an internally generated feedback voltage so as to rebalance the bridge, establishes the full scale range of the bridge. The reference side or half 792 of the bridge comprises a resistance 804 in series with a capacitor 806.

The time required for the current sources 800 and 802 to change the voltage across the unknown admittance between probe and ground in ramp-like fashion is compared to the same time required for the reference resistance 804 to change the voltage across the reference capacitor by a fixed amount in the following manner. A reset circuit 808 including a comparator 810 is connected across the capacitor 803 and the probe-toground admittance. As shown in Fig. 1, the positive input to the comparator 810 is connected to the junction of the capacitor 803 and the current sources 800 and 802. The negative input to the comparator 810 is connected to a reference voltage 812. With switches 814 and 816 in the position shown, the unknown admittance from probe-toground and the capacitor 803 are free to charge in ramp-like fashion in response to current flow from the sources 800 and 802.

Simultaneously, a comparator 818 of the time difference detector circuit 820 compares the voltage across the reference capacitor 806 with a reference voltage 822. With a switch 824 of the reset circuit 808 in the position shown, the capacitor 806 is free to charge. By providing the reference resistor 804 and the reference comparator 806 with a shorter time constant than the time constant associated with the capacitor 803, the probeto-ground admittance and the resistance associated therewith, the comparator 818 will produce a change in state of this output before the comparator 810 produces a change in the state of its output. When the positive input to the comparator 810 rises to a sufficiently high level, the state of the output from the comparator 810 will change which in turn changes the state of the switches 814, 816 and 824 to the opposite positions. When the switch 816 is in the opposite position, a reset voltage is applied to the negative input of the comparator 810. During the reset period, the voltage across the probe-toground capacitance and the voltage across the reference capacitor 806 diminish until such time as the voltage applied to the positive input of the comparator 810 falls below the reset voltage reference VRs. At that time, the switches 814, 816 and 824 revert to the position shown and a new charging cycle is initiated. Upon reset, the output from the comparator 818 changes state so as to produce a pulse output representing the magnitude of the unknown admittance from probe to ground. In other words, the pulse width of the square wave represents the time difference in charging of the reference capacitor 806 vis a vis the probe-to-ground admittance.

The square wave output from the comparator 818 which is generated by switch means 826 is applied to a low pass filter 828 to obtain an average DC voltage at the output of the filter which is proportional to the difference in charge rate of the probe-to-ground admittance relative to the reference admittance 806. The output from the low pass filter 828 is applied to an amplifier 830 which produces a feedback voltage for controlling the span current source 802.

The output from the time difference detector 820 is then applied to a modulator 832.

The modulator 832 which is directly connected to the probe circuitry is isolated from the remainder of the transmitter circuitry by an isolating transformer 834 comprising a primary 836 and a secondary 838. Modulation is achieved by chipping the DC output from the amplifier 830 in response to the output from an oscillator 840. The chopping circuitry of the modulator 832 is depicted as an amplifier 842 in combination with switch means 844.

The oscillator 840 comprises a square wave oscillator section 846 which is directly connected to the voltage regulator 500 and an isolated supply section 848 which is coupled to the square wave oscillator 846 by an iso- lating transformer 850. The secondary of the isolating transformer 850 of the isolated supply 848 provides the chopper drive for the modulator 832. The isolated supply section 848 also provides a +11 and +5 volt supply to that portion of the two-wire transmitter circuitry which is connected directly to the probe and ground. The remainder of the transmitter circuitry including a demodulator 852 and an output circuit 854 are supplied by a +10 volt output from the voltage regulator 500.

As shown in Fig. 1, the demodulator 852 comprises a synchronous rectifier depicted by an amplifier 856 and switch means 858 which demodulate the square wave produced at the secondary 838 of the transformer 834. The resulting full wave rectified voltage is applied to a low pass filter 860 to remove AC components prior to application to the output circuit 854.

The output circuit 854 comprises an output amplifier 530 as well as a transistor 532 and resistors 534, 536 and 538. In addition, the output circuit 854 comprises a bias network 862 connected between common and the inverting terminal of the amplifier 530 and a resistor 864 connected between the low pass filter 860 and the non-inverting terminal of the amplifier 530.

In the embodiment of Fig. 1, a shield buffer 865 is provided for use in conjunction with a shield terminal which serves as a guard electrode to prevent long cables and coatings from influencing the measurement of the admittance from probe to ground. The shield buffer 865 comprises an amplifier 866 having a non-inverting terminal connected to the probe terminal and the output of the amplifier 866 connected to the shield terminal so as to drive the shield or guard electrode at substantially the same potential as the probe so as to eliminate the effect of long cables and coatings on the measurement.

As also shown in Fig. 1, the unknown admittance side of the bridge 790 provides circuitry for protecting the probe and shield terminals. More particularly, a pair of parallel reverse poled diodes 868 are connected between the probe and shield terminals. In addition, a pair of reverse poled Zener diodes 870 are connected from the shield to ground.

In this configuration, the shield tends to break up any stray coupling path through th diodes 868 and 870.

The embodiment of Fig. 1 will now be described in further detail with reference to Figs. 2 (a-d). As shown in Fig. 2a, the voltage regulator 500 comprises Transistors 540 and 542. The collector of the transistor 540 establishes a +10 volt regulated supply where the collector of the transistor 540 is connected to the emitter of the transistor 542 through a temperature compensating diode 544 in series with a reverse poled diode 546.

The emitter of the transistor 542 is connected to regulated circuit common through a resistor 548 and resistors 550 and 552 establish a bias for the base of the transistor 542. A capacitor 554 acts as a filter for the voltage regulator. In addition, the voltage regulator 500 comprises a start-up resistor 900 between the B+ line and the +10 volt line.

As also shown in Fig. 2a, the oscillator 840 comprises a multivibrator including transistors 902 and 904, capacitors 906 and 908, and resistors 910, 912, 914 and 916. The isolation transformer 850 which provides high voltage isolation between the portion 846 includes a transformer primary 918 which is directly connected to the two transmission lines and the portion of the oscillator circuit 848 comprising a secondary 920 which supplies the portion of the transmitter which is connected to the probe and ground. The output from the secondary 920 is rectified by diodes 922 and filtered by capacitors 924 so as to provide supply voltages for the +11 and + 5 volt lines. A modulating signal is derived from a terminal 926 of the secondary 920 which is grounded at the center tap.

Referring now to Fig. 2c, the side 790 of the bridge which incorporates the unknown admittance from probe-to-ground will now be described in detail. As stated previously, the zero current source 800 and the span current source 802 are connected in series with the capacitor 803 and the unknown admittance from probe-to-ground. The zero current source 800 is controlled by a voltage picked off the +5 volt supply line by a fine zero potentiometer 928 which is connected in series with the resistors 930 and 932. The potentiometer 928 is connected to the non-inverting terminal of an operational amplifier 934 which has an output coupled to transistors 936 and 938 with the collector of the transistor 936 connected to the capacitor 803 through a resistor 940. The emitter of the transistor 936 and the collector of the transistor 938 are connected to a step zero resistance 942 (which has been shown as a potentiometer for simplicity). A feedback voltage is developed across the step resistance 942 which is applied to the inverting terminal of the operational amplifier 934. The current flow from the operational amplifier 934 will increase or decrease in response to changes in the variable resistance 942 so as to achieve a balance between the input at the inverting terminal and the input at the non-inverting terminal of the operational amplifier 934. In this connection, it will be understood that as the voltage from the fine zero potentionmeter 928 goes more negative, a larger current will flow from the zero current source 800. The zero current source 800 further comprises a resistor 944 in series with a capacitor 946 which is connected between the output of the operational amplifier 934 and the +5 volt supply line. A supply resistor 948 is connected between the +5 volt supply line and the operational amplifier 934.

The span zero current source 802 comprises the same components as the zero current source 800. For the sake of brevity and simplicity, the same reference characters on Fig. 14b have been utilized with the addition of the letter "s" indicating a component of the span current source. The only difference between the span current source 802 and the zero current source 800 is the use of a feedback voltage at the non-inverting input of the operational amplifier 934s so as to maintain balance between the unknown admittance side 790 of the admittance bridge and the reference side 792 of the admittance bridge.

It will be noted that the operating controls for that portion of the transmitter which is connected to ground, i.e., fine zero, step zero, fine span and step span, are all direct current controls as contrasted with RF controls. More particularly, the operating controls comprise variable rssistances in the zero current source and the span current source so as to adjust the charging rate of the unknown admittance probe to ground.

Referring to Fig. 2d, the reset circuit 808 comprises a transistor 950 which serves as the switch 840 which is coupled to the positive terminal of the comparator 810. A field effect transistor 952 in conjunction with a transistor 954 functions as the switch means 816 to control the negative input to the comparator 810. A transistor 956 connected across the reference capacitor 806 serves as the switch 824.

The operation of the reset circuit 808 is as follows. The zero current source 800 and the span current source 802 charge the capacitor 803 and the unknown admittance as shown in Fig. 2c until the voltage thereacross is equal to the voltage at the negative input of the comparator amplifier 810 as determined by the +5 volt supply in conjunction with resistors 958, 960, 962, 964 and 966. At this time, the comparator amplifier 810 turns on the field effect transistor 952 causing the reset function to be implemented and at the same time reducing the voltage on the negative input of the comparator amplifier 810 via the resistor 962 to a small voltage.

Simultaneously, the transistor 954 turns on the transistor 950 which discharges the admittance formed by the capacitor in series with the unknown admittance until the voltage thereacross falls below the voltage present on the negative input of the comparator amplifier 810. The reset function is then terminated and the charge cycle repeats. The reset circuit also comprises resistors 968, 970, 972 and 974 which bias the transistors 950 and 956. In addition, a supply resistor 976 connects the comparator amplifier 810 to the + 5 volt supply line.

As shown in Fig. 2d, the reference side of the bridge 792 comprises the reference capacitor 806 and the reference resistor 804. By providing a time constant for the reference side 792 of the bridge which is shorter than that of the current sources and the admittance formed by the capacitor 803 and the unknown admittance from probe to ground, the comparator amplifier 818 will trip before the comparator amplifier 810. The voltage across the capacitor 806 is compared with the voltage generated by the divider comprising resistors 978 and 980.

The switch 826 referred to in Fig. 1 comprises a field effect transistor 982 which is connected to the + 5 volt supply line through a resistor 984 and to the positive input of the amplifier 990 through a resistor 986 which is also connected to the +5 volt supply line through a capacitor 988. When the comparator amplifier 818 is tripped, the voltage at the junction of the transistor 982 and resistors 986 and 984 will be pulled down toward ground. When the reset function is initiated, the transistor 956 in the reset circuit 808 will discharge the capacitor 806 to reset the voltage at the junction of the transistor 982 and resistors 986 and 984 will return to +5 volts. The resistor 986 and the capacitor 988 form the low pass filter 828 which filters the resulting square negative pulse in obtaining DC voltage proportional to the charge time difference between the reference half of the bridge 792 and the unknown reference side of the bridge 790.

The voltage across the capacitor 988 is amplified by an amplifier 990 which is supplied by the +5 volt supply line through a resistor 992. The gain of the amplifier 990 is proportional to the ratio of the sum of a feedback resistor 992 and a resistor 994 to the resistor 994 alone. The output from the amplifier 990 is fed back to the unknown side of the bridge 790, and more particularly, to the span current source 802 so as to control the amplifier 934s.

The output from the amplifier 990 is also chopped in the modulator 832 by the switch means 844 comprising field effect transistors 996 and 998. The modulation is synchronous with the drive from the isolating transformer 920 shown in Fig. 2a at the terminal 926 which is applied to the junction of the field effect transistors through a capacitor 1000.

The bias at the junction of the field effect transistors 996 and 998 is derived from series connected resistors 1002 and 1004. The resulting square wave produced by the field effect transistors 996 and 998 is coupled to the isolating transformer 834 through a capacitor 1008.

The output from the secondary 838 of the transformer 834 is coupled to the demodulator 852 which will now be described with reference to Fig. 2b.

The square wave of varying amplitude which is coupled to the demodulator 852 is synchronously rectified by the switch means 858 comprising field effect transistors 1010, 1012, 1014 and 1016. The junction of the field effect transistors is driven by a square wave generated at the oscillator 840 which is coupled through a capacitor 1018 to the gates of field effect transistors 1020 and 1022.

Resistors 1024 and 1026 bias the gates of the transistors 1020 and 1022. The resulting full wave rectified voltage is applied to the filter 860 comprising a resistor 1028 and a capacitor 1030. The DC output voltage from the filter 860 is fed to the output circuit 854 comprising the output amplifier 530, the transitor 532 and the resistors 864, 534, 536 and 538. The output circuit 854 also comprises a resistive bridge including resistors 1032, 1034 and 1036. The resistor 538 also forms part of this resistive bridge which is unbalanced in response to a positive voltage across the capacitor 1030. The resulting positive input to the amplifier 530 causes the output current to be increased and this output current is measured by the resistor 536 which develops a voltage proportional thereto. This voltage is placed in series with the resistor 538 thereby rebalancing the resistive bridge at the desired output current. In this way, the output current is held constant as a function of the voltage obtained from the demodulator 852. The current drawn by the output stage of the amplifier 530 is drawn through emitter follower transistor 532 from the B+ line, thereby avoiding any tendency of the output current to deregulate the 10 volt power supply. In this manner, any tendency of the output current to interfere with the operation of the other circuits is eliminated. The output circuit 854 further comprises a supply resistor 1038 and a series RC combination including a resistor 1040 and a capacitor 1042. A capacitor 1044 is connected in parallel with the resistor 1034.

Referring now to Fig. 2c, the shield buffer 864 will be described. The base of a transistor 1046 forms a positive input to the shield buffer amplifier 866. The base receives the probe voltage through a capacitor 1048 where the operating point of the transistor 1046 is established by the resistive divider comprising resistors 1050, 1052 and 1054 which is bootstrapped to the output of the amplifier by a capacitor 1056. The negative input of the amplifier 866 comprises the emitter of the transistor 1046. The emitter is connected directly to the output providing 100% negative feedback for the amplifier 866. Thus the shunting effect of the resistor 1054 on the input of the amplifier 866 is reduced by the gain of the amplifier. The current drawn by the transistor 1046 is proportional to the error voltage, i.e., the voltage at the base minus the voltage at the emitter, times the forward transfer admittance of the transistor 1046. This current generates a voltage across the resistor 1060 and is amplified by a transistor 1058. The output voltage from the collector of the transistor 1058 is applied to the bases of transistors 1062 and 1064 which function as emitter followers so as to substantially reproduce the voltage at the output of the transistor 1058 at a much lower impedance. The emitter follower transistors operates Class A/B, and the standby bias current is estat lished by series connected diodes 1066 and 1068 and resistors 1070 and 1072. The diodes 1066 and 1068 compensate for the base emitter voltage of the transistors 1062 and 1064. The resistor 1070 establishes the voltage which the transistors will maintain across the resistor 1072. Since the diodes and the transistor base-emitter junctions have similar temperature coefficients, the bias current will remain substantially unchanged as the temperature of the amplifier varies.

A capacitor 1074 maintains the same drive voltage at the base of both transistors while a capacitor 1076 maintains a low output impedance for positive as well as negative output currents. A capacitor 1078 forms the dominant pole of the amplifier 866 allowing its gain to roll off to unity below the frequency at which 1800 phase shift is obtained. In this manner, the amplifier 866 is prevented from parasitic oscillation. The output of the amplifier 866 is coupled through a capacitor 1080 to the shield terminal so as to eliminate any DC from the shield and thereby prevent electrolytic corrosion of the shield electrode.

A resistor 1082 is connected from the shield electrode to ground.

Although a preferred embodiment of the invention has been shown and described, it will be understood that various modifications may be made without departing from the true scope of the invention as set forth in the

Claims (20)

appended claims. WHAT WE CLAIM IS:

1. For use in a two-wire transmitter system comprising a power supply and a load at one location and a two-wire transmitter at another location interconnected by a pair of transmission lines carrying a variable signalling current, a two-wire transmitter comprising: an admittance sensing probe including a probe electrode adapted to sense the condition and corresponding admittance of materials; an admittance responsive network coupled to said probe representing the condition of materials; and output means coupled to said admittance responsive network for varying the signalling current in response to the condition of materials; wherein said admittance responsive network comprises: first admittance means coupled to said sensing probe so as to include the admittance of said materials; second admittance means comprising a reference admittance; charge current means coupled to said first admittance means and said second admittance means for charging thereof; discharge means coupled to said first admittance means and said second admittance means for discharging thereof; and charge rate detection means for detecting the difference in charging rates between said first admittance means and said second admittance means.

2. The transmitter of claim 1 wherein said charge current means comprises a first zero current source and a second span current source.

3. The transmitter of claim 1 wherein said first admittance means and said second admittance means comprises an admittance bridge.

4. The transmitter of claim 3 wherein said first admittance means forms a first side of said bridge and said second admittance means forms a second side of said bridge, said charge rate detection means detecting a difference in time to charge said first side as compared with said second side.

5. The transmitter of claim 4 wherein said bridge and said charge current means are DC isolated from said transmission lines.

6. The transmitter of claim 5 wherein charge current means comprises means for adjusting the DC charging current by adjusting DC current flow.

7. The transmitter of claim 4 further comprising feedback means coupling said charge rate detection means to said current source means for rebalancing said bridge.

8. The transmitter of claim 1 including guard means and guard amplifier means having an input coupled to said sensing probe and an output coupled to said guard means for driving said guard means at substantially the same potential as said sensing probe.

9. The transmitter of claim 8 comprising parallel reverse poled diodes coupled between said sensing probe and said guard means and a pair of series reverse poled Zener diodes coupled between said shield means and ground.

10. The transmitter of claim 1 wherein said admittance responsive network is supplied by said power supply through said pair of transmission lines.

11. The transmitter of claim 10 wherein said output means comprises means forgenerating a feedback signal substantially proportional to the signal current.

12. The transmitter of claim 11 wherein said output means comprises modulator means coupled to said charge rate detection means for generating an AC signal representing the feedback signal, demodulator means for demodulating the modulated AC signal, DC isolation means for coupling demodulator means to said modulator means, and output amplifier means coupled to said demodulator means, said output amplifier means being coupled to said pair of transmission lines so as to control the current drawn by said twowire transmitter.

13. The transmitter of claim 1 including spark protection means coupled to said admittance sensing probe.

14. The transmitter of claim 13 including guard means associated with said probe, said spark protection means coupled between said probe and said guard means and said guard means and ground such that said guard means functions to break up the stray path comprises of the protecting devices.

15. The transmitter of claim 1 including spark protection means coupled to said transmission lines.

16. The transmitter of claim 1 further comprising: oscillator means coupled to said pair of transmission means; DC power supply means including rectifying means coupled to said admittance responsive network; and transformer means coupling said oscillator means to said DC power supply means.

17. The transmitter of claim 1 wherein said output means comprises an output amplifier including a voltage feedback network including a resistor through which DC current drawn by the two-wire transmitter flows so as to stabilize the flow of the current at all current levels.

18. The two-wire transmitter of claim 1 further comprising a full wave rectifying bridge coupled to said pair of transmission lines for permitting current to flow through one pair of diodes when the terminals are connected to the transmission wires with one polarity and current to flow through the other pair of diodes when the terminals of the bridge are connected t the transmission wires with the opposite polarity.

19. The transmitter of claim 1 further comprising a regulated power supply coupled to and supplied by said transmission lines.

20. A two-wire transmitter substantially as herein described with reference to the drawings.