GB1575629A

GB1575629A - Generator for generating sinusoidal electrical signals which are phase or frequency modulated by a digital method

Info

Publication number: GB1575629A
Application number: GB701677A
Authority: GB
Original assignee: Thomson CSF SA
Current assignee: Thales SA
Priority date: 1976-02-20
Filing date: 1977-02-18
Publication date: 1980-09-24
Also published as: FR2341983A1; IT1077976B; DE2707116A1; FR2341983B1

Description

(54) IMPROVEMENT IN OR RELATING TO A GENERATOR FOR GENERATING SINUSOIDAL ELECTRICAL SIGNALS WHICH ARE PHASE OR FREQUENCY MODULATED BY A DIGITAL METHOD (71) We, THOMSON-CSF, a French Body Corporate, of 173, Boulevard Haussmann, 75008 Paris - France, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The present invention relates to a generator for generating sinusoidal electrical signals which are phase or frequency modulated by a digital method. The object of this generator is to supply a sinusoidal electrical signal whose instantaneous frequency or instantaneous phase can be varied as a function of an external command.

The use of such a generator is of interest in the field of data transmission where the information to be transmitted modulates the frequency or phase of a carrier wave. As far as the transmission of the data is concerned, it may take place along telephone lines, by radio-telephone, by hertzian beams or by the use of any other means capable of transmitting a radio-electrical signal.

In the field of data transmission to which the inventon relates, it is a question of transmitting a series of items of binary information (0 or 1 states) via a radio-electrical channel. However, in the majority of cases the pass band of the channel does not correspond to the spectrum of the signal to be transmitted. As an example, the signal to be transmitted may have a D.C. component although the pass-band of a telephone line is limited to 300 Hz at the low frequency end.

This incompatibility is often overcome by using an auxiliary electrical signal termed a carrier, which is modulated by the signals to be transmitted in such a way that the spectrum will lie within the pass-band of the channel.

This modulation may be a change in the frequency of the carrier where one frequency fO represents, for example, the 0 states of the useful information, whilst another frequency fl represents the 1 states. The change-over from fO to fl, and vice versa, should take place without discontinuity in amplitude so as not to cause the spectrum to be enlarged.

This modulation may also be a change in the phase of the carrier where the 0 states are represented by the phase remaining the same, whilst the 1 states are represented by the phase changing by a certain amount. The change in phase should take place gradually according to a predetermined law in order not to enlarge the spectrum. This gradual change in phase is achieved by altering the frequency over a transitional period. In the case of both the types of modulation which are envisaged, it is apparent that it is necessary to have available a radio-electrical signal of variable frequency. The member which generates a carrier which is so modulated as a function of the signal to be transmitted is termed a modulator, and a demodulator is situated at the other end of the channel which reconstitutes the useful data.

Modulation and demodulation apparatus are known which relies on analogue or semi-analogue techniques.

In cases where analogue techniques are used, the sinusoidal signal forming the carrier is produced directly by a conventional oscillator and the change in frequency is achieved by varying one of the elements of the oscillator, i.e. capacitance, inductance or resistance. In certain apparatus in which a change in phase is used, a weighted summing operation is performed on phase-shifted signals, whose relative amplitude defines the phase of the sum signal.

In cases where semi-analogue techniques are used, frequency is fixed by the output of a numerical divider or of a counter which is fed by a digital oscillator which outputs a fixed frequency square-wave signal. A change in frequency is brought about by altering the dividing ratio of the divider as a function of the data to be transmitted. However, for reasons connected with the pass band of the channel and with the accuracy of detection at the receiver, the frequency of the square-wave signal supplied by the digital divider is very much higher than that of the carrier supplied to the transmission channel. It is therefore necessary to bring about a change in frequency using an oscillator or an additional divider, a mixer, filters, and a circuit for separating out the side bands. This second section is of the analogue type where a processing of amplitude takes place.

All prior art apparatus which has recourse to analogue and semi-analogue techniques possesses drawbacks, which are chiefly due to the analogue components such as oscillators, mixer and filters which they include. These drawbacks are the extensive adjustments which have to be made in the factory and which increase the cost of the apparatus, drifts with temperature and time which affect the performance of the apparatus and make systematic maintenence and readjustment necessary, and amplitude and phase distortions which also affect the performance of the apparatus.

An object of the invention is to provide modulating and demodulating apparatus which substantially avoids the drawbacks mentioned above.

The present invention consists in a generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method, comprising an oscillator, means for dividing the frequency of the wave supplied by the oscillator, a source of data to be transmitted, and operative to control said dividing means, whereby the output frequency of said dividing means corresponds to a selected value of said data to be transmitted counting means connected to said dividing means, memory means connected to said counting means and digital to analogue converting means connected to said memory means for delivering a frequency or phase modulated signal.

The invention will be better understood with reference to the following description of embodiments, and accompanying drawings in which: Figure 1 and 2, are two graphs showing how a sinusoidal signal can be produced from discrete values; Figure 3, is a block diagram of a modulator according to the invention; Figure 4 is an apparatus for generating a frequency modulated carrier FSK; Figure 5 is an apparatus for generating a phase modulated carrier PSK; Figure 6, shows various signals relating to Figure 5, and, Figure 7, is an embodiment of the frequency selecting circuit which controls the changes of phase.

The principle by which the modulation, in particular the modulation of frequency, can be brought about will be demonstrated with reference to Figures 1 and 2.

The general expression for a sinusoidal signal is: (1) v = V . sin ot where the amplitude Vis a constant. The frequency f can be varied by varying the angular frequency co = 2 By writing 6 = ot, this general expression becomes (2) v = V . sin 0 In this expression, the value of the 0 at a given time t may be considered as the sum of equal increments A0 corresponding to successive equal intervals of time At.By holding the increments or angular steps AO constant, it is possible to achieve a change in the instantaneous angular frequency . co = r by altering the time interval At required to reach AO. If a trigonometric circle is divided into p equal parts : AO and if the p values corresponding to : sin AO, sin 2AO, sin 3An. . . sin pAO are stored in a memory, it is possible to reconstitute a sinusoidal signal at the output from discrete values by reading out from this memory step by step. that is to say by moving forward one location every At seconds.

The frequency of the signal so formed depends on the value At adopted for use in reading out from the memory. The higher the number p, the closer is the signal to a pure sine-wave, but on the other hand an increase in p entails an increase in the number of locations in the memory, which depends on the performance required from the apparatus. However, generating the signal from discrete values produces additional lines in the spectrum which represent the quantification noise, these lines are displaced with respect to the spectrum of the pure carrier by an amount substantially equal to the read out frequency: 1/At. They are therefore sufficiently far removed from the useful signal to allow them to be eliminated by a simple passive filter which need not be of high accuracy.

Figure 3 is a schematic view of a modulator apparatus utilising the modulation principle which is explained above.

It comprises an oscillator 1 which operates at a constant frequency and supplies pulses of constant amplitude, a divider circuit 2 whose dividing ratio can be varied and which receives the data to be transmitted from a circuit 3, a binary bi-directional counter 4 which is fed by the divider 2, followed by a memory 5 which contains in binary form the various desired values envisaged, and by a digital/analogue converter 6. The converter is connected to a filter 9 via a switch 8 which allows an inverter 7 to be connected if required. This switch is controlled by the bi-directional counter 4. The modulated signal required is obtained from the output of filter 9. The way in which the apparatus in Figure 3 operates is as follows.

The oscillator 1 supplies pulses at a constant frequency and this frequency is divided in the divider circuit 2 in a ratio which can be varied in accordance with the values of the items of data to be transmitted. The bi-directional counter 4 counts the outgoings pulses up or down and the content of the counter is continuously transmitted to the memory 5, in which are stored in binary form the different values of the corresponding sines, that is to say the various discrete values which, as a whole, represent the sinusoidal waveform of the carrier.

In this way the bi-directional counter 4 controls the addressing of memory 5. The digital/analogue converter which is connected to the memory assists in reconstituting the waveform emitted by the oscillator. It will be noted that only those values of the angle û which lie between 0 and n/2 may be stored in the memory in view of the relations sin (z - û) = sin û and sin ( ()) = - sin û.

Under these conditions, it is clear that circuit 4 operates as a forward counter which controls read out from memory 5 from addresses ascending fro, 0 to n/2, and then as a backward counter for addresses descending from n/2 to 0, and then as a forwards counter again, the counter having a capacity equal to p/4 in this case. A binary decoder which decodes 0 and a binary decoder which decodes n/2 are placed at the output of the counter 4 so as to bring about forwards and backwards counting operation by means of a flip-flop.

The 0 decoder puts the analogue inverter into circuit by means of the switch 8. The digital/analogue converter in this case is a conventional one which emits an analogue signal which corresponds in decimal notation to the binary code fed to its inputs. The memory itself is of the ROM, PROM, or FROM type, these abbreviations signifying, as is known, a read only memory, a programmable read-only memory and a fused read-only memory.

Use may be made solely of the relation (r - û) = sin û. In this case the bi-directional counter 4 counts only half p/2 of the pulses p, corresponding to values of û between and Jl/2. A binary decoder which decodes - 2 and another binary decoder which decodes + ) are placed at the output of the counter to cause the counter to operate alternately and successively as a forwards and backwards counter by means of a flip-flop.

The analogue inverter 7 and the switch 8 are then dispensed with.

It is also possible to use simply a forward counter which counts the total number of pulses p corresponding to its maximum capacity, this capacity covering the change in û between 0 and 2n, with the counter resetting to zero when saturated. In this case there is no point in having the inverter 7 and the switch 8. A simple forward counter may also be used in place of the bi-directional counter.

Figure 4 shows an apparatus according to the invention which supplies a frequency modulated carrier of the FSK type, which is the term used to indicate a frequency modulation of the frequency shift keyed type.

A modulator produced in accordance with the lay-out in Figure 4 comprises : a quartz oscillator 1, which emits a squarewave signal of constant frequency F, a divider 2 having two division ratios 1/nO and 1/n1 (in the case of a code employing two frequencies), which is fed by the square-wave pulses of frequency F. This divider may be formed by a binary counter which is followed by a binary decoder which decodes the number nO and supplies a frequency f0 = F/nn, and by a binary decoder which decodes the number n - 1 and supplies a frequency fl = f/n1. These circuits are not shown in the Figure. The selection of one of these two signal is the responsibility of logic switches of the AND type 10 and 11 which feed an OR circuit 12.The selection is determined by the 0 or 1 logic state of the data item to be transmitted which is emitted from circuit 3 and is present at the input of the modulator. An inverter 13 is used to control the AND circuit 11 which corresponds to the 0 state.

A binary bi-directional counter 4 receives the square-wave pulses, of frequency f0 or fl as the case may be, via OR circuit 12 and emits in parallel from its output the number of received pulses in binary-coded form. As was mentioned above, the capacity of the counter is a function of the number p/4 of angular steps A0 between 0 and x/2 which are used to generate the sine-wave. In the present case there are provided at the output of the said bi-directional counter 4 a binary coder 16 which decodes the number 0 and another binary decoder 16 which decodes the number 0 and another binary decoder 17 which decodes the number p/4.By means of these decoders, the outputs of the bi-directional counter 4 control a bistable circuit 18 having two complementary outputs Q and Q which respectively control the operation of circuit 4 as a forward and backwards counter. As an example, a pulse emitted by the "0" decoder 16 causes output Q to go to the high state and thus output Q to go to the low state, whilst a pulse emitted by the "p" decoder 17 produces the reverse effect. Output Q of flip-flopl8 thus controls the forward counting input of the bi-directional counter 4 and the Q output controls its backward counting input, which they do by means of switches which are formed by logic AND gates 14 and 15 whose operation need not be described in detail.

As has already been mentioned with reference to Figure 3, the modulator in Figure 4 contains a memory 5 termed a sine memory, a digital/analogue converter 6 followed by an inverter 7 which may be put into circuit when required by a switch 8, and a filter 9 which emits the modulated signal.

The binary memory 5 is of the programmable or read only type and its capacity is + 1 words of k bits, including the word 0. The number k is a function of the accuracy required in generating the sine-wave. The memory receives at its "adress" inputs binary outputs from the counter which represent values of û and it emits the expressions for the corresponding "sines" in binary code.

The digital/analogue converter 6 is fed by the outputs of the memory. The analogue inverter 7 is an amplifier of the - 1 gain type and is connected to the converter 6. It is placed in circuit by an analogue switch which may take the form of field effect gates 20 and 21.

These gates are controlled by a flip-flop 19 which changes its state each time a pulse is received at its input, which is connected to the output of the decoder 16 which decodes the number 0.

The amplifier 9 which receives the direct or inverted analogue signal supplied by the switch 8 has a restricted pass band and is responsible both for "smoothing" the sine-wave and for matching to the transmission channel.

As an example, some figures may be given for an embodiment of FSK modulator according to the invention in the case of 1200 baud FSK frequency modulation with a "zero" frequency of 2100 Hz and a "one" frequency of 1300 Hz.

AO = 2z/60 (p = 60) f0 = 2100 x 60 = 126 000 Hz f1 = 1300 x 60 = 78 000 Hz nO = 13 n1 = 21 F = 1638 KHz Capacity of the bi-directional counter + 1 = 16, i.e. 4 bits Capacity of the memory = 16 words of T bits.

Capacity of the digital/analogue converter = 8 bits.

Low pass filter at the output = Fc = 4 KHz, 12 dB/octave slope.

Figure 5 shows an apparatus which produces, in accordance with the invention, a phase modulated signal which may for example be of the PSK type, signifying a shift in phase.

Broadly speaking, in a phase modulator the input signal takes the form of a succession of binary signals and the output signal is a sine-wave whose phase relative to a carrier may assume various values as a function of the data. The change in phase is produced by temporarily altering frequency during a transitional period which is situated at the beginning of a time interval corresponding to the item of data to be transmitted.

In a 2400 baud modulator for example, the input data items follow one another at a rate of 2400 bits per second and the bits are grouped in pairs to form dibits. There are thus 1200 dibits per second.

The frequency of the output signal from the modulator is 1800 Hz. The phase of a dibit is defined in relation to that of the preceding dibit. The following table indicates, by way of example, phase values for given dibits Value of dibit Phase with respect to the preceding dibit 00 + 45" 01 + 135 11 + 225 = 360" - 135 10 + 315" = 360" - 45" To reduce the width of the spectrum, the change in phase between two successive dibits is not instantaneous but gradual during a transitional period situated at the beginning of each dibit whose length is equal to T.

The frequency of the carrier at the end of the dibit, whatever they may be, is always the same and is equal to Fo.

The change in phase AQ between dibits will be obtained by using a frequency F different from Fo during the transitional period 1.

The value of F needs to be such that 2nF T - 2nFo X = AQ.

F = Fo + EQ whence: Since AQ may assume four different values as defined in the above table, namely: +45 , +135 , -135 , -45 , it will be necessary to have available, in addition to the frequency Fo used at the end of the dibits, four frequencies F1, F2, F3, F4, which are employed at the beginning of the dibits during the period and which are selected as a function of the nature of the dibit.

According to one application which is given by way of an example if Fo = 1800 Hz and T = 0.4 ms AQ = +4 corresponds to : F1 = 2 112.5 Hz AQ = +3S corresponds to : F2= 2 737.5 Hz AQ = - corresponds to : F3 = 862.5 Hz AQ = -4 corresponds to : F4 = 1 487.5 Hz Since the number of increments A0 for one complete period of the output signal is p, the frequencies of the generators supplying the bi-directional counter will be p times higher.

This entails the use of five generators generating pulses at the following frequencies f0 = pfO, f0 = pF1, f2 = pF2, f3 = pF3, and f4 = pF4.

The generators of the frequencies f are selected by a control circuit which receives the data to be transmitted and which is responsible for - grouping the bits into pairs to form the successive dibits, - causing use to be made of generator fl, f2, f3 or f4, as dictated by the nature of the dibit, during the period T, - then causing use to be made of generator Fo at the conclusion of the dibit.

In the modulator of Figure 5, the phase modulating apparatus consists of an oscillator 1 which is connected to a series of frequency dividers 22 to 26 which supply the frequencies fO, f1, f2, f3 and f4 respectively. These dividers are connected in parallel and feed, via a switch 27, a forward counter 4 which is followed by a memory 5 and a digital/analogue converter.

The data comes from a circuit 3 and passes through a circuit 28, which is responsible for selecting frequency and thus controls the switch 27.

An embodiment of circuit 28 is shown in Figure 7. The data from generator 3 is transmitted to a shift register 29 having two successive locations, the forward shift of which is controlled by a timer H. The two states which are simultaneously present in 29 are read by a digital/analogue decoder 31 of the 1-from-4 type. The reading rate of decoder 31 is decided by the timer H, whose frequency is divided by two by means of a divider 30. The clock signal from H, after being divided by two, triggers a monostable 33 for a length of time equal to T.

The output of the decoder 31 and the monostable circuit 33 are applied to a selecting circuit 32, which is produced from logic gates.

The selecting circuit 32 outputs to the switch 27 which is shown in Figure 5 a command to select, during the period T, that frequency fl, f2, f3 or f4 which is decided by the decoder 31, and then frequency f0 for the remainder of the dibit.

The switch 27 may be formed by simple logic gates of the AND type.

In the embodiment shown in the Figure, the transmission is of the so-called four-state type, which involves a centre frequency, for example Fo, and four frequencies to which jumps are made (F1, F, F3, F4). As has been stated, the frequency jumps take place during predetermined time intervals T and the frequency concerned is selected at the beginning of the interval, by circuit 28, as dictated by the value of the dibit. When, according to which frequency is selected, the required phase shift has been achieved, a return is made to the centre frequency until the conclusion of the dibit. In Figure 6 are shown the various signals obtained. Waveform (a) represents the data during give successive dibits marked I, II, III, IV, V which will be considered. Waveform (b) indicates the frequencies to which the requisite jumps take place.Waveform (c) shows the change in phase and waveform (d) the sizes of the successive differences in phase between the dibits in one embodiment.

The remainder of the apparatus will not be described in detail since it is similar in all respects to that in Figure 4.

There has thus been described a generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method, which generator has the advantage in comparison with the prior art of reducing the adjustments required and increasing stability and also of increasing the performance which can be achieved as regards reducing frequency drift and phase and amplitude distortion.

WHAT WE CLAIM IS: 1. A generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method, comprising an oscillator, means for dividing the frequency of the wave supplied by the oscillator, a source of data to be transmitted and operative to control said dividing means whereby the output frequency of said dividing means corresponds to a selected value of said data to be transmitted, counting means connected to said counting means and digital to analogue converting means connected to said memory means for delivering said frequency or phase modulated signal.

2. A generator according to claim 1 for generating frequency modulated signals wherein said counting means comprises a bi-directional counter.

3. A generator according to claim 1 for generating phase modulated signals wherein said counting means comprise a forward counter.

4. A generator according to any one of the preceding claims wherein the dividing means supply two signals whose frequiencies are sub-multiples of the frequency of the wave from the oscillator, each of the said frequencies corresponding to a predetermined value of the data to be transmitted.

5. A generator according to any one of the preceding claims wherein the dividing means positioned between the oscillator and the counting means comprises a plurality of frequency dividers each arranged to deliver a signal at a frequency which is a sub-multiple of the frequency from the oscillator, and wherein there is further provided a frequency selecting arrangement which is connected to the source of data to be transmitted and which controls a switch having a plurality of terminals corresponding to the frequency dividers in question, the frequency which is selected being dictated by the phaseshift in the signal to be transmitted.

6. A signal generator according to any one of the preceding claims wherein when a sin (n - û) = sin û law is applied, the bi-directional counter counts up a number of pulses corresponding to the values of the angle û occurring between - n/2 and n/2, in that the counter has at its output a so-called z/2 binary decoder and a so-called :binary decoder, which decoders are connected to the two inputs of a flip-flop circuit whose Q and Q inputs respectively control the operation of the bi-directional counter as a forward counter or a backwards counter as the case may be, the said control being exerted via respective AND circuits whose second inputs are supplied with the singal from the dividing means.

7. A signal generator according to 2 or any one of claims 3 to 6 when dependent on Claim 2, wherein, when a sin (û = - sin û law and a sin (n - 0) = sin û law are applied, the bi-directional pulse counter counts up a number of pulses corresponding to the values of the angle û lying between 0 and n/2, in that the outputs of the counter are connected to a binary decoder which decodes the value 0 and a binary decoder which decodes the value n/2, which decoders are connected to the inputs of a flip-flop whose Q and Q outputs respectively control the operation of the bi-directional counter as a forwards counter or a backwards counter as the case may be, the said control being exerted via respective AND circuits whose second inputs are fed with the signals from the dividing means, the 0 binary decoder further controlling, via a flip-flop an analogue inverter which is connected to the output of the digital/analogue converter.

8. A signal generator according to any of the preceding claims and having at its output a filter device which removes the interference lines corresponding to the quantification noise from the spectrum.

9. A signal generator according to claim 5, or any one of claims 6 to 8 when dependent on claim 5, wherein the frequency-selecting arrangement consists of a shift register which is connected to the data source and is controlled by a timer, and of a decoder connected to the said register, which is controlled by the said timer via a divider, which latter also triggers a monostable circuit, the decoder and the monostable being connected to a selecting circuit which controls the switch.

10. A signal generator according to claim 5 or any one of claims 6 to 9 when dependent on claim 5, wherein the placing in circuit of the various frequency generators, as dictated by the jump in phase involved, takes place during a transitional period (X) which is a fraction of the duration of the data items to be transmitted, which are grouped in dibits, the generator

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. requisite jumps take place. Waveform (c) shows the change in phase and waveform (d) the sizes of the successive differences in phase between the dibits in one embodiment. The remainder of the apparatus will not be described in detail since it is similar in all respects to that in Figure 4. There has thus been described a generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method, which generator has the advantage in comparison with the prior art of reducing the adjustments required and increasing stability and also of increasing the performance which can be achieved as regards reducing frequency drift and phase and amplitude distortion. WHAT WE CLAIM IS:

1. A generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method, comprising an oscillator, means for dividing the frequency of the wave supplied by the oscillator, a source of data to be transmitted and operative to control said dividing means whereby the output frequency of said dividing means corresponds to a selected value of said data to be transmitted, counting means connected to said counting means and digital to analogue converting means connected to said memory means for delivering said frequency or phase modulated signal.

generating the carrier frequency being placed in circuit during the remainder of this duration.

11. A signal generator according to claims 9 or 10, wherein the grouping of the data into dibits is performed by the register.

12. A signal generator according to any one of claims 9, 10n or 11, having a monostable circuit which determines the length of the transitional period (T).

13. Data transmitting apparatus incorporating a generator for generating sinusoidal electrical signals which are frequency or phase modulated by a digital method according to any of claims 1 to 2.

14. A signal generator substantially as hereinbefore described with reference to the drawings.