GB1465772A - Circuit arrangements for television receivers - Google Patents

Circuit arrangements for television receivers

Info

Publication number
GB1465772A
GB1465772A GB2286074A GB2286074A GB1465772A GB 1465772 A GB1465772 A GB 1465772A GB 2286074 A GB2286074 A GB 2286074A GB 2286074 A GB2286074 A GB 2286074A GB 1465772 A GB1465772 A GB 1465772A
Authority
GB
United Kingdom
Prior art keywords
voltage
stage
transistor
line
vertical deflection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2286074A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732326399 external-priority patent/DE2326399C3/en
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of GB1465772A publication Critical patent/GB1465772A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18Generation of supply voltages, in combination with electron beam deflecting
    • H04N3/185Maintaining dc voltage constant
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H03K4/60Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth current is produced through an inductor
    • H03K4/62Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth current is produced through an inductor using a semiconductor device operating as a switching device

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)
  • Television Receiver Circuits (AREA)

Abstract

1465772 Automatic voltage control LICENTIA PATENT VERWALTUNGS GmbH 22 May 1974 [24 May 1973] 22860/74 Heading G3R [Also in Divisions H2 and H3] In a television receiver, the main supply voltage is connected across the series combination of a transistor line output stage and a vertical deflection stage. That portion of the voltage appearing across the line output stage is automatically stabilized. As shown, a line transformer 6 and transistor 9 connected to picture tube 15 and line deflection coils 14 are supplied from a mains rectifier circuit 2. The voltage across terminals 3, 27 is regulated by a circuit 19-23 which produces a control voltage U S to vary the effective impedance of a series transistor 17. The emitter of transistor 17 is connected to vertical deflection stage 38 which includes push-pull transistors 43, 44 driven by synchronizing pulses 47 and connected to deflection coils 42. A capacitor 48 short circuits line frequency signals. The other terminal 40 of the stage 38 is connected to earth through a Zener diode 28 which provides a regulated voltage for an audio output stage 34. An additional current i 4 , / derived from transformer 6, may be fed to the Zener diode 28 to ensure continuous conduction. A voltage limiting device may be connected across the vertical deflection stage 38.
GB2286074A 1973-05-24 1974-05-22 Circuit arrangements for television receivers Expired GB1465772A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732326399 DE2326399C3 (en) 1972-11-30 1973-05-24 Circuit for stabilizing the operating voltage for the line output transistor in a television receiver

Publications (1)

Publication Number Publication Date
GB1465772A true GB1465772A (en) 1977-03-02

Family

ID=5881969

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2286074A Expired GB1465772A (en) 1973-05-24 1974-05-22 Circuit arrangements for television receivers

Country Status (4)

Country Link
JP (1) JPS5021618A (en)
BR (1) BR7404244D0 (en)
GB (1) GB1465772A (en)
IT (1) IT1012189B (en)

Also Published As

Publication number Publication date
IT1012189B (en) 1977-03-10
BR7404244D0 (en) 1975-01-21
JPS5021618A (en) 1975-03-07
AU6812674A (en) 1975-10-23

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee