GB1463381A - Semiconductor data stores including signal regenerating circuits - Google Patents

Semiconductor data stores including signal regenerating circuits

Info

Publication number
GB1463381A
GB1463381A GB422974A GB422974A GB1463381A GB 1463381 A GB1463381 A GB 1463381A GB 422974 A GB422974 A GB 422974A GB 422974 A GB422974 A GB 422974A GB 1463381 A GB1463381 A GB 1463381A
Authority
GB
United Kingdom
Prior art keywords
transistor
load
fets
nodes
shunt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB422974A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732307323 external-priority patent/DE2307323C3/en
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1463381A publication Critical patent/GB1463381A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)

Abstract

1463381 Data store circuits SIEMENS AG 30 Jan 1974 [14 Feb 1973] 04229/74 Heading H3T A semi-conductor data store comprises a plurality of storage cells (not shown) and a binary signal regenerating circuit including two inverting stages each including a switching transistor 4 or 5 and a load transistor 44, or 55, a shunt transistor 6 having its conduction path connected between nodes 1, 2 and a control circuit (not shown) for rendering the shunt transistor 6 conductive as to balance the potentials at nodes 1, 2 with load FETs 44, 55 in the blocked state and subsequently to block transistor 6 so that a read-out signal along line 11 or 21 from a selected storage cell may be stored at one of the nodes and the flip-flop set in one of its stable states by unblocking the load FETs. The control voltage applied to the shunt FET 6 may be derived from a bootstrap circuit producing a voltage larger in magnitude than the drain supply voltage. The threshold voltage of the load transistor may be arranged to be of opposite sign to that of the switching transistor. The switching and load FETs may be formed by FETs of opposite conductivity type.
GB422974A 1973-02-14 1974-01-30 Semiconductor data stores including signal regenerating circuits Expired GB1463381A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732307323 DE2307323C3 (en) 1973-02-14 Method for operating a regeneration circuit in the manner of a keyed flip-flop

Publications (1)

Publication Number Publication Date
GB1463381A true GB1463381A (en) 1977-02-02

Family

ID=5871918

Family Applications (1)

Application Number Title Priority Date Filing Date
GB422974A Expired GB1463381A (en) 1973-02-14 1974-01-30 Semiconductor data stores including signal regenerating circuits

Country Status (11)

Country Link
JP (1) JPS5738991B2 (en)
AT (1) AT339954B (en)
BE (1) BE811028A (en)
CA (1) CA1017010A (en)
CH (1) CH577731A5 (en)
FR (1) FR2217862B1 (en)
GB (1) GB1463381A (en)
IT (1) IT1006299B (en)
LU (1) LU69376A1 (en)
NL (1) NL7401840A (en)
SE (1) SE386789B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52141143A (en) * 1976-05-19 1977-11-25 Toshiba Corp Memory circuit
JPS56126316A (en) * 1980-03-10 1981-10-03 Nec Corp Mos comparing integrated circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678473A (en) * 1970-06-04 1972-07-18 Shell Oil Co Read-write circuit for capacitive memory arrays

Also Published As

Publication number Publication date
LU69376A1 (en) 1974-05-29
FR2217862B1 (en) 1980-09-12
IT1006299B (en) 1976-09-30
DE2307323A1 (en) 1974-09-05
NL7401840A (en) 1974-08-16
AT339954B (en) 1977-11-25
ATA42874A (en) 1977-03-15
FR2217862A1 (en) 1974-09-06
JPS5738991B2 (en) 1982-08-18
JPS49114840A (en) 1974-11-01
SE386789B (en) 1976-08-16
DE2307323B2 (en) 1975-09-04
BE811028A (en) 1974-05-29
CH577731A5 (en) 1976-07-15
CA1017010A (en) 1977-09-06

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Legal Events

Date Code Title Description
PS Patent sealed
PE20 Patent expired after termination of 20 years

Effective date: 19940129