GB1385788A - Digital to analogue converter - Google Patents
Digital to analogue converterInfo
- Publication number
- GB1385788A GB1385788A GB2950072A GB2950072A GB1385788A GB 1385788 A GB1385788 A GB 1385788A GB 2950072 A GB2950072 A GB 2950072A GB 2950072 A GB2950072 A GB 2950072A GB 1385788 A GB1385788 A GB 1385788A
- Authority
- GB
- United Kingdom
- Prior art keywords
- output
- digital
- dividers
- analogue
- stable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/82—Digital/analogue converters with intermediate conversion to time interval
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
1385788 Digital to analogue converter TAKEDA RIKEN INDUSTRY CO Ltd 23 June 1972 [25 June 1971] 29500/72 Heading G4H In a digital to analogue converter, clock pulses are fed to two divider circuits, each dividing by the same number, the relative phase of the outputs being controlled by the digital input. The output pulses of the dividers set and reset respectively a bi-stable circuit and the output, pulse width modulated waveform is used to switch a reference voltage which, after filtering gives the analogue output. The digital input is applied to inputs 17a to 17n of AND gates 16a to 16n. Clock pulses of repetition period At are generated at 11 and are divided by n s in dividers 12 and 14. The output of divider 12 resets bistable 15 and enables AND gates 16a to 16n. If the applied digital value is n x (less than n s ), this is applied to frequency divider 14 which effectively counts from n x up to n s when an output pulse is produced which sets bi-stable 15. The two dividers thus operate out of phase by time n x .At and the output of bi-stable 15 is a pulse train of repetition period n s .At and "high output" period n x .At. This pulse train is applied to switch 18 and switches standard voltage e s (19) giving a corresponding waveform which after averaging by filter circuit 20, is the analogue output (n x )/(n s ).e s .
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP46045735A JPS5116104B1 (en) | 1971-06-25 | 1971-06-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1385788A true GB1385788A (en) | 1975-02-26 |
Family
ID=12727562
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2950072A Expired GB1385788A (en) | 1971-06-25 | 1972-06-23 | Digital to analogue converter |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPS5116104B1 (en) |
DE (1) | DE2231216B2 (en) |
GB (1) | GB1385788A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2415916A1 (en) * | 1978-01-25 | 1979-08-24 | Sony Corp | PULSE WIDTH MODULATOR |
GB2152719A (en) * | 1984-01-09 | 1985-08-07 | Nec Corp | Battery saving signal generating circuit |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52444A (en) * | 1975-06-23 | 1977-01-05 | Advantest Corp | Analog-digital converter |
DE2531945C3 (en) * | 1975-07-17 | 1983-01-05 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Circuit for generating DC voltages |
-
1971
- 1971-06-25 JP JP46045735A patent/JPS5116104B1/ja active Pending
-
1972
- 1972-06-23 GB GB2950072A patent/GB1385788A/en not_active Expired
- 1972-06-26 DE DE2231216A patent/DE2231216B2/en not_active Ceased
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2415916A1 (en) * | 1978-01-25 | 1979-08-24 | Sony Corp | PULSE WIDTH MODULATOR |
GB2152719A (en) * | 1984-01-09 | 1985-08-07 | Nec Corp | Battery saving signal generating circuit |
Also Published As
Publication number | Publication date |
---|---|
DE2231216B2 (en) | 1978-09-14 |
JPS5116104B1 (en) | 1976-05-21 |
DE2231216A1 (en) | 1972-12-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |