GB1371597A - Bubble domain memory system - Google Patents

Bubble domain memory system

Info

Publication number
GB1371597A
GB1371597A GB220773A GB220773A GB1371597A GB 1371597 A GB1371597 A GB 1371597A GB 220773 A GB220773 A GB 220773A GB 220773 A GB220773 A GB 220773A GB 1371597 A GB1371597 A GB 1371597A
Authority
GB
United Kingdom
Prior art keywords
domain
path
pass
storage
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB220773A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1371597A publication Critical patent/GB1371597A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/86Masking faults in memories by using spares or by reconfiguring in serial access memories, e.g. shift registers, CCDs, bubble memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/0875Organisation of a plurality of magnetic shift registers

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Hardware Redundancy (AREA)

Abstract

1371597 Magnetic storage arrangements INTERNATIONAL BUSINESS MACHINES CORP 16 Jan 1973 [1 May 1972] 2207/73 Heading H3B [Also in Division G4] In a cylindrical magnetic domain storage system, a plurality of operational storage units 1, 2 ... N, Fig. 1, and a spare storage unit are provided on a single magnetic sheet 10, the spare unit being arranged to replace a faulty operational unit detected during manufacture or operation. Each storage unit is basically the same as the unit 1 shown except for the internal organization of its write decoder WD. The system is controlled from a control circuit 16 which operates a bias field source 14 and a domain propagation field source 12, as well as controlling common operational circuitry for the units comprising a write driver 18, a decode driver 20, a sense current source 22 and a clear current source 24. Operation of the write driver causes a domain generator G1 to pass a domain to the write decoder WD1 in each of the units. The write decoders of the storage units 1, 2 ... N each consist of two path selectors SW, Fig. 2, controlled by the direction of currents I DA , I DB from the decode driver, the path selectors being arranged so that only a selected one of a group of four decoders can pass a domain to a storage propagation path 28 at any time, while the remaining decoders pass respective domains to domain annihilators A1a-A4a. Domains in path 28 pass to a read decoder RD where they are either returned to path 28 for recirculation or pass through an, e.g. magneto-resistive, sensor S to a clear means CL. A further operational choice at the clear means either recirculates the domains by way of path 38 or extends them to an annihilator A1b. The write decoder of the space storage unit differs in that it comprises four path selectors SW arranged so that domains from generator GS normally pass directly to annihilator ASa. By selectively opening switches SA1 or SA2 and SB1 or SB2, which may be transistors or fusible links, the spare storage unit may be matched to the character of any of the operational storage units it is required to replace. Details of the path selectors are shown in Fig. 3 (for type SW1) and Fig. 4 (for type SW2). In Fig. 3 a downward current I DA in strip 42, or the absence of current, causes a domain BD to pass along upper path 46, while an upward current diverts the domain to lower path 48. In Fig. 4 only a downward current will divert a domain to the lower path 52. Domain propagation is by the combination of a rotating in-plane field H and permalloy overlay T and I bars 40, 50. A test system is shown in Fig. 7 in which the various storage units are automatically monitored by test equipment 60. If a fault is detected in a unit the equipment selectively operates switch controls A and B which selectively open a switch in each of the groups SA1, SA2 and SB1, SB2, Fig. 2, to bring the spare storage unit into use.
GB220773A 1972-05-01 1973-01-16 Bubble domain memory system Expired GB1371597A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24902672A 1972-05-01 1972-05-01

Publications (1)

Publication Number Publication Date
GB1371597A true GB1371597A (en) 1974-10-23

Family

ID=22941730

Family Applications (1)

Application Number Title Priority Date Filing Date
GB220773A Expired GB1371597A (en) 1972-05-01 1973-01-16 Bubble domain memory system

Country Status (6)

Country Link
JP (1) JPS4923546A (en)
CA (1) CA1009367A (en)
DE (1) DE2302139A1 (en)
FR (1) FR2182840B1 (en)
GB (1) GB1371597A (en)
IT (1) IT978273B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816264B2 (en) * 1974-12-09 1983-03-30 株式会社日立製作所 Jiki Bubble Memory Souch
JPS51118341A (en) * 1975-04-11 1976-10-18 Hitachi Ltd Shift register type memory
JPS51138344A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Memory device
US4070651A (en) * 1975-07-10 1978-01-24 Texas Instruments Incorporated Magnetic domain minor loop redundancy system
JPS5318926A (en) * 1976-08-06 1978-02-21 Hitachi Ltd Auxiliary loop switching circuit for magnetic bubble memory unit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1181577A (en) * 1956-08-23 1959-06-17 Bayer Ag Mixing device
DE1249926B (en) * 1961-08-08 1967-09-14 Radio Corporation of America New York, NY (V St A) Device for re-addressing faulty memory locations in an arbitrarily accessible main memory in a data processing system
GB1010008A (en) * 1962-04-30 1965-11-17 Inv S Finance Corp A pressure regulator for injection of a plastic material
US3331058A (en) * 1964-12-24 1967-07-11 Fairchild Camera Instr Co Error free memory
NL149927B (en) * 1968-02-19 1976-06-15 Philips Nv WORD ORGANIZED MEMORY.

Also Published As

Publication number Publication date
CA1009367A (en) 1977-04-26
FR2182840B1 (en) 1976-05-14
JPS4923546A (en) 1974-03-02
DE2302139A1 (en) 1973-11-22
FR2182840A1 (en) 1973-12-14
IT978273B (en) 1974-09-20

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee