GB1341498A - Pulsed current sources for variable loads - Google Patents

Abstract

1341498 Magnetic storage arrangements; transistor switching circuits ELECTRONIC MEMORIES & MAGNETICS CORP 19 April 1971 [2 April 1970] 26040/71 Headings H3B and H3T In a driver circuit for a word or bit line of a magnetic core store, a current pulse of consistent amplitude irrespective of the number of cores to be switched in any read or write operations is provided by the combination of D.C. sources 13, 14, Fig. 1, transistor switches Q 1 , Q 2 , and a winding W 1 of an amplitude regulating inductor T 1 of rectangular hysteresis characteristic, initially biased well into saturation, the inductor being switched partially towards the opposite saturation state each time a driver pulse is applied to a word or bit line 10. Biasing- is effected by a D.C. source 11 which is coupled to an inductor winding W 2 through a choke coil 12. A current pulse is initiated by applying pulses to transformers T 2 , T 3 which switches on transistors Q 1 , Q 2 , thus applying both D.C. sources in sources to the line 10 to produce rapid current growth. After a time interval sufficient for the inductor core flux to commence switching, transistor Q 1 becomes non-conducting by cessation of the pulse in transformer T 2 and the core switching current is maintained by power source 14 over diode D1. Subsequently the pulse at transformer T 3 terminates before the inductor core switching is complete and transistor switch Q 2 opens and disconnects the power source 14. During the operation choke coil 12 acquires energy, and when transistor Q 2 becomes non-conductive this energy is transferred to the power source 13 over windings W 1 , W 2 and a circuit comprising diodes D 1 and D 2 . A plurality of driver circuits for two adjacent word or bit lines L 1 , L 2 is shown in Fig. 3, respective currents I for a particular read or write operation passing through the lines in opposite directions. Each line, such as L1, has its individual read and write driver circuits comprising transistors Q 1 , Q 2 , Q 3 and inductor T 1 for reading, and transistors Q 4 , Q 5 , Q 6 inductor T 4 for writing, all the inductors having a common bias circuit. Each pair of adjacent lines with oppositely directed currents for a particular read or write operation forms a closed loop system.