GB1312464A - Method of preventing a chemical reaction between aluminium and silicon dioxide in a semiconductor device - Google Patents

Method of preventing a chemical reaction between aluminium and silicon dioxide in a semiconductor device

Info

Publication number
GB1312464A
GB1312464A GB4318570A GB4318570A GB1312464A GB 1312464 A GB1312464 A GB 1312464A GB 4318570 A GB4318570 A GB 4318570A GB 4318570 A GB4318570 A GB 4318570A GB 1312464 A GB1312464 A GB 1312464A
Authority
GB
United Kingdom
Prior art keywords
aluminium
alumina
reaction
silica
preventing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4318570A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of GB1312464A publication Critical patent/GB1312464A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1312464 Semi-conductor devices MOTOROLA Inc 9 Sept 1970 [25 Sept 1969] 43185/70 Heading H1K Problems associated with the reaction between aluminium contacts or tracks and silica passivation on semi-conductor devices are avoided by preventing such reaction. An alumina layer between the materials is used for this purpose. The structure of Fig. 1d has a silicon substrate with silica passivation 12 over which runs on aluminium track 18 which is isolated from the silica (both underneath and at edge 24) by alumina layers 20, 22. The underlying alumina layer 20 may be formed by direct evaporative deposition or during the initial stage of evaporative deposition of the aluminium 18, the aluminium being deposited at relatively low temperature and in an atmosphere of relatively high pressure so that alumina is formed by reaction between aluminium vapour and residual water vapour in the system. Fig. 4f, shows the contact region of an emitter electrode 86 in the formation of which an overall deposit of alumina 80 has been provided over the apertured silica passivation 76, a contact aperture has been etched in the alumina, and an aluminium film has been deposited overall and etched to the desired portion 86 with similar etching of the alumina which however is left as a complete film to provide a barrier against interaction at this edge of the electrode. Variants of these structures use different combinations of the same features.
GB4318570A 1969-09-25 1970-09-09 Method of preventing a chemical reaction between aluminium and silicon dioxide in a semiconductor device Expired GB1312464A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US86098369A 1969-09-25 1969-09-25

Publications (1)

Publication Number Publication Date
GB1312464A true GB1312464A (en) 1973-04-04

Family

ID=25334551

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4318570A Expired GB1312464A (en) 1969-09-25 1970-09-09 Method of preventing a chemical reaction between aluminium and silicon dioxide in a semiconductor device

Country Status (5)

Country Link
JP (1) JPS4814633B1 (en)
BE (1) BE756685A (en)
DE (1) DE2045633A1 (en)
FR (1) FR2062559A5 (en)
GB (1) GB1312464A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5027447U (en) * 1973-07-03 1975-03-29
JPS50134040U (en) * 1974-04-18 1975-11-05
JPS50134041U (en) * 1974-04-18 1975-11-05
US4433004A (en) * 1979-07-11 1984-02-21 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device and a method for manufacturing the same
JPS5643742A (en) * 1979-09-17 1981-04-22 Mitsubishi Electric Corp Manufacture of semiconductor
US4381595A (en) * 1979-10-09 1983-05-03 Mitsubishi Denki Kabushiki Kaisha Process for preparing multilayer interconnection

Also Published As

Publication number Publication date
FR2062559A5 (en) 1971-06-25
DE2045633A1 (en) 1971-05-13
JPS4814633B1 (en) 1973-05-09
BE756685A (en) 1971-03-25

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Legal Events

Date Code Title Description
CSNS Application of which complete specification have been accepted and published, but patent is not sealed