GB1304591A - - Google Patents

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Publication number
GB1304591A
GB1304591A GB1304591DA GB1304591A GB 1304591 A GB1304591 A GB 1304591A GB 1304591D A GB1304591D A GB 1304591DA GB 1304591 A GB1304591 A GB 1304591A
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United Kingdom
Prior art keywords
layer
type
resistor
interconnection
wafer
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Expired
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • H01L27/0652—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H01L27/0658—Vertical bipolar transistor in combination with resistors or capacitors
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
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    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
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    • H01L2924/01024—Chromium [Cr]
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    • H01L2924/01042—Molybdenum [Mo]
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    • H01L2924/01057—Lanthanum [La]
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    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Abstract

1304591 Integrated circuits ARBEITSSTELLE FUR MOLEKULARELEKTRONIK 18 Feb 1970 7850/70 Heading H1K An interconnected resistor and bipolar transistor form part of an integrated circuit. The Figure shows the interconnection of two such units in different wafers. Manufacture is started from a high resistivity p-type silicon wafer 1 into a region 2 of which a high concentration of p-type impurity is diffused. An epitaxial high resistivity p-type layer 3 is grown on the wafer and impurity from the heavily doped region 2 diffused into the layer 3 to form the collector region of the transistor. The epitaxial layer is provided with passivation 4 which is used as a diffusion mask for the formation of heavily doped n-type terminal regions 5, 50 for the transistor base and for the resistor respectively. A further diffusion process is used to form the deep regions yielding the base 6 and resistor 7. Contacts and interconnections are applied by the overall deposition of molybdenum and masked etching. A glassy layer 12 is then applied by cathode sputtering and a substrate 13 of oxide coated silicon joined to this by thermocompression bonding, the glassy layer 12 being so formed as to leave expansion grooves 18. The starting wafer 1 and part of epitaxial layer 2 and abraded (and etched) away to expose the collector and terminal regions and a further passivating layer 14 applied which is apertured and channelled to receive further contacts and interconnection paths. As shown a second unit may be thermocompression bonded to the first by solder interconnections 20 during its manufacture to make a complex circuit. Optical interconnection of stacked units may be used.
GB1304591D 1970-02-18 1970-02-18 Expired GB1304591A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB785070 1970-02-18

Publications (1)

Publication Number Publication Date
GB1304591A true GB1304591A (en) 1973-01-24

Family

ID=9840993

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1304591D Expired GB1304591A (en) 1970-02-18 1970-02-18

Country Status (1)

Country Link
GB (1) GB1304591A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2531367A1 (en) * 1974-07-15 1976-02-05 Signetics Corp SEMI-CONDUCTOR ARRANGEMENT
GB2125620A (en) * 1982-08-19 1984-03-07 Western Electric Co Integrated circuit array
GB2152749A (en) * 1984-01-14 1985-08-07 Peter Michael Jeffery Morrish Interconnection of integrated circuitry by light
WO1996001497A1 (en) * 1994-07-05 1996-01-18 Siemens Aktiengesellschaft Method of manufacturing three-dimensional circuits

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2531367A1 (en) * 1974-07-15 1976-02-05 Signetics Corp SEMI-CONDUCTOR ARRANGEMENT
GB2125620A (en) * 1982-08-19 1984-03-07 Western Electric Co Integrated circuit array
GB2152749A (en) * 1984-01-14 1985-08-07 Peter Michael Jeffery Morrish Interconnection of integrated circuitry by light
WO1996001497A1 (en) * 1994-07-05 1996-01-18 Siemens Aktiengesellschaft Method of manufacturing three-dimensional circuits
US5902118A (en) * 1994-07-05 1999-05-11 Siemens Aktiengesellschaft Method for production of a three-dimensional circuit arrangement

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PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees