GB1279835A - Improvements in or relating to pulse generators - Google Patents
Improvements in or relating to pulse generatorsInfo
- Publication number
- GB1279835A GB1279835A GB4897069A GB4897069A GB1279835A GB 1279835 A GB1279835 A GB 1279835A GB 4897069 A GB4897069 A GB 4897069A GB 4897069 A GB4897069 A GB 4897069A GB 1279835 A GB1279835 A GB 1279835A
- Authority
- GB
- United Kingdom
- Prior art keywords
- input
- pulses
- capacitor
- input pulses
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 abstract 6
- 102100023927 Asparagine synthetase [glutamine-hydrolyzing] Human genes 0.000 abstract 2
- 101100380329 Homo sapiens ASNS gene Proteins 0.000 abstract 2
- 230000001419 dependent effect Effects 0.000 abstract 2
- 238000007599 discharging Methods 0.000 abstract 2
- 101100188555 Arabidopsis thaliana OCT6 gene Proteins 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Networks Using Active Elements (AREA)
Abstract
1279835 Automatic phase and frequency control systems SIEMENS AG 6 Oct 1969 [4 Oct 1968] 48970/69 Heading H3A A timing pulse generator comprises a controlled oscillator OS to whose control input is supplied the sum of two variables corresponding to the phase difference between the timing pulses and input pulses applied at A and to the repetition frequency of the input pulses respectively, the second variable being produced by a control unit SEG. A controller REG producing the first variable comprises control circuits ST 1 , ST 2 generating control pulses having durations corresponding to the interval between the leading edge of a timing pulse and the leading edge of an associated input pulse and to the interval between the leading edge of a timing pulse and the trailing edge of an associated input pulse respectively and an amplifier VST producing an output dependent on the difference in length of the two control signals. As shown in Fig. 2, VST comprises transistors TS10, TS11 which conduct for the duration of the control signals charging or discharging a capacitor C L depending on an increase or decrease of frequency of input pulses. The capacitor C L is followed by a low-pass filter R S , C S at whose output is applied the variable corresponding to the repetition frequency of the input pulses via a further resistor connected to terminal G, the sum of the two variables V E being applied to the oscillator OS which is an astable multi-vibrator. The control unit SEG as shown in Fig. 4 comprises a transistor TS1 conducting at the end of input pulses to charge a capacitor C 1 , transistor TS 3 connected in parallel to C 1 and driven to conduction by the input pulses to discharge C 1 and a transistor TS 2 conducting for the duration of input pulses supplied at its base, to charge a second capacitor C 2 to the voltage across C 1 , the output of a low pass filter R 2 , C 3 connected to C 2 providing the desired input repetition frequency dependent variable. In the temporary absence of input pulses to the generator, transistors TS10, TS11 (see Fig. 2) do not conduct but since capacitor C L has a short charging time constant and a long discharging time constant, timing pulses continue to be supplied at the previous frequency. To achieve proportional action instead of integral action described above, a bipolar switch Sch (Fig. 2) is provided which charges capacitor C L to a fixed potential upon the appearance of each input pulse.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19681801261 DE1801261B2 (en) | 1968-10-04 | 1968-10-04 | ARRANGEMENT FOR GENERATING CLOCK PULSES |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1279835A true GB1279835A (en) | 1972-06-28 |
Family
ID=5709678
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4897069A Expired GB1279835A (en) | 1968-10-04 | 1969-10-06 | Improvements in or relating to pulse generators |
Country Status (6)
Country | Link |
---|---|
BE (1) | BE739822A (en) |
DE (1) | DE1801261B2 (en) |
FR (1) | FR2019909A1 (en) |
GB (1) | GB1279835A (en) |
LU (1) | LU59572A1 (en) |
NL (1) | NL6915099A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2038091C3 (en) * | 1970-07-31 | 1982-09-23 | Nixdorf Computer Ag, 4790 Paderborn | Procedure for the recovery of binary information |
JPS5620735B2 (en) * | 1973-01-29 | 1981-05-15 | ||
DE2414285C3 (en) * | 1974-03-25 | 1981-08-20 | Siemens AG, 1000 Berlin und 8000 München | Phase detector |
-
1968
- 1968-10-04 DE DE19681801261 patent/DE1801261B2/en active Granted
-
1969
- 1969-10-02 FR FR6933657A patent/FR2019909A1/fr not_active Withdrawn
- 1969-10-03 BE BE739822D patent/BE739822A/xx not_active Expired
- 1969-10-03 LU LU59572D patent/LU59572A1/xx unknown
- 1969-10-06 GB GB4897069A patent/GB1279835A/en not_active Expired
- 1969-10-06 NL NL6915099A patent/NL6915099A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
LU59572A1 (en) | 1970-01-09 |
NL6915099A (en) | 1970-04-07 |
DE1801261A1 (en) | 1970-05-14 |
FR2019909A1 (en) | 1970-07-10 |
BE739822A (en) | 1970-04-03 |
DE1801261C3 (en) | 1973-11-22 |
DE1801261B2 (en) | 1973-05-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |