GB1273790A - Improvements in mark-space analogue to digital converters - Google Patents

Abstract

1,273,790. Analogue to digital converters. SOLARTRON ELECTRONIC GROUP Ltd. 14 Aug., 1970 [25 Sept., 1969], No. 47334/69. Heading G4H. In a dual-ramp A/D converter an unknown voltage V I is introduced through an input resistor 11 to a summing circuit, preferably an integrator 12, 13, the output V 0 from which is compared, at 14, with a sawtooth waveform V D generated at 15, the comparator 14 causing a flip-flop 18 to change its state on every occasion when V 0 equals V D , the flip-flop 18 in its first state closing an F.E.T. switch 20 thereby admitting an opposing reference voltage V R through a resistor 21 to the integrator 12, 13, and also opening a gate 22 admitting pulses from a clock source 16 to a counter 23. The counter 23 is cleared every 100 periods of the waveform V D and its contents transferred to a staticizer 24 and read out is effected on number tubes or print-out. In a modification, Fig. 3 (not shown), a square waveform from a flip-flop (29) is introduced at the input of the integrator, the output from which is compared with a constant voltage, and in both embodiments an overload logic circuit 26 senses whether the flip-flop 18 is in its first state at the beginning of a cycle of operation and provides a warning in this event that V I is overloading the instrument.