GB1273199A - A method for manufacturing a semiconductor device having diffusion junctions - Google Patents

A method for manufacturing a semiconductor device having diffusion junctions

Info

Publication number
GB1273199A
GB1273199A GB5123969A GB5123969A GB1273199A GB 1273199 A GB1273199 A GB 1273199A GB 5123969 A GB5123969 A GB 5123969A GB 5123969 A GB5123969 A GB 5123969A GB 1273199 A GB1273199 A GB 1273199A
Authority
GB
United Kingdom
Prior art keywords
region
type
substrate
diffusion
oct
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5123969A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of GB1273199A publication Critical patent/GB1273199A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2252Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

1,273,199. Semi-conductor devices. HITACHI Ltd. 17 Oct., 1969 [21 Oct., 1968 (2)], No. 51239/69. Heading H1K. A method of manufacturing transistors comprises preparing a high resistivity, e.g. 10 # cm., N-type, silicon substrate 11, and diffusing into it, either from the gas phase or from a coating on the surface, an N-type impurity, e.g. phosphorus, to form a shallow, heavily doped region; a drive in step at 1200‹ C. in a nitrogen atmosphere follows to form an N<SP>+</SP> region 13 with an impurity concentration of 10<SP>20</SP> atoms/c.c.; the other surface is exposed and a diffusion of a P- type impurity, e.g. boron, takes place to form a base region 14; another N-type diffusion follows to form a plurality of emitter regions 15; contact is made to the regions, the collector region comprising a part of the original substrate 11, and the region 13; and the substrate is divided up by slots 19 to form a plurality of transistors. Grown oxide layers may be used as masking material. A substrate of P or I type material alternatively may be used.
GB5123969A 1968-10-21 1969-10-17 A method for manufacturing a semiconductor device having diffusion junctions Expired GB1273199A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7608168 1968-10-21
JP7608268 1968-10-21

Publications (1)

Publication Number Publication Date
GB1273199A true GB1273199A (en) 1972-05-03

Family

ID=26417236

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5123969A Expired GB1273199A (en) 1968-10-21 1969-10-17 A method for manufacturing a semiconductor device having diffusion junctions

Country Status (3)

Country Link
DE (1) DE1952795B2 (en)
FR (1) FR2021133A1 (en)
GB (1) GB1273199A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5799736A (en) * 1980-12-12 1982-06-21 Toshiba Corp Fabrication of semiconductor substrate

Also Published As

Publication number Publication date
DE1952795B2 (en) 1972-11-16
DE1952795A1 (en) 1970-09-24
FR2021133A1 (en) 1970-07-17

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee