GB1271856A - Analog to digital converter - Google Patents
Analog to digital converterInfo
- Publication number
- GB1271856A GB1271856A GB36999/69A GB3699969A GB1271856A GB 1271856 A GB1271856 A GB 1271856A GB 36999/69 A GB36999/69 A GB 36999/69A GB 3699969 A GB3699969 A GB 3699969A GB 1271856 A GB1271856 A GB 1271856A
- Authority
- GB
- United Kingdom
- Prior art keywords
- capacitor
- switch
- during time
- junction
- negative
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
1,271,856. Analogue/digital converters. INTERNATIONAL STANDARD ELECTRIC CORP. 23 July, 1969 [26 July, 1968], No. 36999/69. Heading G4H. [Also in Division G1] After a first capacitor C1 (Fig. 1) has been charged to a value dependent on an analogue input signal across terminal el, e2 a second capacitor C2 is connected in series with it so that the first capacitor C1 discharges a fixed quantity of electricity U.C2 into the second capacitor C2, capacitor C2 then being discharged. This process is repeated and the number of increments of electricity transferred to the second capacitor counted to give a digital indication of the input signal. The count may be displayed on Nixie tubes together with a polarity signal. Alternatively a standard signal may be applied across input terminals e1, e2 and the capacitance of capacitor C1 measured. As described during time T1 a switch P1 is closed so that with a positive input signal capacitor Cl charges to a positive level. At the start of time interval T2 switch P1 is opened and switch P4 is closed to connect capacitor C1 in series with capacitor C2. Each time the junction E of the capacitors is at zero potential a comparator CO delivers (1) a counting pulse to counter C p and (2) a pulse to control circuit CD to open switch P4 and close switch P5 to short circuit capacitor C2 until the potential of junction E drops to -U when the switch P4 is reclosed to recharge capacitor C2, this process being repeated until capacitor C1 is discharged. At the start of time interval Tx1 switch P2 is closed to charge capacitor C1 to a negative level but since the potential of junction E remains negative the comparator CO does not operate. Light POS is illuminated to indicate a positive input since the comparator output c exists during time T2. With a negative input, during time T2 the junction E remains negative capacitor C1 being charged to a positive level during time interval T<SP>x</SP>1 and incrementally discharged during time T<SP>x</SP>2. A lamp Neg is then lit since the comparator output exists during time T<SP>x</SP>2.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR160710 | 1968-07-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1271856A true GB1271856A (en) | 1972-04-26 |
Family
ID=8653072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB36999/69A Expired GB1271856A (en) | 1968-07-26 | 1969-07-23 | Analog to digital converter |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR1586412A (en) |
GB (1) | GB1271856A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001056166A2 (en) * | 2000-01-28 | 2001-08-02 | Infineon Technologies Ag | Method and analog-to-digital converter for converting an analog voltage into an arithmetical value |
WO2008125532A2 (en) * | 2007-04-13 | 2008-10-23 | Siemens Aktiengesellschaft | Method and device for measuring a level of an electric measurement variable that can be changed over time |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4065766A (en) * | 1976-03-18 | 1977-12-27 | General Electric Company | Analog-to-digital converter |
-
1968
- 1968-07-26 FR FR160710A patent/FR1586412A/fr not_active Expired
-
1969
- 1969-07-23 GB GB36999/69A patent/GB1271856A/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001056166A2 (en) * | 2000-01-28 | 2001-08-02 | Infineon Technologies Ag | Method and analog-to-digital converter for converting an analog voltage into an arithmetical value |
WO2001056166A3 (en) * | 2000-01-28 | 2002-03-14 | Infineon Technologies Ag | Method and analog-to-digital converter for converting an analog voltage into an arithmetical value |
WO2008125532A2 (en) * | 2007-04-13 | 2008-10-23 | Siemens Aktiengesellschaft | Method and device for measuring a level of an electric measurement variable that can be changed over time |
WO2008125532A3 (en) * | 2007-04-13 | 2009-04-30 | Siemens Ag | Method and device for measuring a level of an electric measurement variable that can be changed over time |
Also Published As
Publication number | Publication date |
---|---|
FR1586412A (en) | 1970-02-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |