GB1257942A - - Google Patents

Info

Publication number
GB1257942A
GB1257942A GB1257942DA GB1257942A GB 1257942 A GB1257942 A GB 1257942A GB 1257942D A GB1257942D A GB 1257942DA GB 1257942 A GB1257942 A GB 1257942A
Authority
GB
United Kingdom
Prior art keywords
layer
polycrystalline
substrate
semi
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1257942A publication Critical patent/GB1257942A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Recrystallisation Techniques (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

1,257,942. Semi-conductor devices. SONY CORP. 17 Sept., 1969 [18 Sept., 1968], No. 45865/69. Heading H1K. A pn-junction 106 having a relatively high breakdown voltage due to its large crosssectional radius of curvature is produced in an n(p)-type single crystal semi-conductor substrate 101 by diffusion of p(n)-type impurities through a polycrystalline semi-conductor layer 103. The layer 103 may be vapour deposited or sputtered on to the substrate 101 either directly or over a low-temperature deposited polycrystalline layer, a sand-blasted, scratched or sputtered layer, or a thin layer of silicon dioxide, any of which layers will tend to nucleate polycrystalline growth in the layer 103. The vapours of SiCl 4 and AsCl 3 may be employed to deposit the layer 103. To form the diode shown, B is diffused through the layer 103 into the substrate 101 using an oxide or nitride mask 104, and an Al electrode 108 is applied. To form a transistor a second diffusion stage of an opposite conductivity-type impurity is carried out in the same way. The polycrystalline layer 103 may be removed after diffusion therethrough has taken place. The invention is also applicable to integrated circuit manufacture. Suitable semiconductor materials include Si, Ge and GaAs.
GB1257942D 1968-09-18 1969-09-17 Expired GB1257942A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6738168A JPS514070B1 (en) 1968-09-18 1968-09-18

Publications (1)

Publication Number Publication Date
GB1257942A true GB1257942A (en) 1971-12-22

Family

ID=13343359

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1257942D Expired GB1257942A (en) 1968-09-18 1969-09-17

Country Status (3)

Country Link
JP (1) JPS514070B1 (en)
FR (1) FR2018367B1 (en)
GB (1) GB1257942A (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1338169A (en) * 1961-11-27 1963-09-20 Western Electric Co Semiconductor devices and their manufacturing process
FR1529195A (en) * 1966-06-28 1968-06-14 Asea Ab Semiconductor device

Also Published As

Publication number Publication date
FR2018367A1 (en) 1970-05-29
JPS514070B1 (en) 1976-02-07
DE1947067A1 (en) 1970-04-09
FR2018367B1 (en) 1974-02-22
DE1947067B2 (en) 1971-05-13

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Legal Events

Date Code Title Description
PS Patent sealed
PE20 Patent expired after termination of 20 years